AR = ar
OBJCOPY = objcopy
-MCUFLAGS = -mthumb -mcpu=cortex-m4
+MCUFLAGS = -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
AFLAGS = $(MCUFLAGS)
-CFLAGS = $(MCUFLAGS) -Iinclude -ffreestanding -Wall -Werror -Wextra
+CFLAGS = $(MCUFLAGS) -Iinclude -fno-builtin -fsigned-char -ffreestanding -Wall -Werror -Wextra
OFLAGS = -O ihex
CFILES = $(wildcard src/*.c)
void serial_put(int c);
char serial_get(void);
-void serial_gets(char *buf);
+void serial_gets(char *buf, int max);
#endif // SERIAL_H_
*/\r
\r
#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */\r
-#include "system_stm32l4xx.h"\r
#include <stdint.h>\r
\r
/** @addtogroup Peripheral_registers_structures\r
+++ /dev/null
-/**\r
- ******************************************************************************\r
- * @file system_stm32l4xx.h\r
- * @author MCD Application Team\r
- * @version V1.1.1\r
- * @date 29-April-2016\r
- * @brief CMSIS Cortex-M4 Device System Source File for STM32L4xx devices.\r
- ******************************************************************************\r
- * @attention\r
- *\r
- * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>\r
- *\r
- * Redistribution and use in source and binary forms, with or without modification,\r
- * are permitted provided that the following conditions are met:\r
- * 1. Redistributions of source code must retain the above copyright notice,\r
- * this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright notice,\r
- * this list of conditions and the following disclaimer in the documentation\r
- * and/or other materials provided with the distribution.\r
- * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
- * may be used to endorse or promote products derived from this software\r
- * without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
- *\r
- ******************************************************************************\r
- */\r
-\r
-/** @addtogroup CMSIS\r
- * @{\r
- */\r
-\r
-/** @addtogroup stm32l4xx_system\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Define to prevent recursive inclusion\r
- */\r
-#ifndef __SYSTEM_STM32L4XX_H\r
-#define __SYSTEM_STM32L4XX_H\r
-\r
-#ifdef __cplusplus\r
- extern "C" {\r
-#endif\r
-\r
-/** @addtogroup STM32L4xx_System_Includes\r
- * @{\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-\r
-/** @addtogroup STM32L4xx_System_Exported_Variables\r
- * @{\r
- */\r
- /* The SystemCoreClock variable is updated in three ways:\r
- 1) by calling CMSIS function SystemCoreClockUpdate()\r
- 2) by calling HAL API function HAL_RCC_GetSysClockFreq()\r
- 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency\r
- Note: If you use this function to configure the system clock; then there\r
- is no need to call the 2 first functions listed above, since SystemCoreClock\r
- variable is updated automatically.\r
- */\r
-extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */\r
-\r
-extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */\r
-extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */\r
-extern const uint32_t MSIRangeTable[12]; /*!< MSI ranges table values */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @addtogroup STM32L4xx_System_Exported_Constants\r
- * @{\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @addtogroup STM32L4xx_System_Exported_Macros\r
- * @{\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @addtogroup STM32L4xx_System_Exported_Functions\r
- * @{\r
- */\r
-\r
-extern void SystemInit(void);\r
-extern void SystemCoreClockUpdate(void);\r
-/**\r
- * @}\r
- */\r
-\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
-\r
-#endif /*__SYSTEM_STM32L4XX_H */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
#include <gpio.h>
#include <string.h>
+//#define USE_DELAY
+
#define LCD_D0 GPIO_PORT(A, 0)
#define LCD_D1 GPIO_PORT(A, 1)
#define LCD_D2 GPIO_PORT(A, 4)
void lcd_pulse(void)
{
gpio_dout(LCD_E, 1);
+#ifdef USE_DELAY
delay(1);
+#else
+ for (uint16_t i = 0; i < 10000; i++)
+ asm("");
+#endif // USE_DELAY
gpio_dout(LCD_E, 0);
}
\r
serial_init();\r
\r
+ // enable FPU\r
+ SCB->CPACR |= (0xF << 20);\r
+\r
task_init(kmain);\r
\r
while (1);\r
interpreter_define_cfunc(&interp, "print", script_puts);\r
\r
char buf[32];\r
+ int index;\r
while (1) {\r
- serial_gets(buf);\r
+ index = 0;\r
+ do {\r
+ buf[index] = serial_get();\r
+ } while (buf[index++] != '\r' && index < 32);\r
+ buf[index - 1] = '\0';\r
+ \r
interpreter_doline(&interp, buf);\r
}\r
}\r
\r
+void task_suck(void)\r
+{\r
+ float i = 1;\r
+\r
+ while (1) {\r
+ i += 0.123;\r
+ lcd_puti((int)(i * 1000));\r
+ delay(2000);\r
+ }\r
+}\r
+\r
+#include <stdio.h>\r
void kmain(void)\r
{\r
asm("cpsie i");\r
\r
task_start(lcd_handler, 128);\r
delay(200);\r
- task_start(task_interpreter, 512);\r
+ task_start(task_suck, 1024);\r
+ //task_start(task_interpreter, 1024);\r
\r
//char *s = initrd_getfile("test.txt");\r
// svc puts\r
#include <parser.h>
-#define true 1
-#define false 0
-typedef uint8_t bool;
-
+#include <stdbool.h>
#include <heap.h>
-#include <clock.h>
+
+#define MAX_VAR 8
+#define MAX_STACK 8
static const char *interpreter_operators = "=(";
-int strcmp(const char *s1, const char *s2)
+bool strcmp(const char *a, const char *b)
+{
+ int i = 0;
+ for (; a[i] == b[i] && a[i] != '\0'; i++);
+ return a[i] == b[i];
+}
+
+bool strncmp(const char *a, const char *b, int count)
{
int i = 0;
- for (; s1[i] == s2[i] && s1[i] != '\0'; i++);
- return s1[i] == s2[i];
+ for (; a[i] == b[i] && i < count; i++);
+ return i == count;
}
uint8_t isalpha(char c)
{
interp->status = READY;
interp->vcount = 0;
- interp->vars = (variable *)hcalloc(32, sizeof(variable));
- interp->names = (char **)hcalloc(32, sizeof(char *));
- interp->stack = (stack_t *)hcalloc(64, sizeof(stack_t));
+ interp->vars = (variable *)hcalloc(MAX_VAR, sizeof(variable));
+ interp->names = (char **)hcalloc(MAX_VAR, sizeof(char *));
+ interp->stack = (stack_t *)hcalloc(MAX_STACK, sizeof(stack_t));
}
void interpreter_define_value(interpreter *interp, const char *name, int32_t value)
{
uint16_t i;
for (i = 0; name[i] == s[i] && s[i] != '\0'; i++);
- return (name[i] == '\0');
+ return (name[i] == '\0' && !isname(s[i]));
}
uint16_t spacecount(const char *s)
return i;
}
-char *copystr(const char *s)
+char *copystr(const char *s, char end)
{
uint16_t len = 0;
- while (s[len++] != '\n');
+ while (s[len++] != end);
char *buf = (char *)hmalloc(len);
for (uint16_t i = 0; i < len; i++)
buf[i] = s[i];
return buf;
}
+variable *interpreter_getvar(interpreter *interp, const char *line)
+{
+ for (uint16_t i = 0; i < interp->vcount; i++) {
+ if (namencmp(interp->names[i], line))
+ return &interp->vars[i];
+ }
+
+ return 0;
+}
+
int interpreter_doline(interpreter *interp, const char *line)
{
variable *bits[16];
uint16_t offset = 0, boffset = 0;
// check for var/func set or usage
+ int end;
getvar:
- for (uint16_t i = 0; i < interp->vcount; i++) {
- if (namencmp(interp->names[i], line)) {
- bits[boffset++] = &interp->vars[i];
- // get past name
- for (uint16_t j = 0; interp->names[i][j] != '\0'; j++, offset++);
- break;
- }
- }
+ for (end = 0; isname(line[end]); end++);
+ variable *var = interpreter_getvar(interp, line);
- // defining new variable
- if (boffset == 0) {
- uint16_t end;
- for (end = 0; isname(line[end]); end++);
+ if (var != 0) {
+ bits[boffset++] = var;
+ } else {
+ // defining new variable
interpreter_define_value(interp, copysubstr(line, end), 0);
goto getvar; // try again
}
- // skip whitespace
+ // skip whitespace/name
+ offset += end;
offset += spacecount(line + offset);
if (boffset == 0 && line[offset] != '=')
// print value
return -99;
} else if (line[offset] == '=') {
- return -23;
// assignment/expression
- //offset++;
- //offset += spacecount(line + offset);
- //if (boffset > 0)
- // bits[boffset]->value = (uint32_t)copystr(line + offset);
+ offset++;
+ offset += spacecount(line + offset);
+ bits[0]->value = (uint32_t)copystr(line + offset, '\0');
} else if (line[offset] == '(') {
// function call
offset++;
for (j = offsets[i]; line[j] != ' ' && line[j] != '\t' &&
line[j] != ',' && line[j] != ')'; j++);
j -= offsets[i];
- interp->stack[i] = (char *)hmalloc(j);
- for (uint16_t k = 0; k < j; k++)
- ((char *)interp->stack[i])[k] = line[offsets[i] + k];
+
+ variable *var = interpreter_getvar(interp, line + offsets[i]);
+ if (var != 0)
+ interp->stack[i] = copystr((char *)var->value, '\0');
+ else
+ interp->stack[i] = copysubstr(line + offsets[i], j);
}
((func_t)bits[0]->value)(interp->stack);
return USART2->RDR & 0xFF;
}
-void serial_gets(char *buf)
+void serial_gets(char *buf, int max)
{
uint16_t index = 0;
do {
buf[index] = serial_get();
- } while (buf[index++] != '\r');
+ } while (index++ < max && buf[index] != '\r');
buf[index - 1] = '\0';
//return buf;
cmp r2, r3\r
bcc FillZerobss\r
\r
-/* Call the clock system intitialization function.*/\r
- bl SystemInit\r
/* Call static constructors */\r
bl __libc_init_array\r
/* Call the application's entry point.*/\r
#include <stm32l476xx.h>\r
+#include <lcd.h>\r
+\r
+void perror(const char *s)\r
+{\r
+ lcd_puts(s);\r
+}\r
\r
void NMI_Handler(void) {}\r
\r
void HardFault_Handler(void)\r
{\r
GPIOA->BSRR |= (1 << 5);\r
+ perror("Hard Fault!");\r
while (1);\r
}\r
\r
void MemManage_Handler(void)\r
{\r
GPIOA->BSRR |= (1 << 5);\r
+ perror("MemManage Fault!");\r
while (1);\r
}\r
\r
void BusFault_Handler(void)\r
{\r
GPIOA->BSRR |= (1 << 5);\r
+ perror("Bus Fault!");\r
while (1);\r
}\r
\r
void UsageFault_Handler(void)\r
{\r
GPIOA->BSRR |= (1 << 5);\r
+ perror("Usage Fault!");\r
while (1);\r
}\r
\r
+++ /dev/null
-#include "stm32l476xx.h"\r
-\r
-/************************* Miscellaneous Configuration ************************/\r
-/*!< Uncomment the following line if you need to relocate your vector Table in\r
- Internal SRAM. */\r
-/* #define VECT_TAB_SRAM */\r
-#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.\r
- This value must be a multiple of 0x200. */\r
-/******************************************************************************/\r
-\r
-void SystemInit(void)\r
-{\r
- /* FPU settings ------------------------------------------------------------*/\r
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)\r
- SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */\r
- #endif\r
-\r
- /* Reset the RCC clock configuration to the default reset state ------------*/\r
- /* Set MSION bit */\r
- RCC->CR |= RCC_CR_MSION;\r
-\r
- /* Reset CFGR register */\r
- RCC->CFGR = 0x00000000U;\r
-\r
- /* Reset HSEON, CSSON , HSION, and PLLON bits */\r
- RCC->CR &= 0xEAF6FFFFU;\r
-\r
- /* Reset PLLCFGR register */\r
- RCC->PLLCFGR = 0x00001000U;\r
-\r
- /* Reset HSEBYP bit */\r
- RCC->CR &= 0xFFFBFFFFU;\r
-\r
- /* Disable all interrupts */\r
- RCC->CIER = 0x00000000U;\r
-\r
- /* Configure the Vector Table location add offset address ------------------*/\r
-#ifdef VECT_TAB_SRAM\r
- SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */\r
-#else\r
- SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */\r
-#endif\r
-}\r
-\r
void (*code)(void);
} task_t;
-#define MAX_TASKS 4
+#define MAX_TASKS 6
static task_t tasks[MAX_TASKS];
static volatile int next_idx = 0;
asm("\
mov r0, #0xFFFFFFFD; \
cpsie i; \
- bx r0; \
+ bx lr; \
");
}
projects / clyne / calculator.git / commitdiff