add custom board info

diff --git a/board/board.c b/board/board.c
new file mode 100644 (file)
index 0000000..2868726
--- /dev/null
+++ b/board/board.c
@@ -0,0 +1,266 @@
+/*\r
+    ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio\r
+\r
+    Licensed under the Apache License, Version 2.0 (the "License");\r
+    you may not use this file except in compliance with the License.\r
+    You may obtain a copy of the License at\r
+\r
+        http://www.apache.org/licenses/LICENSE-2.0\r
+\r
+    Unless required by applicable law or agreed to in writing, software\r
+    distributed under the License is distributed on an "AS IS" BASIS,\r
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+    See the License for the specific language governing permissions and\r
+    limitations under the License.\r
+*/\r
+\r
+/*\r
+ * This file has been automatically generated using ChibiStudio board\r
+ * generator plugin. Do not edit manually.\r
+ */\r
+\r
+#include "hal.h"\r
+#include "stm32_gpio.h"\r
+\r
+/*===========================================================================*/\r
+/* Driver local definitions.                                                 */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Driver exported variables.                                                */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Driver local variables and types.                                         */\r
+/*===========================================================================*/\r
+\r
+/**\r
+ * @brief   Type of STM32 GPIO port setup.\r
+ */\r
+typedef struct {\r
+  uint32_t              moder;\r
+  uint32_t              otyper;\r
+  uint32_t              ospeedr;\r
+  uint32_t              pupdr;\r
+  uint32_t              odr;\r
+  uint32_t              afrl;\r
+  uint32_t              afrh;\r
+} gpio_setup_t;\r
+\r
+/**\r
+ * @brief   Type of STM32 GPIO initialization data.\r
+ */\r
+typedef struct {\r
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)\r
+  gpio_setup_t          PAData;\r
+#endif\r
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)\r
+  gpio_setup_t          PBData;\r
+#endif\r
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)\r
+  gpio_setup_t          PCData;\r
+#endif\r
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)\r
+  gpio_setup_t          PDData;\r
+#endif\r
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)\r
+  gpio_setup_t          PEData;\r
+#endif\r
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)\r
+  gpio_setup_t          PFData;\r
+#endif\r
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)\r
+  gpio_setup_t          PGData;\r
+#endif\r
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)\r
+  gpio_setup_t          PHData;\r
+#endif\r
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)\r
+  gpio_setup_t          PIData;\r
+#endif\r
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)\r
+  gpio_setup_t          PJData;\r
+#endif\r
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)\r
+  gpio_setup_t          PKData;\r
+#endif\r
+} gpio_config_t;\r
+\r
+/**\r
+ * @brief   STM32 GPIO static initialization data.\r
+ */\r
+static const gpio_config_t gpio_default_config = {\r
+#if STM32_HAS_GPIOA\r
+  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,\r
+   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOB\r
+  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,\r
+   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOC\r
+  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,\r
+   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOD\r
+  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,\r
+   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOE\r
+  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,\r
+   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOF\r
+  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,\r
+   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOG\r
+  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,\r
+   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOH\r
+  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,\r
+   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOI\r
+  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,\r
+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOJ\r
+  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,\r
+   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH},\r
+#endif\r
+#if STM32_HAS_GPIOK\r
+  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,\r
+   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH}\r
+#endif\r
+};\r
+\r
+/*===========================================================================*/\r
+/* Driver local functions.                                                   */\r
+/*===========================================================================*/\r
+\r
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {\r
+\r
+  gpiop->OTYPER  = config->otyper;\r
+  gpiop->OSPEEDR = config->ospeedr;\r
+  gpiop->PUPDR   = config->pupdr;\r
+  gpiop->ODR     = config->odr;\r
+  gpiop->AFRL    = config->afrl;\r
+  gpiop->AFRH    = config->afrh;\r
+  gpiop->MODER   = config->moder;\r
+}\r
+\r
+static void stm32_gpio_init(void) {\r
+\r
+  /* Enabling GPIO-related clocks, the mask comes from the\r
+     registry header file.*/\r
+  rccResetAHB4(STM32_GPIO_EN_MASK);\r
+  rccEnableAHB4(STM32_GPIO_EN_MASK, true);\r
+\r
+  /* Initializing all the defined GPIO ports.*/\r
+#if STM32_HAS_GPIOA\r
+  gpio_init(GPIOA, &gpio_default_config.PAData);\r
+#endif\r
+#if STM32_HAS_GPIOB\r
+  gpio_init(GPIOB, &gpio_default_config.PBData);\r
+#endif\r
+#if STM32_HAS_GPIOC\r
+  gpio_init(GPIOC, &gpio_default_config.PCData);\r
+#endif\r
+#if STM32_HAS_GPIOD\r
+  gpio_init(GPIOD, &gpio_default_config.PDData);\r
+#endif\r
+#if STM32_HAS_GPIOE\r
+  gpio_init(GPIOE, &gpio_default_config.PEData);\r
+#endif\r
+#if STM32_HAS_GPIOF\r
+  gpio_init(GPIOF, &gpio_default_config.PFData);\r
+#endif\r
+#if STM32_HAS_GPIOG\r
+  gpio_init(GPIOG, &gpio_default_config.PGData);\r
+#endif\r
+#if STM32_HAS_GPIOH\r
+  gpio_init(GPIOH, &gpio_default_config.PHData);\r
+#endif\r
+#if STM32_HAS_GPIOI\r
+  gpio_init(GPIOI, &gpio_default_config.PIData);\r
+#endif\r
+#if STM32_HAS_GPIOJ\r
+  gpio_init(GPIOJ, &gpio_default_config.PJData);\r
+#endif\r
+#if STM32_HAS_GPIOK\r
+  gpio_init(GPIOK, &gpio_default_config.PKData);\r
+#endif\r
+}\r
+\r
+/*===========================================================================*/\r
+/* Driver interrupt handlers.                                                */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Driver exported functions.                                                */\r
+/*===========================================================================*/\r
+\r
+/**\r
+ * @brief   Early initialization code.\r
+ * @details GPIO ports and system clocks are initialized before everything\r
+ *          else.\r
+ */\r
+void __early_init(void) {\r
+\r
+  stm32_gpio_init();\r
+  stm32_clock_init();\r
+}\r
+\r
+#if HAL_USE_SDC || defined(__DOXYGEN__)\r
+/**\r
+ * @brief   SDC card detection.\r
+ */\r
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {\r
+\r
+  (void)sdcp;\r
+  /* CHTODO: Fill the implementation.*/\r
+  return true;\r
+}\r
+\r
+/**\r
+ * @brief   SDC card write protection detection.\r
+ */\r
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {\r
+\r
+  (void)sdcp;\r
+  /* CHTODO: Fill the implementation.*/\r
+  return false;\r
+}\r
+#endif /* HAL_USE_SDC */\r
+\r
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)\r
+/**\r
+ * @brief   MMC_SPI card detection.\r
+ */\r
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {\r
+\r
+  (void)mmcp;\r
+  /* CHTODO: Fill the implementation.*/\r
+  return true;\r
+}\r
+\r
+/**\r
+ * @brief   MMC_SPI card write protection detection.\r
+ */\r
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {\r
+\r
+  (void)mmcp;\r
+  /* CHTODO: Fill the implementation.*/\r
+  return false;\r
+}\r
+#endif\r
+\r
+/**\r
+ * @brief   Board-specific initialization code.\r
+ * @note    You can add your board-specific code here.\r
+ */\r
+void boardInit(void) {\r
+\r
+}\r

diff --git a/board/board.h b/board/board.h
new file mode 100644 (file)
index 0000000..58ba40e
--- /dev/null
+++ b/board/board.h
@@ -0,0 +1,1642 @@
+/*\r
+    ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio\r
+\r
+    Licensed under the Apache License, Version 2.0 (the "License");\r
+    you may not use this file except in compliance with the License.\r
+    You may obtain a copy of the License at\r
+\r
+        http://www.apache.org/licenses/LICENSE-2.0\r
+\r
+    Unless required by applicable law or agreed to in writing, software\r
+    distributed under the License is distributed on an "AS IS" BASIS,\r
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+    See the License for the specific language governing permissions and\r
+    limitations under the License.\r
+*/\r
+\r
+/*\r
+ * This file has been automatically generated using ChibiStudio board\r
+ * generator plugin. Do not edit manually.\r
+ */\r
+\r
+#ifndef BOARD_H\r
+#define BOARD_H\r
+\r
+/*===========================================================================*/\r
+/* Driver constants.                                                         */\r
+/*===========================================================================*/\r
+\r
+/*\r
+ * Setup for STMicroelectronics STM32 Nucleo144-H743ZI board.\r
+ */\r
+\r
+/*\r
+ * Board identifier.\r
+ */\r
+#define BOARD_ST_NUCLEO144_H743ZI\r
+#define BOARD_NAME                  "STMicroelectronics STM32 Nucleo144-H743ZI"\r
+\r
+/*\r
+ * Ethernet PHY type.\r
+ */\r
+#define BOARD_PHY_ID                MII_LAN8742A_ID\r
+#define BOARD_PHY_RMII\r
+\r
+/*\r
+ * Board oscillators-related settings.\r
+ */\r
+#if !defined(STM32_LSECLK)\r
+#define STM32_LSECLK                32768U\r
+#endif\r
+\r
+#define STM32_LSEDRV                (3U << 3U)\r
+\r
+#if !defined(STM32_HSECLK)\r
+#define STM32_HSECLK                8000000U\r
+#endif\r
+\r
+#define STM32_HSE_BYPASS\r
+\r
+/*\r
+ * MCU type as defined in the ST header.\r
+ */\r
+#define STM32H723xx\r
+\r
+/*\r
+ * IO pins assignments.\r
+ */\r
+#define GPIOA_PIN0                  0U\r
+#define GPIOA_RMII_REF_CLK          1U\r
+#define GPIOA_RMII_MDIO             2U\r
+#define GPIOA_PIN3                  3U\r
+#define GPIOA_PIN4                  4U\r
+#define GPIOA_PIN5                  5U\r
+#define GPIOA_PIN6                  6U\r
+#define GPIOA_RMII_CRS_DV           7U\r
+#define GPIOA_USB_SOF               8U\r
+#define GPIOA_MCO1                  8U\r
+#define GPIOA_USB_VBUS              9U\r
+#define GPIOA_USB_ID                10U\r
+#define GPIOA_USB_DM                11U\r
+#define GPIOA_USB_DP                12U\r
+#define GPIOA_SWDIO                 13U\r
+#define GPIOA_SWCLK                 14U\r
+#define GPIOA_T_JTDI                15U\r
+\r
+#define GPIOB_LED1                  0U\r
+#define GPIOB_LED_GREEN             0U\r
+#define GPIOB_LED                   0U\r
+#define GPIOB_PIN1                  1U\r
+#define GPIOB_PIN2                  2U\r
+#define GPIOB_SWO                   3U\r
+#define GPIOB_PIN4                  4U\r
+#define GPIOB_PIN5                  5U\r
+#define GPIOB_PIN6                  6U\r
+#define GPIOB_PIN7                  7U\r
+#define GPIOB_PIN8                  8U\r
+#define GPIOB_PIN9                  9U\r
+#define GPIOB_PIN10                 10U\r
+#define GPIOB_PIN11                 11U\r
+#define GPIOB_PIN12                 12U\r
+#define GPIOB_RMII_TXD1             13U\r
+#define GPIOB_LED3                  14U\r
+#define GPIOB_LED_RED               14U\r
+#define GPIOB_PIN15                 15U\r
+\r
+#define GPIOC_PIN0                  0U\r
+#define GPIOC_RMII_MDC              1U\r
+#define GPIOC_PIN2                  2U\r
+#define GPIOC_PIN3                  3U\r
+#define GPIOC_RMII_RXD0             4U\r
+#define GPIOC_RMII_RXD1             5U\r
+#define GPIOC_PIN6                  6U\r
+#define GPIOC_PIN7                  7U\r
+#define GPIOC_PIN8                  8U\r
+#define GPIOC_PIN9                  9U\r
+#define GPIOC_PIN10                 10U\r
+#define GPIOC_PIN11                 11U\r
+#define GPIOC_PIN12                 12U\r
+#define GPIOC_BUTTON                13U\r
+#define GPIOC_OSC32_IN              14U\r
+#define GPIOC_OSC32_OUT             15U\r
+\r
+#define GPIOD_PIN0                  0U\r
+#define GPIOD_PIN1                  1U\r
+#define GPIOD_PIN2                  2U\r
+#define GPIOD_PIN3                  3U\r
+#define GPIOD_PIN4                  4U\r
+#define GPIOD_PIN5                  5U\r
+#define GPIOD_PIN6                  6U\r
+#define GPIOD_PIN7                  7U\r
+#define GPIOD_USART3_RX             8U\r
+#define GPIOD_STLK_RX               8U\r
+#define GPIOD_USART3_TX             9U\r
+#define GPIOD_STLK_TX               9U\r
+#define GPIOD_PIN10                 10U\r
+#define GPIOD_PIN11                 11U\r
+#define GPIOD_PIN12                 12U\r
+#define GPIOD_PIN13                 13U\r
+#define GPIOD_PIN14                 14U\r
+#define GPIOD_PIN15                 15U\r
+\r
+#define GPIOE_PIN0                  0U\r
+#define GPIOE_LED2                  1U\r
+#define GPIOE_LED_YELLOW            1U\r
+#define GPIOE_PIN2                  2U\r
+#define GPIOE_PIN3                  3U\r
+#define GPIOE_PIN4                  4U\r
+#define GPIOE_PIN5                  5U\r
+#define GPIOE_PIN6                  6U\r
+#define GPIOE_PIN7                  7U\r
+#define GPIOE_PIN8                  8U\r
+#define GPIOE_PIN9                  9U\r
+#define GPIOE_PIN10                 10U\r
+#define GPIOE_PIN11                 11U\r
+#define GPIOE_PIN12                 12U\r
+#define GPIOE_PIN13                 13U\r
+#define GPIOE_PIN14                 14U\r
+#define GPIOE_PIN15                 15U\r
+\r
+#define GPIOF_PIN0                  0U\r
+#define GPIOF_PIN1                  1U\r
+#define GPIOF_PIN2                  2U\r
+#define GPIOF_PIN3                  3U\r
+#define GPIOF_PIN4                  4U\r
+#define GPIOF_PIN5                  5U\r
+#define GPIOF_PIN6                  6U\r
+#define GPIOF_PIN7                  7U\r
+#define GPIOF_PIN8                  8U\r
+#define GPIOF_PIN9                  9U\r
+#define GPIOF_PIN10                 10U\r
+#define GPIOF_PIN11                 11U\r
+#define GPIOF_PIN12                 12U\r
+#define GPIOF_PIN13                 13U\r
+#define GPIOF_PIN14                 14U\r
+#define GPIOF_PIN15                 15U\r
+\r
+#define GPIOG_PIN0                  0U\r
+#define GPIOG_PIN1                  1U\r
+#define GPIOG_PIN2                  2U\r
+#define GPIOG_PIN3                  3U\r
+#define GPIOG_PIN4                  4U\r
+#define GPIOG_PIN5                  5U\r
+#define GPIOG_USB_FS_PWR_EN         6U\r
+#define GPIOG_USB_FS_OVCR           7U\r
+#define GPIOG_PIN8                  8U\r
+#define GPIOG_PIN9                  9U\r
+#define GPIOG_PIN10                 10U\r
+#define GPIOG_RMII_TX_EN            11U\r
+#define GPIOG_PIN12                 12U\r
+#define GPIOG_RMII_TXD0             13U\r
+#define GPIOG_PIN14                 14U\r
+#define GPIOG_PIN15                 15U\r
+\r
+#define GPIOH_OSC_IN                0U\r
+#define GPIOH_OSC_OUT               1U\r
+#define GPIOH_PIN2                  2U\r
+#define GPIOH_PIN3                  3U\r
+#define GPIOH_PIN4                  4U\r
+#define GPIOH_PIN5                  5U\r
+#define GPIOH_PIN6                  6U\r
+#define GPIOH_PIN7                  7U\r
+#define GPIOH_PIN8                  8U\r
+#define GPIOH_PIN9                  9U\r
+#define GPIOH_PIN10                 10U\r
+#define GPIOH_PIN11                 11U\r
+#define GPIOH_PIN12                 12U\r
+#define GPIOH_PIN13                 13U\r
+#define GPIOH_PIN14                 14U\r
+#define GPIOH_PIN15                 15U\r
+\r
+#define GPIOI_PIN0                  0U\r
+#define GPIOI_PIN1                  1U\r
+#define GPIOI_PIN2                  2U\r
+#define GPIOI_PIN3                  3U\r
+#define GPIOI_PIN4                  4U\r
+#define GPIOI_PIN5                  5U\r
+#define GPIOI_PIN6                  6U\r
+#define GPIOI_PIN7                  7U\r
+#define GPIOI_PIN8                  8U\r
+#define GPIOI_PIN9                  9U\r
+#define GPIOI_PIN10                 10U\r
+#define GPIOI_PIN11                 11U\r
+#define GPIOI_PIN12                 12U\r
+#define GPIOI_PIN13                 13U\r
+#define GPIOI_PIN14                 14U\r
+#define GPIOI_PIN15                 15U\r
+\r
+#define GPIOJ_PIN0                  0U\r
+#define GPIOJ_PIN1                  1U\r
+#define GPIOJ_PIN2                  2U\r
+#define GPIOJ_PIN3                  3U\r
+#define GPIOJ_PIN4                  4U\r
+#define GPIOJ_PIN5                  5U\r
+#define GPIOJ_PIN6                  6U\r
+#define GPIOJ_PIN7                  7U\r
+#define GPIOJ_PIN8                  8U\r
+#define GPIOJ_PIN9                  9U\r
+#define GPIOJ_PIN10                 10U\r
+#define GPIOJ_PIN11                 11U\r
+#define GPIOJ_PIN12                 12U\r
+#define GPIOJ_PIN13                 13U\r
+#define GPIOJ_PIN14                 14U\r
+#define GPIOJ_PIN15                 15U\r
+\r
+#define GPIOK_PIN0                  0U\r
+#define GPIOK_PIN1                  1U\r
+#define GPIOK_PIN2                  2U\r
+#define GPIOK_PIN3                  3U\r
+#define GPIOK_PIN4                  4U\r
+#define GPIOK_PIN5                  5U\r
+#define GPIOK_PIN6                  6U\r
+#define GPIOK_PIN7                  7U\r
+#define GPIOK_PIN8                  8U\r
+#define GPIOK_PIN9                  9U\r
+#define GPIOK_PIN10                 10U\r
+#define GPIOK_PIN11                 11U\r
+#define GPIOK_PIN12                 12U\r
+#define GPIOK_PIN13                 13U\r
+#define GPIOK_PIN14                 14U\r
+#define GPIOK_PIN15                 15U\r
+\r
+/*\r
+ * IO lines assignments.\r
+ */\r
+#define LINE_RMII_REF_CLK           PAL_LINE(GPIOA, 1U)\r
+#define LINE_RMII_MDIO              PAL_LINE(GPIOA, 2U)\r
+#define LINE_RMII_CRS_DV            PAL_LINE(GPIOA, 7U)\r
+#define LINE_USB_SOF                PAL_LINE(GPIOA, 8U)\r
+#define LINE_MCO1                   PAL_LINE(GPIOA, 8U)\r
+#define LINE_USB_VBUS               PAL_LINE(GPIOA, 9U)\r
+#define LINE_USB_ID                 PAL_LINE(GPIOA, 10U)\r
+#define LINE_USB_DM                 PAL_LINE(GPIOA, 11U)\r
+#define LINE_USB_DP                 PAL_LINE(GPIOA, 12U)\r
+#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)\r
+#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)\r
+#define LINE_T_JTDI                 PAL_LINE(GPIOA, 15U)\r
+#define LINE_LED1                   PAL_LINE(GPIOB, 0U)\r
+#define LINE_LED_GREEN              PAL_LINE(GPIOB, 0U)\r
+#define LINE_LED                    PAL_LINE(GPIOB, 0U)\r
+#define LINE_SWO                    PAL_LINE(GPIOB, 3U)\r
+#define LINE_LED2                   PAL_LINE(GPIOE, 1U)\r
+#define LINE_LED_YELLOW             PAL_LINE(GPIOE, 1U)\r
+#define LINE_RMII_TXD1              PAL_LINE(GPIOB, 13U)\r
+#define LINE_LED3                   PAL_LINE(GPIOB, 14U)\r
+#define LINE_LED_RED                PAL_LINE(GPIOB, 14U)\r
+#define LINE_RMII_MDC               PAL_LINE(GPIOC, 1U)\r
+#define LINE_RMII_RXD0              PAL_LINE(GPIOC, 4U)\r
+#define LINE_RMII_RXD1              PAL_LINE(GPIOC, 5U)\r
+#define LINE_BUTTON                 PAL_LINE(GPIOC, 13U)\r
+#define LINE_OSC32_IN               PAL_LINE(GPIOC, 14U)\r
+#define LINE_OSC32_OUT              PAL_LINE(GPIOC, 15U)\r
+#define LINE_USART3_RX              PAL_LINE(GPIOD, 8U)\r
+#define LINE_STLK_RX                PAL_LINE(GPIOD, 8U)\r
+#define LINE_USART3_TX              PAL_LINE(GPIOD, 9U)\r
+#define LINE_STLK_TX                PAL_LINE(GPIOD, 9U)\r
+#define LINE_USB_FS_PWR_EN          PAL_LINE(GPIOG, 6U)\r
+#define LINE_USB_FS_OVCR            PAL_LINE(GPIOG, 7U)\r
+#define LINE_RMII_TX_EN             PAL_LINE(GPIOG, 11U)\r
+#define LINE_RMII_TXD0              PAL_LINE(GPIOG, 13U)\r
+#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)\r
+#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)\r
+\r
+/*===========================================================================*/\r
+/* Driver pre-compile time settings.                                         */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Derived constants and error checks.                                       */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Driver data structures and types.                                         */\r
+/*===========================================================================*/\r
+\r
+/*===========================================================================*/\r
+/* Driver macros.                                                            */\r
+/*===========================================================================*/\r
+\r
+/*\r
+ * I/O ports initial setup, this configuration is established soon after reset\r
+ * in the initialization code.\r
+ * Please refer to the STM32 Reference Manual for details.\r
+ */\r
+#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))\r
+#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))\r
+#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))\r
+#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))\r
+#define PIN_ODR_LOW(n)              (0U << (n))\r
+#define PIN_ODR_HIGH(n)             (1U << (n))\r
+#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))\r
+#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))\r
+#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))\r
+#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))\r
+#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))\r
+#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))\r
+#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))\r
+#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))\r
+#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))\r
+#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))\r
+\r
+/*\r
+ * GPIOA setup:\r
+ *\r
+ * PA0  - PIN0                      (input pullup).\r
+ * PA1  - RMII_REF_CLK              (alternate 11).\r
+ * PA2  - RMII_MDIO                 (alternate 11).\r
+ * PA3  - PIN3                      (input pullup).\r
+ * PA4  - PIN4                      (input pullup).\r
+ * PA5  - PIN5                      (input pullup).\r
+ * PA6  - PIN6                      (input pullup).\r
+ * PA7  - RMII_CRS_DV               (alternate 11).\r
+ * PA8  - USB_SOF MCO1              (alternate 10).\r
+ * PA9  - USB_VBUS                  (analog).\r
+ * PA10 - USB_ID                    (alternate 10).\r
+ * PA11 - USB_DM                    (alternate 10).\r
+ * PA12 - USB_DP                    (alternate 10).\r
+ * PA13 - SWDIO                     (alternate 0).\r
+ * PA14 - SWCLK                     (alternate 0).\r
+ * PA15 - T_JTDI                    (alternate 0).\r
+ */\r
+#define VAL_GPIOA_MODER             (PIN_MODE_INPUT(GPIOA_PIN0) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_RMII_REF_CLK) |\\r
+                                     PIN_MODE_ALTERNATE(GPIOA_RMII_MDIO) |  \\r
+                                     PIN_MODE_INPUT(GPIOA_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOA_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOA_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOA_PIN6) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_RMII_CRS_DV) |\\r
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_SOF) |    \\r
+                                     PIN_MODE_ANALOG(GPIOA_USB_VBUS) |      \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_ID) |     \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_DM) |     \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_USB_DP) |     \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \\r
+                                     PIN_MODE_ALTERNATE(GPIOA_T_JTDI))\r
+#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_RMII_REF_CLK) |\\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_RMII_MDIO) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_RMII_CRS_DV) |\\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_SOF) |    \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_VBUS) |   \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_ID) |     \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) |     \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) |     \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOA_T_JTDI))\r
+#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOA_PIN0) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOA_RMII_REF_CLK) |  \\r
+                                     PIN_OSPEED_HIGH(GPIOA_RMII_MDIO) |     \\r
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOA_PIN6) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOA_RMII_CRS_DV) |   \\r
+                                     PIN_OSPEED_HIGH(GPIOA_USB_SOF) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOA_USB_VBUS) |      \\r
+                                     PIN_OSPEED_HIGH(GPIOA_USB_ID) |        \\r
+                                     PIN_OSPEED_HIGH(GPIOA_USB_DM) |        \\r
+                                     PIN_OSPEED_HIGH(GPIOA_USB_DP) |        \\r
+                                     PIN_OSPEED_HIGH(GPIOA_SWDIO) |         \\r
+                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \\r
+                                     PIN_OSPEED_HIGH(GPIOA_T_JTDI))\r
+#define VAL_GPIOA_PUPDR             (PIN_PUPDR_PULLUP(GPIOA_PIN0) |         \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_RMII_REF_CLK) |\\r
+                                     PIN_PUPDR_PULLUP(GPIOA_RMII_MDIO) |    \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_RMII_CRS_DV) |  \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_SOF) |    \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_VBUS) |   \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_ID) |     \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_DM) |     \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_USB_DP) |     \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_SWDIO) |      \\r
+                                     PIN_PUPDR_FLOATING(GPIOA_SWCLK) |      \\r
+                                     PIN_PUPDR_PULLUP(GPIOA_T_JTDI))\r
+#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOA_RMII_REF_CLK) |     \\r
+                                     PIN_ODR_HIGH(GPIOA_RMII_MDIO) |        \\r
+                                     PIN_ODR_HIGH(GPIOA_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOA_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOA_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOA_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOA_RMII_CRS_DV) |      \\r
+                                     PIN_ODR_HIGH(GPIOA_USB_SOF) |          \\r
+                                     PIN_ODR_HIGH(GPIOA_USB_VBUS) |         \\r
+                                     PIN_ODR_HIGH(GPIOA_USB_ID) |           \\r
+                                     PIN_ODR_HIGH(GPIOA_USB_DM) |           \\r
+                                     PIN_ODR_HIGH(GPIOA_USB_DP) |           \\r
+                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \\r
+                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \\r
+                                     PIN_ODR_HIGH(GPIOA_T_JTDI))\r
+#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOA_RMII_REF_CLK, 11U) | \\r
+                                     PIN_AFIO_AF(GPIOA_RMII_MDIO, 11U) |    \\r
+                                     PIN_AFIO_AF(GPIOA_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOA_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOA_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOA_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOA_RMII_CRS_DV, 11U))\r
+#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_USB_SOF, 10U) |      \\r
+                                     PIN_AFIO_AF(GPIOA_USB_VBUS, 0U) |      \\r
+                                     PIN_AFIO_AF(GPIOA_USB_ID, 10U) |       \\r
+                                     PIN_AFIO_AF(GPIOA_USB_DM, 10U) |       \\r
+                                     PIN_AFIO_AF(GPIOA_USB_DP, 10U) |       \\r
+                                     PIN_AFIO_AF(GPIOA_SWDIO, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOA_SWCLK, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOA_T_JTDI, 0U))\r
+\r
+/*\r
+ * GPIOB setup:\r
+ *\r
+ * PB0  - LED1 LED_GREEN LED        (output pushpull maximum).\r
+ * PB1  - PIN1                      (input pullup).\r
+ * PB2  - PIN2                      (input pullup).\r
+ * PB3  - SWO                       (alternate 0).\r
+ * PB4  - PIN4                      (input pullup).\r
+ * PB5  - PIN5                      (input pullup).\r
+ * PB6  - PIN6                      (input pullup).\r
+ * PB7  - PIN7                      (input pullup).\r
+ * PB8  - PIN8                      (input pullup).\r
+ * PB9  - PIN9                      (input pullup).\r
+ * PB10 - PIN10                     (input pullup).\r
+ * PB11 - PIN11                     (input pullup).\r
+ * PB12 - PIN12                     (input pullup).\r
+ * PB13 - RMII_TXD1                 (alternate 11).\r
+ * PB14 - LED3 LED_RED              (output pushpull maximum).\r
+ * PB15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOB_MODER             (PIN_MODE_OUTPUT(GPIOB_LED1) |          \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN2) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOB_SWO) |        \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN12) |          \\r
+                                     PIN_MODE_ALTERNATE(GPIOB_RMII_TXD1) |  \\r
+                                     PIN_MODE_OUTPUT(GPIOB_LED3) |          \\r
+                                     PIN_MODE_INPUT(GPIOB_PIN15))\r
+#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_LED1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_SWO) |        \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_RMII_TXD1) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_LED3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))\r
+#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_HIGH(GPIOB_LED1) |          \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN2) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOB_SWO) |           \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN12) |      \\r
+                                     PIN_OSPEED_HIGH(GPIOB_RMII_TXD1) |     \\r
+                                     PIN_OSPEED_HIGH(GPIOB_LED3) |          \\r
+                                     PIN_OSPEED_VERYLOW(GPIOB_PIN15))\r
+#define VAL_GPIOB_PUPDR             (PIN_PUPDR_FLOATING(GPIOB_LED1) |       \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_SWO) |          \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN7) |       \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_RMII_TXD1) |    \\r
+                                     PIN_PUPDR_FLOATING(GPIOB_LED3) |       \\r
+                                     PIN_PUPDR_PULLUP(GPIOB_PIN15))\r
+#define VAL_GPIOB_ODR               (PIN_ODR_LOW(GPIOB_LED1) |              \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_SWO) |              \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOB_RMII_TXD1) |        \\r
+                                     PIN_ODR_LOW(GPIOB_LED3) |              \\r
+                                     PIN_ODR_HIGH(GPIOB_PIN15))\r
+#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_LED1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_SWO, 0U) |           \\r
+                                     PIN_AFIO_AF(GPIOB_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN7, 0U))\r
+#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOB_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOB_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOB_RMII_TXD1, 11U) |    \\r
+                                     PIN_AFIO_AF(GPIOB_LED3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOB_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOC setup:\r
+ *\r
+ * PC0  - PIN0                      (input pullup).\r
+ * PC1  - RMII_MDC                  (alternate 11).\r
+ * PC2  - PIN2                      (input pullup).\r
+ * PC3  - PIN3                      (input pullup).\r
+ * PC4  - RMII_RXD0                 (alternate 11).\r
+ * PC5  - RMII_RXD1                 (alternate 11).\r
+ * PC6  - PIN6                      (input pullup).\r
+ * PC7  - PIN7                      (input pullup).\r
+ * PC8  - PIN8                      (input pullup).\r
+ * PC9  - PIN9                      (input pullup).\r
+ * PC10 - PIN10                     (input pullup).\r
+ * PC11 - PIN11                     (input pullup).\r
+ * PC12 - PIN12                     (input pullup).\r
+ * PC13 - BUTTON                    (input floating).\r
+ * PC14 - OSC32_IN                  (input floating).\r
+ * PC15 - OSC32_OUT                 (input floating).\r
+ */\r
+#define VAL_GPIOC_MODER             (PIN_MODE_INPUT(GPIOC_PIN0) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOC_RMII_MDC) |   \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN3) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOC_RMII_RXD0) |  \\r
+                                     PIN_MODE_ALTERNATE(GPIOC_RMII_RXD1) |  \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOC_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOC_BUTTON) |         \\r
+                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \\r
+                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT))\r
+#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_RMII_MDC) |   \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD0) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD1) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) |     \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))\r
+#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOC_PIN0) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOC_RMII_MDC) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN3) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOC_RMII_RXD0) |     \\r
+                                     PIN_OSPEED_HIGH(GPIOC_RMII_RXD1) |     \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_PIN12) |      \\r
+                                     PIN_OSPEED_HIGH(GPIOC_BUTTON) |        \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_OSC32_IN) |   \\r
+                                     PIN_OSPEED_VERYLOW(GPIOC_OSC32_OUT))\r
+#define VAL_GPIOC_PUPDR             (PIN_PUPDR_PULLUP(GPIOC_PIN0) |         \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_RMII_MDC) |   \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN3) |         \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_RMII_RXD0) |  \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_RMII_RXD1) |  \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOC_PIN12) |        \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_BUTTON) |     \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \\r
+                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))\r
+#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_RMII_MDC) |         \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_RMII_RXD0) |        \\r
+                                     PIN_ODR_HIGH(GPIOC_RMII_RXD1) |        \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOC_BUTTON) |           \\r
+                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \\r
+                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT))\r
+#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_RMII_MDC, 11U) |     \\r
+                                     PIN_AFIO_AF(GPIOC_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_RMII_RXD0, 11U) |    \\r
+                                     PIN_AFIO_AF(GPIOC_RMII_RXD1, 11U) |    \\r
+                                     PIN_AFIO_AF(GPIOC_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_PIN7, 0U))\r
+#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOC_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOC_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOC_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOC_BUTTON, 0U) |        \\r
+                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) |      \\r
+                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))\r
+\r
+/*\r
+ * GPIOD setup:\r
+ *\r
+ * PD0  - PIN0                      (input pullup).\r
+ * PD1  - PIN1                      (input pullup).\r
+ * PD2  - PIN2                      (input pullup).\r
+ * PD3  - PIN3                      (input pullup).\r
+ * PD4  - PIN4                      (input pullup).\r
+ * PD5  - PIN5                      (input pullup).\r
+ * PD6  - PIN6                      (input pullup).\r
+ * PD7  - PIN7                      (input pullup).\r
+ * PD8  - USART3_RX STLK_RX         (alternate 7).\r
+ * PD9  - USART3_TX STLK_TX         (alternate 7).\r
+ * PD10 - PIN10                     (input pullup).\r
+ * PD11 - PIN11                     (input pullup).\r
+ * PD12 - PIN12                     (input pullup).\r
+ * PD13 - PIN13                     (input pullup).\r
+ * PD14 - PIN14                     (input pullup).\r
+ * PD15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOD_MODER             (PIN_MODE_INPUT(GPIOD_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN7) |           \\r
+                                     PIN_MODE_ALTERNATE(GPIOD_USART3_RX) |  \\r
+                                     PIN_MODE_ALTERNATE(GPIOD_USART3_TX) |  \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOD_PIN15))\r
+#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_USART3_RX) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_USART3_TX) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))\r
+#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOD_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN7) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOD_USART3_RX) |     \\r
+                                     PIN_OSPEED_HIGH(GPIOD_USART3_TX) |     \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOD_PIN15))\r
+#define VAL_GPIOD_PUPDR             (PIN_PUPDR_PULLUP(GPIOD_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN7) |         \\r
+                                     PIN_PUPDR_FLOATING(GPIOD_USART3_RX) |  \\r
+                                     PIN_PUPDR_FLOATING(GPIOD_USART3_TX) |  \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOD_PIN15))\r
+#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOD_USART3_RX) |        \\r
+                                     PIN_ODR_HIGH(GPIOD_USART3_TX) |        \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOD_PIN15))\r
+#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOD_PIN7, 0U))\r
+#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_USART3_RX, 7U) |     \\r
+                                     PIN_AFIO_AF(GPIOD_USART3_TX, 7U) |     \\r
+                                     PIN_AFIO_AF(GPIOD_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOD_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOD_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOD_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOD_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOD_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOE setup:\r
+ *\r
+ * PE0  - PIN0                      (input pullup).\r
+ * PE1  - PIN1                      (input pullup).\r
+ * PE2  - PIN2                      (input pullup).\r
+ * PE3  - PIN3                      (input pullup).\r
+ * PE4  - PIN4                      (input pullup).\r
+ * PE5  - PIN5                      (input pullup).\r
+ * PE6  - PIN6                      (input pullup).\r
+ * PE7  - PIN7                      (input pullup).\r
+ * PE8  - PIN8                      (input pullup).\r
+ * PE9  - PIN9                      (input pullup).\r
+ * PE10 - PIN10                     (input pullup).\r
+ * PE11 - PIN11                     (input pullup).\r
+ * PE12 - PIN12                     (input pullup).\r
+ * PE13 - PIN13                     (input pullup).\r
+ * PE14 - PIN14                     (input pullup).\r
+ * PE15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOE_MODER             (PIN_MODE_INPUT(GPIOE_PIN0) |           \\r
+                                     PIN_MODE_OUTPUT(GPIOE_LED2) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOE_PIN15))\r
+#define VAL_GPIOE_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_LED2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN15))\r
+#define VAL_GPIOE_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |       \\r
+                                     PIN_OSPEED_HIGH(GPIOE_LED2) |          \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOE_PIN15))\r
+#define VAL_GPIOE_PUPDR             (PIN_PUPDR_PULLUP(GPIOE_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_LED2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOE_PIN15))\r
+#define VAL_GPIOE_ODR               (PIN_ODR_HIGH(GPIOE_PIN0) |             \\r
+                                     PIN_ODR_LOW(GPIOE_LED2) |              \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOE_PIN15))\r
+#define VAL_GPIOE_AFRL              (PIN_AFIO_AF(GPIOE_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_LED2, 0U)) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN7, 0U)\r
+#define VAL_GPIOE_AFRH              (PIN_AFIO_AF(GPIOE_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOE_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOE_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOF setup:\r
+ *\r
+ * PF0  - PIN0                      (input pullup).\r
+ * PF1  - PIN1                      (input pullup).\r
+ * PF2  - PIN2                      (input pullup).\r
+ * PF3  - PIN3                      (input pullup).\r
+ * PF4  - PIN4                      (input pullup).\r
+ * PF5  - PIN5                      (input pullup).\r
+ * PF6  - PIN6                      (input pullup).\r
+ * PF7  - PIN7                      (input pullup).\r
+ * PF8  - PIN8                      (input pullup).\r
+ * PF9  - PIN9                      (input pullup).\r
+ * PF10 - PIN10                     (input pullup).\r
+ * PF11 - PIN11                     (input pullup).\r
+ * PF12 - PIN12                     (input pullup).\r
+ * PF13 - PIN13                     (input pullup).\r
+ * PF14 - PIN14                     (input pullup).\r
+ * PF15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOF_MODER             (PIN_MODE_INPUT(GPIOF_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOF_PIN15))\r
+#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))\r
+#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOF_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOF_PIN15))\r
+#define VAL_GPIOF_PUPDR             (PIN_PUPDR_PULLUP(GPIOF_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOF_PIN15))\r
+#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOF_PIN15))\r
+#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN7, 0U))\r
+#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOF_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOF_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOF_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOF_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOF_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOF_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOG setup:\r
+ *\r
+ * PG0  - PIN0                      (input pullup).\r
+ * PG1  - PIN1                      (input pullup).\r
+ * PG2  - PIN2                      (input pullup).\r
+ * PG3  - PIN3                      (input pullup).\r
+ * PG4  - PIN4                      (input pullup).\r
+ * PG5  - PIN5                      (input pullup).\r
+ * PG6  - USB_FS_PWR_EN             (output pushpull minimum).\r
+ * PG7  - USB_FS_OVCR               (input floating).\r
+ * PG8  - PIN8                      (input pullup).\r
+ * PG9  - PIN9                      (input pullup).\r
+ * PG10 - PIN10                     (input pullup).\r
+ * PG11 - RMII_TX_EN                (alternate 11).\r
+ * PG12 - PIN12                     (input pullup).\r
+ * PG13 - RMII_TXD0                 (alternate 11).\r
+ * PG14 - PIN14                     (input pullup).\r
+ * PG15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOG_MODER             (PIN_MODE_INPUT(GPIOG_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN5) |           \\r
+                                     PIN_MODE_OUTPUT(GPIOG_USB_FS_PWR_EN) | \\r
+                                     PIN_MODE_INPUT(GPIOG_USB_FS_OVCR) |    \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN10) |          \\r
+                                     PIN_MODE_ALTERNATE(GPIOG_RMII_TX_EN) | \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN12) |          \\r
+                                     PIN_MODE_ALTERNATE(GPIOG_RMII_TXD0) |  \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOG_PIN15))\r
+#define VAL_GPIOG_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_USB_FS_PWR_EN) |\\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_USB_FS_OVCR) |\\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_RMII_TX_EN) | \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_RMII_TXD0) |  \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN15))\r
+#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOG_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_USB_FS_PWR_EN) |\\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_USB_FS_OVCR) |\\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN10) |      \\r
+                                     PIN_OSPEED_HIGH(GPIOG_RMII_TX_EN) |    \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN12) |      \\r
+                                     PIN_OSPEED_HIGH(GPIOG_RMII_TXD0) |     \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOG_PIN15))\r
+#define VAL_GPIOG_PUPDR             (PIN_PUPDR_PULLUP(GPIOG_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN5) |         \\r
+                                     PIN_PUPDR_FLOATING(GPIOG_USB_FS_PWR_EN) |\\r
+                                     PIN_PUPDR_FLOATING(GPIOG_USB_FS_OVCR) |\\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN10) |        \\r
+                                     PIN_PUPDR_FLOATING(GPIOG_RMII_TX_EN) | \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN12) |        \\r
+                                     PIN_PUPDR_FLOATING(GPIOG_RMII_TXD0) |  \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOG_PIN15))\r
+#define VAL_GPIOG_ODR               (PIN_ODR_HIGH(GPIOG_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN5) |             \\r
+                                     PIN_ODR_LOW(GPIOG_USB_FS_PWR_EN) |     \\r
+                                     PIN_ODR_HIGH(GPIOG_USB_FS_OVCR) |      \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOG_RMII_TX_EN) |       \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOG_RMII_TXD0) |        \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOG_PIN15))\r
+#define VAL_GPIOG_AFRL              (PIN_AFIO_AF(GPIOG_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_USB_FS_PWR_EN, 0U) | \\r
+                                     PIN_AFIO_AF(GPIOG_USB_FS_OVCR, 0U))\r
+#define VAL_GPIOG_AFRH              (PIN_AFIO_AF(GPIOG_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOG_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOG_RMII_TX_EN, 11U) |   \\r
+                                     PIN_AFIO_AF(GPIOG_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOG_RMII_TXD0, 11U) |    \\r
+                                     PIN_AFIO_AF(GPIOG_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOG_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOH setup:\r
+ *\r
+ * PH0  - OSC_IN                    (input floating).\r
+ * PH1  - OSC_OUT                   (input floating).\r
+ * PH2  - PIN2                      (input pullup).\r
+ * PH3  - PIN3                      (input pullup).\r
+ * PH4  - PIN4                      (input pullup).\r
+ * PH5  - PIN5                      (input pullup).\r
+ * PH6  - PIN6                      (input pullup).\r
+ * PH7  - PIN7                      (input pullup).\r
+ * PH8  - PIN8                      (input pullup).\r
+ * PH9  - PIN9                      (input pullup).\r
+ * PH10 - PIN10                     (input pullup).\r
+ * PH11 - PIN11                     (input pullup).\r
+ * PH12 - PIN12                     (input pullup).\r
+ * PH13 - PIN13                     (input pullup).\r
+ * PH14 - PIN14                     (input pullup).\r
+ * PH15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOH_MODER             (PIN_MODE_INPUT(GPIOH_OSC_IN) |         \\r
+                                     PIN_MODE_INPUT(GPIOH_OSC_OUT) |        \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOH_PIN15))\r
+#define VAL_GPIOH_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) |     \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) |    \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOH_PIN15))\r
+#define VAL_GPIOH_OSPEEDR           (PIN_OSPEED_HIGH(GPIOH_OSC_IN) |        \\r
+                                     PIN_OSPEED_HIGH(GPIOH_OSC_OUT) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOH_PIN15))\r
+#define VAL_GPIOH_PUPDR             (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) |     \\r
+                                     PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) |    \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOH_PIN15))\r
+#define VAL_GPIOH_ODR               (PIN_ODR_HIGH(GPIOH_OSC_IN) |           \\r
+                                     PIN_ODR_HIGH(GPIOH_OSC_OUT) |          \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOH_PIN15))\r
+#define VAL_GPIOH_AFRL              (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) |        \\r
+                                     PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) |       \\r
+                                     PIN_AFIO_AF(GPIOH_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN7, 0U))\r
+#define VAL_GPIOH_AFRH              (PIN_AFIO_AF(GPIOH_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOH_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOH_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOH_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOH_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOH_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOH_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOI setup:\r
+ *\r
+ * PI0  - PIN0                      (input pullup).\r
+ * PI1  - PIN1                      (input pullup).\r
+ * PI2  - PIN2                      (input pullup).\r
+ * PI3  - PIN3                      (input pullup).\r
+ * PI4  - PIN4                      (input pullup).\r
+ * PI5  - PIN5                      (input pullup).\r
+ * PI6  - PIN6                      (input pullup).\r
+ * PI7  - PIN7                      (input pullup).\r
+ * PI8  - PIN8                      (input pullup).\r
+ * PI9  - PIN9                      (input pullup).\r
+ * PI10 - PIN10                     (input pullup).\r
+ * PI11 - PIN11                     (input pullup).\r
+ * PI12 - PIN12                     (input pullup).\r
+ * PI13 - PIN13                     (input pullup).\r
+ * PI14 - PIN14                     (input pullup).\r
+ * PI15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOI_MODER             (PIN_MODE_INPUT(GPIOI_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOI_PIN15))\r
+#define VAL_GPIOI_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOI_PIN15))\r
+#define VAL_GPIOI_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOI_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOI_PIN15))\r
+#define VAL_GPIOI_PUPDR             (PIN_PUPDR_PULLUP(GPIOI_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOI_PIN15))\r
+#define VAL_GPIOI_ODR               (PIN_ODR_HIGH(GPIOI_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOI_PIN15))\r
+#define VAL_GPIOI_AFRL              (PIN_AFIO_AF(GPIOI_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN7, 0U))\r
+#define VAL_GPIOI_AFRH              (PIN_AFIO_AF(GPIOI_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOI_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOI_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOI_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOI_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOI_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOI_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOJ setup:\r
+ *\r
+ * PJ0  - PIN0                      (input pullup).\r
+ * PJ1  - PIN1                      (input pullup).\r
+ * PJ2  - PIN2                      (input pullup).\r
+ * PJ3  - PIN3                      (input pullup).\r
+ * PJ4  - PIN4                      (input pullup).\r
+ * PJ5  - PIN5                      (input pullup).\r
+ * PJ6  - PIN6                      (input pullup).\r
+ * PJ7  - PIN7                      (input pullup).\r
+ * PJ8  - PIN8                      (input pullup).\r
+ * PJ9  - PIN9                      (input pullup).\r
+ * PJ10 - PIN10                     (input pullup).\r
+ * PJ11 - PIN11                     (input pullup).\r
+ * PJ12 - PIN12                     (input pullup).\r
+ * PJ13 - PIN13                     (input pullup).\r
+ * PJ14 - PIN14                     (input pullup).\r
+ * PJ15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOJ_MODER             (PIN_MODE_INPUT(GPIOJ_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOJ_PIN15))\r
+#define VAL_GPIOJ_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOJ_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOJ_PIN15))\r
+#define VAL_GPIOJ_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOJ_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOJ_PIN15))\r
+#define VAL_GPIOJ_PUPDR             (PIN_PUPDR_PULLUP(GPIOJ_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOJ_PIN15))\r
+#define VAL_GPIOJ_ODR               (PIN_ODR_HIGH(GPIOJ_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOJ_PIN15))\r
+#define VAL_GPIOJ_AFRL              (PIN_AFIO_AF(GPIOJ_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN7, 0U))\r
+#define VAL_GPIOJ_AFRH              (PIN_AFIO_AF(GPIOJ_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOJ_PIN15, 0U))\r
+\r
+/*\r
+ * GPIOK setup:\r
+ *\r
+ * PK0  - PIN0                      (input pullup).\r
+ * PK1  - PIN1                      (input pullup).\r
+ * PK2  - PIN2                      (input pullup).\r
+ * PK3  - PIN3                      (input pullup).\r
+ * PK4  - PIN4                      (input pullup).\r
+ * PK5  - PIN5                      (input pullup).\r
+ * PK6  - PIN6                      (input pullup).\r
+ * PK7  - PIN7                      (input pullup).\r
+ * PK8  - PIN8                      (input pullup).\r
+ * PK9  - PIN9                      (input pullup).\r
+ * PK10 - PIN10                     (input pullup).\r
+ * PK11 - PIN11                     (input pullup).\r
+ * PK12 - PIN12                     (input pullup).\r
+ * PK13 - PIN13                     (input pullup).\r
+ * PK14 - PIN14                     (input pullup).\r
+ * PK15 - PIN15                     (input pullup).\r
+ */\r
+#define VAL_GPIOK_MODER             (PIN_MODE_INPUT(GPIOK_PIN0) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN1) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN2) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN3) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN4) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN5) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN6) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN7) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN8) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN9) |           \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN10) |          \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN11) |          \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN12) |          \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN13) |          \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN14) |          \\r
+                                     PIN_MODE_INPUT(GPIOK_PIN15))\r
+#define VAL_GPIOK_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOK_PIN0) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN1) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN2) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN3) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN4) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN5) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN6) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN7) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN8) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN9) |       \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN10) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN11) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN12) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN13) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN14) |      \\r
+                                     PIN_OTYPE_PUSHPULL(GPIOK_PIN15))\r
+#define VAL_GPIOK_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOK_PIN0) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN1) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN2) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN3) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN4) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN5) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN6) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN7) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN8) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN9) |       \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN10) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN11) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN12) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN13) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN14) |      \\r
+                                     PIN_OSPEED_VERYLOW(GPIOK_PIN15))\r
+#define VAL_GPIOK_PUPDR             (PIN_PUPDR_PULLUP(GPIOK_PIN0) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN1) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN2) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN3) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN4) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN5) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN6) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN7) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN8) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN9) |         \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN10) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN11) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN12) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN13) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN14) |        \\r
+                                     PIN_PUPDR_PULLUP(GPIOK_PIN15))\r
+#define VAL_GPIOK_ODR               (PIN_ODR_HIGH(GPIOK_PIN0) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN1) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN2) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN3) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN4) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN5) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN6) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN7) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN8) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN9) |             \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN10) |            \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN11) |            \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN12) |            \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN13) |            \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN14) |            \\r
+                                     PIN_ODR_HIGH(GPIOK_PIN15))\r
+#define VAL_GPIOK_AFRL              (PIN_AFIO_AF(GPIOK_PIN0, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN1, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN2, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN3, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN4, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN5, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN6, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN7, 0U))\r
+#define VAL_GPIOK_AFRH              (PIN_AFIO_AF(GPIOK_PIN8, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN9, 0U) |          \\r
+                                     PIN_AFIO_AF(GPIOK_PIN10, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOK_PIN11, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOK_PIN12, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOK_PIN13, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOK_PIN14, 0U) |         \\r
+                                     PIN_AFIO_AF(GPIOK_PIN15, 0U))\r
+\r
+/*===========================================================================*/\r
+/* External declarations.                                                    */\r
+/*===========================================================================*/\r
+\r
+#if !defined(_FROM_ASM_)\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+  void boardInit(void);\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+#endif /* _FROM_ASM_ */\r
+\r
+#endif /* BOARD_H */\r

diff --git a/board/board.mk b/board/board.mk
new file mode 100644 (file)
index 0000000..b410cdb
--- /dev/null
+++ b/board/board.mk
@@ -0,0 +1,9 @@
+# List of all the board related files.\r
+BOARDSRC = ./board/board.c\r
+\r
+# Required include directories\r
+BOARDINC = ./board\r
+\r
+# Shared variables\r
+ALLCSRC += $(BOARDSRC)\r
+ALLINC  += $(BOARDINC)\r