adc measures vdd; sleep mode for 1.1mA idd

diff --git a/cfg/halconf.h b/cfg/halconf.h
index fe4c478846760424c15154769d93af70c8c0d321..5cdb5e0ecf407dc28830a0f872eb25b1c81d46c9 100644 (file)
--- a/cfg/halconf.h
+++ b/cfg/halconf.h
@@ -44,7 +44,7 @@
  * @brief   Enables the ADC subsystem.\r
  */\r
 #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)\r
-#define HAL_USE_ADC                         FALSE\r
+#define HAL_USE_ADC                         TRUE\r
 #endif\r
 \r
 /**\r

diff --git a/cfg/mcuconf.h b/cfg/mcuconf.h
index f02fe109a7249e6f1623d398e53f39a79cecfa9a..19caa57ebb546d98cc65b80d9219cb55de6617c6 100644 (file)
--- a/cfg/mcuconf.h
+++ b/cfg/mcuconf.h
@@ -42,18 +42,18 @@
 #define STM32_VOS                           STM32_VOS_1P8\r
 #define STM32_PVD_ENABLE                    FALSE\r
 #define STM32_PLS                           STM32_PLS_LEV0\r
-#define STM32_HSI16_ENABLED                 FALSE\r
+#define STM32_HSI16_ENABLED                 TRUE\r
 #define STM32_HSI16_DIVIDER_ENABLED         FALSE\r
 #define STM32_LSI_ENABLED                   TRUE\r
 #define STM32_HSE_ENABLED                   FALSE\r
 #define STM32_LSE_ENABLED                   FALSE\r
-#define STM32_ADC_CLOCK_ENABLED             FALSE\r
-#define STM32_MSIRANGE                      STM32_MSIRANGE_2M\r
-#define STM32_SW                            STM32_SW_MSI\r
+//#define STM32_ADC_CLOCK_ENABLED             FALSE\r
+#define STM32_MSIRANGE                      STM32_MSIRANGE_4M\r
+#define STM32_SW                            STM32_SW_HSI16\r
 #define STM32_PLLSRC                        STM32_PLLSRC_HSI16\r
 #define STM32_PLLMUL_VALUE                  4\r
 #define STM32_PLLDIV_VALUE                  2\r
-#define STM32_HPRE                          STM32_HPRE_DIV1\r
+#define STM32_HPRE                          STM32_HPRE_DIV4\r
 #define STM32_PPRE1                         STM32_PPRE1_DIV1\r
 #define STM32_PPRE2                         STM32_PPRE2_DIV1\r
 #define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK\r
@@ -85,7 +85,7 @@
  * ADC driver system settings.\r
  * Note, IRQ is shared with EXT channels 21 and 22.\r
  */\r
-#define STM32_ADC_USE_ADC1                  FALSE\r
+#define STM32_ADC_USE_ADC1                  TRUE\r
 #define STM32_ADC_ADC1_CKMODE               STM32_ADC_CKMODE_ADCCLK\r
 #define STM32_ADC_ADC1_DMA_PRIORITY         2\r
 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2\r

diff --git a/dogs.c b/dogs.c
index b401c3959b9bd4224ca3ddf77036153a1df70738..a2d3bafc75b1faa9815647fb27b76f43a40fb20a 100644 (file)
--- a/dogs.c
+++ b/dogs.c
@@ -212,3 +212,121 @@ void draw_bitmap(int x, int y, const unsigned char *buffer)
     }
 }
 
+static const unsigned char draw_number_bitmaps[10][10] = {
+    { 8, 8, // '0'
+        0b00011000,
+        0b00100100,
+        0b01000010,
+        0b01000010,
+        0b01000010,
+        0b01000010,
+        0b00100100,
+        0b00011000,
+    },
+    { 8, 8, // '1'
+        0b00011000,
+        0b00101000,
+        0b00001000,
+        0b00001000,
+        0b00001000,
+        0b00001000,
+        0b00001000,
+        0b00111110,
+    },
+    { 8, 8, // '2'
+        0b00011000,
+        0b00100100,
+        0b01000010,
+        0b00000010,
+        0b00000100,
+        0b00001000,
+        0b00010000,
+        0b01111110,
+    },
+    { 8, 8, // '3'
+        0b00111000,
+        0b01000100,
+        0b00000010,
+        0b00111100,
+        0b00000100,
+        0b00000010,
+        0b01000100,
+        0b00111000,
+    },
+    { 8, 8, // '4'
+        0b00000100,
+        0b00001100,
+        0b00010100,
+        0b00100100,
+        0b01111100,
+        0b00000100,
+        0b00000100,
+        0b00000100,
+    },
+    { 8, 8, // '5'
+        0b01111110,
+        0b01000000,
+        0b01111000,
+        0b00000100,
+        0b00000010,
+        0b00000010,
+        0b01000100,
+        0b00111000,
+    },
+    { 8, 8, // '6'
+        0b00011100,
+        0b00100000,
+        0b01000000,
+        0b01011100,
+        0b01100010,
+        0b01000010,
+        0b00100100,
+        0b00011000,
+    },
+    { 8, 8, // '7'
+        0b01111110,
+        0b00000010,
+        0b00000100,
+        0b00001000,
+        0b00010000,
+        0b00010000,
+        0b00010000,
+        0b00010000,
+    },
+    { 8, 8, // '8'
+        0b00011000,
+        0b00100100,
+        0b01000010,
+        0b00111100,
+        0b00100100,
+        0b01000010,
+        0b00100100,
+        0b00011000,
+    },
+    { 8, 8, // '9'
+        0b00011000,
+        0b00100100,
+        0b01000010,
+        0b00100010,
+        0b00011110,
+        0b00000010,
+        0b01000100,
+        0b00111000,
+    },
+};
+
+void draw_number(int x, int y, int number)
+{
+    if (number < 0)
+        number = -number;
+    int tmp = number;
+    int count;
+    for (count = 0; tmp; count++)
+        tmp /= 10;
+    x += count * 8;
+    do {
+        x -= 8;
+        draw_bitmap(x, y, draw_number_bitmaps[number % 10]);
+    } while (number /= 10);
+}
+

diff --git a/dogs.h b/dogs.h
index 1ae24bb089b4205df12398fafc9584761dd62912..d30c6fa671bfd6595d024fe1c9dae6b35417b4b1 100644 (file)
--- a/dogs.h
+++ b/dogs.h
@@ -23,6 +23,7 @@ void dogs_flush();
 
 void draw_pixel(int x, int y, bool state);
 void draw_bitmap(int x, int y, const unsigned char *buffer);
+void draw_number(int x, int y, int number);
 
 #endif // DOGS_H_
 

diff --git a/main.c b/main.c
index e7949a8c38e5b5ee4f97c64b48a89ffc7b782b4c..9d7001099e08d547d25ca283e65324859c0456fa 100644 (file)
--- a/main.c
+++ b/main.c
@@ -19,8 +19,47 @@
  *  - Serial through LPUART1 works (38400 baud, takes over swdio pins)
  *  - Display comm. over SPI, can clear screen
  *  - Can read buttons through PAL (through interrupts now)
+ *  - Use ADC to read Vintref, print to screen in mV
+ *  - Sleep mode via WFI, saves ~0.5mA (we're running around 1.1mA)
  */
 
+static volatile bool adc_is_complete = false;
+static void adc_callback(ADCDriver *adcp)
+{
+    adc_is_complete = true;
+}
+
+static const ADCConfig adccfg = {
+    .dummy = 0
+};
+
+static const ADCConversionGroup adcgrpcfg = {
+  .circular     = false,
+  .num_channels = 1,
+  .end_cb       = adc_callback,
+  .error_cb     = NULL,
+  .cfgr1        = ADC_CFGR1_RES_12BIT,     /* CFGR1 */
+  .cfgr2        = 0,                       /* CFGR2 */
+  .tr           = ADC_TR(0, 0),            /* TR */
+  .smpr         = ADC_SMPR_SMP_1P5,        /* SMPR */
+  .chselr       = ADC_CHSELR_CHSEL17       /* CHSELR */
+};
+
+static int readVddmv()
+{
+    adcsample_t reading = 0;
+
+    adcStart(&ADCD1, &adccfg);
+    adcSTM32EnableVREF(&ADCD1);
+    adcStartConversion(&ADCD1, &adcgrpcfg, &reading, 1);
+    while (!adc_is_complete);
+    adcStopConversion(&ADCD1);
+    adcSTM32DisableVREF(&ADCD1);
+    adcStop(&ADCD1);
+
+    return 3000 * /* CAL */ *((adcsample_t *)0x1FF80078) / reading;
+}
+
 THD_WORKING_AREA(waThread2, 96);
 THD_FUNCTION(Thread2, arg)
 {
@@ -42,6 +81,8 @@ THD_FUNCTION(Thread2, arg)
 
 
     int x = 0, y = 0;
+    int counter = 0;
+    int mv = readVddmv();
     while (1) {
         chThdSleepMilliseconds(100);
 
@@ -55,8 +96,14 @@ THD_FUNCTION(Thread2, arg)
         else if ((b & (BUTTON_JOYDL | BUTTON_JOYUL)) == (BUTTON_JOYDL | BUTTON_JOYUL))
             x--;
 
+        if (++counter == 50) {
+            counter = 0;
+            mv = readVddmv();
+        }
+
         dogs_clear();
         draw_bitmap(x, y, testbitmap);
+        draw_number(0, 50, mv);
         dogs_flush();
     }
 }
@@ -69,6 +116,7 @@ int main(void)
 {
     halInit();
     chSysInit();
+    RCC->CFGR |= RCC_CFGR_STOPWUCK;
 
     buttons_init();
 
@@ -85,7 +133,8 @@ int main(void)
        task but YOU MUST NEVER TRY TO SLEEP OR WAIT in this loop. Note that
        this tasks runs at the lowest priority level so any instruction added
        here will be executed after all other tasks have been started. */
-    while (1);
+    while (1)
+        asm("wfi");
 }
 
 void HardFault_Handler()