static void serputs(const char *s);
static void printint(DoubleCell n, char *buf);
+static void initGPIO();
+static void initClock();
+static void initUART();
+static void Software_Trim();
+#define MCLK_FREQ_MHZ (8) // MCLK = 8MHz
+
int main()
{
WDTCTL = WDTPW | WDTHOLD;
- DCOCTL = 0;
- BCSCTL1 = CALBC1_16MHZ;
- DCOCTL = CALDCO_16MHZ;
-
- P1SEL |= BIT1 | BIT2;
- P1SEL2 |= BIT1 | BIT2;
-
- UCA0CTL1 = UCSWRST;
- UCA0CTL1 |= UCSSEL_2;
- UCA0BR0 = 139;
- UCA0BR1 = 0;
- UCA0MCTL = UCBRS0;
- UCA0CTL1 &= (uint8_t)~UCSWRST;
-
- __enable_interrupt();
+ initGPIO();
+ initClock();
+ initUART();
static SplitMemDict<alee_dat_len> dict (alee_dat);
State state (dict, readchar);
auto ptr = strbuf;
while (1) {
- if (IFG2 & UCA0RXIFG) {
- char c = UCA0RXBUF;
+ if (UCA0IFG & UCRXIFG) {
+ auto c = static_cast<char>(UCA0RXBUF);
serput(c);
if (c == '\r') {
}
}
-static void readchar(State& state)
+void readchar(State& state)
{
auto idx = state.dict.read(Dictionary::Input);
Addr addr = Dictionary::Input + sizeof(Cell) + idx;
- while (!(IFG2 & UCA0RXIFG));
- auto c = UCA0RXBUF;
+ while (!(UCA0IFG & UCRXIFG));
+ auto c = static_cast<uint8_t>(UCA0RXBUF);
if (isupper(c))
c += 32;
state.dict.writebyte(addr, c ? c : ' ');
void serput(int c)
{
- while (!(IFG2 & UCA0TXIFG));
- UCA0TXBUF = (char)c;
+ while (!(UCA0IFG & UCTXIFG));
+ UCA0TXBUF = static_cast<char>(c);
}
void serputs(const char *s)
n = -n;
do {
- *ptr++ = (char)(n % 10) + '0';
+ *ptr++ = static_cast<char>((n % 10) + '0');
} while ((n /= 10));
if (neg)
}
}
-extern "C" int atexit(void (*)()) { return 0; }
-void operator delete(void *) {}
-void operator delete(void *, std::size_t) {}
+void initGPIO()
+{
+ // Unnecessary, but done by TI example
+ P1DIR = 0xFF; P2DIR = 0xFF;
+ P1REN = 0xFF; P2REN = 0xFF;
+ P1OUT = 0x00; P2OUT = 0x00;
+
+ // Set LED pins to outputs
+ P6DIR |= BIT0 | BIT1 | BIT2;
+ P6OUT |= BIT0 | BIT1 | BIT2;
+ P5DIR |= BIT5 | BIT6 | BIT7;
+ P5OUT |= BIT5 | BIT6 | BIT7;
+
+ // Allow GPIO configurations to be applied
+ PM5CTL0 &= ~LOCKLPM5;
+
+ // Safety measure, prevent unwarranted interrupts
+ P5IFG = 0;
+ P6IFG = 0;
+}
+
+void initClock()
+{
+ __bis_SR_register(SCG0); // disable FLL
+ CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
+ CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
+ CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
+ __delay_cycles(3);
+ __bic_SR_register(SCG0); // enable FLL
+ Software_Trim(); // Software Trim to get the best DCOFTRIM value
+
+ CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
+ // default DCODIV as MCLK and SMCLK source
+}
+
+void initUART()
+{
+ // Configure UART pins
+ P5SEL0 |= BIT1 | BIT2; // set 2-UART pin as second function
+ SYSCFG3|=USCIA0RMP; //Set the remapping source
+ // Configure UART
+ UCA0CTLW0 |= UCSWRST;
+ UCA0CTLW0 |= UCSSEL__SMCLK;
+
+ // Baud Rate calculation
+ // 8000000/(16*9600) = 52.083
+ // Fractional portion = 0.083
+ // User's Guide Table 17-4: UCBRSx = 0x49
+ // UCBRFx = int ( (52.083-52)*16) = 1
+ UCA0BR0 = 52; // 8000000/16/9600
+ UCA0BR1 = 0x00;
+ UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;
+
+ UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
+}
+
+void Software_Trim()
+{
+ unsigned int oldDcoTap = 0xffff;
+ unsigned int newDcoTap = 0xffff;
+ unsigned int newDcoDelta = 0xffff;
+ unsigned int bestDcoDelta = 0xffff;
+ unsigned int csCtl0Copy = 0;
+ unsigned int csCtl1Copy = 0;
+ unsigned int csCtl0Read = 0;
+ unsigned int csCtl1Read = 0;
+ unsigned int dcoFreqTrim = 3;
+ unsigned char endLoop = 0;
+
+ do
+ {
+ CSCTL0 = 0x100; // DCO Tap = 256
+ do
+ {
+ CSCTL7 &= ~DCOFFG; // Clear DCO fault flag
+ }while (CSCTL7 & DCOFFG); // Test DCO fault flag
+
+ __delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
+ // Suggest to wait 24 cycles of divided FLL reference clock
+ while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));
+
+ csCtl0Read = CSCTL0; // Read CSCTL0
+ csCtl1Read = CSCTL1; // Read CSCTL1
+
+ oldDcoTap = newDcoTap; // Record DCOTAP value of last time
+ newDcoTap = csCtl0Read & 0x01ff; // Get DCOTAP value of this time
+ dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value
+
+ if(newDcoTap < 256) // DCOTAP < 256
+ {
+ newDcoDelta = 256 - newDcoTap; // Delta value between DCPTAP and 256
+ if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
+ endLoop = 1; // Stop while loop
+ else
+ {
+ dcoFreqTrim--;
+ CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
+ }
+ }
+ else // DCOTAP >= 256
+ {
+ newDcoDelta = newDcoTap - 256; // Delta value between DCPTAP and 256
+ if(oldDcoTap < 256) // DCOTAP cross 256
+ endLoop = 1; // Stop while loop
+ else
+ {
+ dcoFreqTrim++;
+ CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
+ }
+ }
+
+ if(newDcoDelta < bestDcoDelta) // Record DCOTAP closest to 256
+ {
+ csCtl0Copy = csCtl0Read;
+ csCtl1Copy = csCtl1Read;
+ bestDcoDelta = newDcoDelta;
+ }
+
+ }while(endLoop == 0); // Poll until endLoop == 1
+
+ CSCTL0 = csCtl0Copy; // Reload locked DCOTAP
+ CSCTL1 = csCtl1Copy; // Reload locked DCOFTRIM
+ while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
+}
+
--- /dev/null
+/* ============================================================================ */\r
+/* Copyright (c) 2021, Texas Instruments Incorporated */\r
+/* All rights reserved. */\r
+/* */\r
+/* Redistribution and use in source and binary forms, with or without */\r
+/* modification, are permitted provided that the following conditions */\r
+/* are met: */\r
+/* */\r
+/* * Redistributions of source code must retain the above copyright */\r
+/* notice, this list of conditions and the following disclaimer. */\r
+/* */\r
+/* * Redistributions in binary form must reproduce the above copyright */\r
+/* notice, this list of conditions and the following disclaimer in the */\r
+/* documentation and/or other materials provided with the distribution. */\r
+/* */\r
+/* * Neither the name of Texas Instruments Incorporated nor the names of */\r
+/* its contributors may be used to endorse or promote products derived */\r
+/* from this software without specific prior written permission. */\r
+/* */\r
+/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */\r
+/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */\r
+/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */\r
+/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */\r
+/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */\r
+/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */\r
+/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */\r
+/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */\r
+/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */\r
+/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */\r
+/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */\r
+/* ============================================================================ */\r
+\r
+/* This file supports MSP430FR2476 devices. */\r
+/* Version: 1.212 */\r
+/* Default linker script, for normal executables */\r
+\r
+OUTPUT_ARCH(msp430)\r
+ENTRY(_start)\r
+\r
+MEMORY {\r
+ TINYRAM : ORIGIN = 0x0006, LENGTH = 0x001A /* END=0x001F, size 26 */\r
+ BSL0 : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x17FF, size 2048 */\r
+ TLVMEM : ORIGIN = 0x1A00, LENGTH = 0x0200 /* END=0x1BFF, size 512 */\r
+ BOOTCODE : ORIGIN = 0x1C00, LENGTH = 0x0400 /* END=0x1FFF, size 1024 */\r
+ ROMLIB : ORIGIN = 0xC0000, LENGTH = 0x4000 /* END=0xC3FFF, size 16384 */\r
+ BSL1 : ORIGIN = 0xFFC00, LENGTH = 0x0400 /* END=0xFFFFF, size 1024 */\r
+ RAM : ORIGIN = 0x2000, LENGTH = 0x2000 /* END=0x3FFF, size 8192 */\r
+ INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 */\r
+ FRAM (rx) : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */\r
+ HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00007FFF\r
+ JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004\r
+ BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004\r
+ BSLCONFIGURATIONSIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0002\r
+ BSLCONFIGURATION : ORIGIN = 0xFF8A, LENGTH = 0x0002\r
+ BSLI2CADDRESS : ORIGIN = 0xFFA0, LENGTH = 0x0002\r
+ VECT0 : ORIGIN = 0xFFA2, LENGTH = 0x0002\r
+ VECT1 : ORIGIN = 0xFFA4, LENGTH = 0x0002\r
+ VECT2 : ORIGIN = 0xFFA6, LENGTH = 0x0002\r
+ VECT3 : ORIGIN = 0xFFA8, LENGTH = 0x0002\r
+ VECT4 : ORIGIN = 0xFFAA, LENGTH = 0x0002\r
+ VECT5 : ORIGIN = 0xFFAC, LENGTH = 0x0002\r
+ VECT6 : ORIGIN = 0xFFAE, LENGTH = 0x0002\r
+ VECT7 : ORIGIN = 0xFFB0, LENGTH = 0x0002\r
+ VECT8 : ORIGIN = 0xFFB2, LENGTH = 0x0002\r
+ VECT9 : ORIGIN = 0xFFB4, LENGTH = 0x0002\r
+ VECT10 : ORIGIN = 0xFFB6, LENGTH = 0x0002\r
+ VECT11 : ORIGIN = 0xFFB8, LENGTH = 0x0002\r
+ VECT12 : ORIGIN = 0xFFBA, LENGTH = 0x0002\r
+ VECT13 : ORIGIN = 0xFFBC, LENGTH = 0x0002\r
+ VECT14 : ORIGIN = 0xFFBE, LENGTH = 0x0002\r
+ VECT15 : ORIGIN = 0xFFC0, LENGTH = 0x0002\r
+ VECT16 : ORIGIN = 0xFFC2, LENGTH = 0x0002\r
+ VECT17 : ORIGIN = 0xFFC4, LENGTH = 0x0002\r
+ VECT18 : ORIGIN = 0xFFC6, LENGTH = 0x0002\r
+ VECT19 : ORIGIN = 0xFFC8, LENGTH = 0x0002\r
+ VECT20 : ORIGIN = 0xFFCA, LENGTH = 0x0002\r
+ VECT21 : ORIGIN = 0xFFCC, LENGTH = 0x0002\r
+ VECT22 : ORIGIN = 0xFFCE, LENGTH = 0x0002\r
+ VECT23 : ORIGIN = 0xFFD0, LENGTH = 0x0002\r
+ VECT24 : ORIGIN = 0xFFD2, LENGTH = 0x0002\r
+ VECT25 : ORIGIN = 0xFFD4, LENGTH = 0x0002\r
+ VECT26 : ORIGIN = 0xFFD6, LENGTH = 0x0002\r
+ VECT27 : ORIGIN = 0xFFD8, LENGTH = 0x0002\r
+ VECT28 : ORIGIN = 0xFFDA, LENGTH = 0x0002\r
+ VECT29 : ORIGIN = 0xFFDC, LENGTH = 0x0002\r
+ VECT30 : ORIGIN = 0xFFDE, LENGTH = 0x0002\r
+ VECT31 : ORIGIN = 0xFFE0, LENGTH = 0x0002\r
+ VECT32 : ORIGIN = 0xFFE2, LENGTH = 0x0002\r
+ VECT33 : ORIGIN = 0xFFE4, LENGTH = 0x0002\r
+ VECT34 : ORIGIN = 0xFFE6, LENGTH = 0x0002\r
+ VECT35 : ORIGIN = 0xFFE8, LENGTH = 0x0002\r
+ VECT36 : ORIGIN = 0xFFEA, LENGTH = 0x0002\r
+ VECT37 : ORIGIN = 0xFFEC, LENGTH = 0x0002\r
+ VECT38 : ORIGIN = 0xFFEE, LENGTH = 0x0002\r
+ VECT39 : ORIGIN = 0xFFF0, LENGTH = 0x0002\r
+ VECT40 : ORIGIN = 0xFFF2, LENGTH = 0x0002\r
+ VECT41 : ORIGIN = 0xFFF4, LENGTH = 0x0002\r
+ VECT42 : ORIGIN = 0xFFF6, LENGTH = 0x0002\r
+ VECT43 : ORIGIN = 0xFFF8, LENGTH = 0x0002\r
+ VECT44 : ORIGIN = 0xFFFA, LENGTH = 0x0002\r
+ VECT45 : ORIGIN = 0xFFFC, LENGTH = 0x0002\r
+ RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002\r
+}\r
+\r
+SECTIONS\r
+{\r
+ .jtagsignature : {} > JTAGSIGNATURE\r
+ .bslsignature : {} > BSLSIGNATURE\r
+ .bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE\r
+ .bslconfig : {} > BSLCONFIGURATION\r
+ .bsli2caddress : {} > BSLI2CADDRESS\r
+\r
+ __interrupt_vector_0 : { KEEP (*(__interrupt_vector_0 )) } > VECT0\r
+ __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1\r
+ __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2\r
+ __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3\r
+ __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4\r
+ __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5\r
+ __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6\r
+ __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7\r
+ __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8\r
+ __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9\r
+ __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10\r
+ __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11\r
+ __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12\r
+ __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13\r
+ __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14\r
+ __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15\r
+ __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16\r
+ __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17\r
+ __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18\r
+ __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19\r
+ __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_ecomp0)) } > VECT20\r
+ __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_port6)) } > VECT21\r
+ __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_port5)) } > VECT22\r
+ __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_port4)) } > VECT23\r
+ __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_port3)) } > VECT24\r
+ __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_port2)) } > VECT25\r
+ __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port1)) } > VECT26\r
+ __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_adc)) } > VECT27\r
+ __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT28\r
+ __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT29\r
+ __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT30\r
+ __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT31\r
+ __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_wdt)) } > VECT32\r
+ __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_rtc)) } > VECT33\r
+ __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT34\r
+ __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT35\r
+ __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT36\r
+ __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT37\r
+ __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38\r
+ __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39\r
+ __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40\r
+ __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41\r
+ __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT42\r
+ __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT43\r
+ __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_unmi)) } > VECT44\r
+ __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT45\r
+ __reset_vector :\r
+ {\r
+ KEEP (*(__interrupt_vector_46))\r
+ KEEP (*(__interrupt_vector_reset))\r
+ KEEP (*(.resetvec))\r
+ } > RESETVEC\r
+\r
+ .lower.rodata :\r
+ {\r
+ . = ALIGN(2);\r
+ *(.lower.rodata.* .lower.rodata)\r
+ } > FRAM\r
+\r
+ .rodata :\r
+ {\r
+ . = ALIGN(2);\r
+ *(.plt)\r
+ *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)\r
+ *(.rodata1)\r
+ KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)\r
+ } > FRAM\r
+\r
+ /* Note: This is a separate .rodata section for sections which are\r
+ read only but which older linkers treat as read-write.\r
+ This prevents older linkers from marking the entire .rodata\r
+ section as read-write. */\r
+ .rodata2 :\r
+ {\r
+ . = ALIGN(2);\r
+ PROVIDE (__preinit_array_start = .);\r
+ KEEP (*(.preinit_array))\r
+ PROVIDE (__preinit_array_end = .);\r
+ . = ALIGN(2);\r
+ PROVIDE (__init_array_start = .);\r
+ KEEP (*(SORT(.init_array.*)))\r
+ KEEP (*(.init_array))\r
+ PROVIDE (__init_array_end = .);\r
+ . = ALIGN(2);\r
+ PROVIDE (__fini_array_start = .);\r
+ KEEP (*(.fini_array))\r
+ KEEP (*(SORT(.fini_array.*)))\r
+ PROVIDE (__fini_array_end = .);\r
+ . = ALIGN(2);\r
+ *(.eh_frame_hdr)\r
+ KEEP (*(.eh_frame))\r
+\r
+ /* gcc uses crtbegin.o to find the start of the constructors, so\r
+ we make sure it is first. Because this is a wildcard, it\r
+ doesn't matter if the user does not actually link against\r
+ crtbegin.o; the linker won't look for a file to match a\r
+ wildcard. The wildcard also means that it doesn't matter which\r
+ directory crtbegin.o is in. */\r
+ KEEP (*crtbegin*.o(.ctors))\r
+\r
+ /* We don't want to include the .ctor section from the crtend.o\r
+ file until after the sorted ctors. The .ctor section from\r
+ the crtend file contains the end of ctors marker and it must\r
+ be last */\r
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))\r
+ KEEP (*(SORT(.ctors.*)))\r
+ KEEP (*(.ctors))\r
+\r
+ KEEP (*crtbegin*.o(.dtors))\r
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))\r
+ KEEP (*(SORT(.dtors.*)))\r
+ KEEP (*(.dtors))\r
+ } > FRAM\r
+\r
+ .upper.rodata :\r
+ {\r
+ *(.upper.rodata.* .upper.rodata)\r
+ } > HIFRAM\r
+\r
+ /* This section contains data that is initialised during load\r
+ but not on application reset. */\r
+ .persistent :\r
+ {\r
+ . = ALIGN(2);\r
+ PROVIDE (__persistent_start = .);\r
+ *(.persistent)\r
+ . = ALIGN(2);\r
+ PROVIDE (__persistent_end = .);\r
+ } > FRAM\r
+\r
+ .tinyram : {} > TINYRAM\r
+\r
+ .lower.data :\r
+ {\r
+ . = ALIGN(2);\r
+ PROVIDE (__datastart = .);\r
+ *(.lower.data.* .lower.data)\r
+ } > RAM AT> FRAM\r
+\r
+ .data :\r
+ {\r
+ . = ALIGN(2);\r
+\r
+ KEEP (*(.jcr))\r
+ *(.data.rel.ro.local) *(.data.rel.ro*)\r
+ *(.dynamic)\r
+\r
+ *(.data .data.* .gnu.linkonce.d.*)\r
+ KEEP (*(.gnu.linkonce.d.*personality*))\r
+ SORT(CONSTRUCTORS)\r
+ *(.data1)\r
+ *(.got.plt) *(.got)\r
+\r
+ /* We want the small data sections together, so single-instruction offsets\r
+ can access them all, and initialized data all before uninitialized, so\r
+ we can shorten the on-disk segment size. */\r
+ . = ALIGN(2);\r
+ *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)\r
+\r
+ . = ALIGN(2);\r
+\r
+ _edata = .;\r
+ PROVIDE (edata = .);\r
+ PROVIDE (__dataend = .);\r
+ } > RAM AT> FRAM\r
+\r
+ /* Note that crt0 assumes this is a multiple of two; all the\r
+ start/stop symbols are also assumed word-aligned. */\r
+ PROVIDE(__romdatastart = LOADADDR(.lower.data));\r
+ PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));\r
+\r
+ .upper.data :\r
+ {\r
+ __upper_data_init = LOADADDR (.upper.data);\r
+ /* Status word. */\r
+ SHORT(1);\r
+ __high_datastart = .;\r
+ *(.upper.data.* .upper.data)\r
+ __high_dataend = .;\r
+ } > HIFRAM AT> FRAM\r
+\r
+ __rom_highdatacopysize = SIZEOF(.upper.data) - 2;\r
+ __rom_highdatastart = LOADADDR(.upper.data) + 2;\r
+\r
+ .lower.bss :\r
+ {\r
+ . = ALIGN(2);\r
+ PROVIDE (__bssstart = .);\r
+ *(.lower.bss.* .lower.bss)\r
+ } > RAM\r
+\r
+ .bss :\r
+ {\r
+ . = ALIGN(2);\r
+ *(.dynbss)\r
+ *(.sbss .sbss.*)\r
+ *(.bss .bss.* .gnu.linkonce.b.*)\r
+ . = ALIGN(2);\r
+ *(COMMON)\r
+ PROVIDE (__bssend = .);\r
+ } > RAM\r
+ PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));\r
+\r
+ .upper.bss :\r
+ {\r
+ . = ALIGN(2);\r
+ __high_bssstart = .;\r
+ *(.upper.bss.* .upper.bss)\r
+ . = ALIGN(2);\r
+ __high_bssend = .;\r
+ } > HIFRAM\r
+ __high_bsssize = SIZEOF(.upper.bss);\r
+\r
+ /* This section contains data that is not initialised during load\r
+ or application reset. */\r
+ .noinit (NOLOAD) :\r
+ {\r
+ . = ALIGN(2);\r
+ PROVIDE (__noinit_start = .);\r
+ *(.noinit)\r
+ . = ALIGN(2);\r
+ PROVIDE (__noinit_end = .);\r
+ } > RAM\r
+\r
+ /* We create this section so that "end" will always be in the\r
+ RAM region (matching .stack below), even if the .bss\r
+ section is empty. */\r
+ .heap (NOLOAD) :\r
+ {\r
+ . = ALIGN(2);\r
+ __heap_start__ = .;\r
+ _end = __heap_start__;\r
+ PROVIDE (end = .);\r
+ KEEP (*(.heap))\r
+ _end = .;\r
+ PROVIDE (end = .);\r
+ /* This word is here so that the section is not empty, and thus\r
+ not discarded by the linker. The actual value does not matter\r
+ and is ignored. */\r
+ LONG(0);\r
+ __heap_end__ = .;\r
+ __HeapLimit = __heap_end__;\r
+ } > RAM\r
+ /* WARNING: Do not place anything in RAM here.\r
+ The heap section must be the last section in RAM and the stack\r
+ section must be placed at the very end of the RAM region. */\r
+\r
+ .stack (ORIGIN (RAM) + LENGTH(RAM)) :\r
+ {\r
+ PROVIDE (__stack = .);\r
+ *(.stack)\r
+ }\r
+\r
+ .lower.text :\r
+ {\r
+ . = ALIGN(2);\r
+ *(.lower.text.* .lower.text)\r
+ } > FRAM\r
+\r
+ .text :\r
+ {\r
+ PROVIDE (_start = .);\r
+\r
+ . = ALIGN(2);\r
+ KEEP (*(SORT(.crt_*)))\r
+\r
+ . = ALIGN(2);\r
+ KEEP (*(.lowtext))\r
+\r
+ . = ALIGN(2);\r
+ *(.text .stub .text.* .gnu.linkonce.t.* .text:*)\r
+\r
+ KEEP (*(.text.*personality*))\r
+ /* .gnu.warning sections are handled specially by elf32.em. */\r
+ *(.gnu.warning)\r
+ *(.interp .hash .dynsym .dynstr .gnu.version*)\r
+ PROVIDE (__etext = .);\r
+ PROVIDE (_etext = .);\r
+ PROVIDE (etext = .);\r
+ . = ALIGN(2);\r
+ KEEP (*(.init))\r
+ KEEP (*(.fini))\r
+ KEEP (*(.tm_clone_table))\r
+ } > FRAM\r
+\r
+ .upper.text :\r
+ {\r
+ . = ALIGN(2);\r
+ *(.upper.text.* .upper.text)\r
+ } > HIFRAM\r
+\r
+ .info (NOLOAD) : {} > INFOMEM /* MSP430 INFO FLASH MEMORY SEGMENTS */\r
+\r
+ /* The rest are all not normally part of the runtime image. */\r
+\r
+ .MSP430.attributes 0 :\r
+ {\r
+ KEEP (*(.MSP430.attributes))\r
+ KEEP (*(.gnu.attributes))\r
+ KEEP (*(__TI_build_attributes))\r
+ }\r
+\r
+ /* Stabs debugging sections. */\r
+ .stab 0 : { *(.stab) }\r
+ .stabstr 0 : { *(.stabstr) }\r
+ .stab.excl 0 : { *(.stab.excl) }\r
+ .stab.exclstr 0 : { *(.stab.exclstr) }\r
+ .stab.index 0 : { *(.stab.index) }\r
+ .stab.indexstr 0 : { *(.stab.indexstr) }\r
+ .comment 0 : { *(.comment) }\r
+ /* DWARF debug sections.\r
+ Symbols in the DWARF debugging sections are relative to the beginning\r
+ of the section so we begin them at 0. */\r
+ /* DWARF 1. */\r
+ .debug 0 : { *(.debug) }\r
+ .line 0 : { *(.line) }\r
+ /* GNU DWARF 1 extensions. */\r
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }\r
+ .debug_sfnames 0 : { *(.debug_sfnames) }\r
+ /* DWARF 1.1 and DWARF 2. */\r
+ .debug_aranges 0 : { *(.debug_aranges) }\r
+ .debug_pubnames 0 : { *(.debug_pubnames) }\r
+ /* DWARF 2. */\r
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }\r
+ .debug_abbrev 0 : { *(.debug_abbrev) }\r
+ .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }\r
+ .debug_frame 0 : { *(.debug_frame) }\r
+ .debug_str 0 : { *(.debug_str) }\r
+ .debug_loc 0 : { *(.debug_loc) }\r
+ .debug_macinfo 0 : { *(.debug_macinfo) }\r
+ /* SGI/MIPS DWARF 2 extensions. */\r
+ .debug_weaknames 0 : { *(.debug_weaknames) }\r
+ .debug_funcnames 0 : { *(.debug_funcnames) }\r
+ .debug_typenames 0 : { *(.debug_typenames) }\r
+ .debug_varnames 0 : { *(.debug_varnames) }\r
+ /* DWARF 3 */\r
+ .debug_pubtypes 0 : { *(.debug_pubtypes) }\r
+ .debug_ranges 0 : { *(.debug_ranges) }\r
+ /* DWARF Extension. */\r
+ .debug_macro 0 : { *(.debug_macro) }\r
+\r
+ /DISCARD/ : { *(.note.GNU-stack) }\r
+}\r
+\r
+\r
+/****************************************************************************/\r
+/* Include peripherals memory map */\r
+/****************************************************************************/\r
+\r
+INCLUDE msp430fr2476_symbols.ld\r
+\r
+++ /dev/null
-/* ============================================================================ */
-/* Copyright (c) 2021, Texas Instruments Incorporated */
-/* All rights reserved. */
-/* */
-/* Redistribution and use in source and binary forms, with or without */
-/* modification, are permitted provided that the following conditions */
-/* are met: */
-/* */
-/* * Redistributions of source code must retain the above copyright */
-/* notice, this list of conditions and the following disclaimer. */
-/* */
-/* * Redistributions in binary form must reproduce the above copyright */
-/* notice, this list of conditions and the following disclaimer in the */
-/* documentation and/or other materials provided with the distribution. */
-/* */
-/* * Neither the name of Texas Instruments Incorporated nor the names of */
-/* its contributors may be used to endorse or promote products derived */
-/* from this software without specific prior written permission. */
-/* */
-/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
-/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
-/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
-/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
-/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
-/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
-/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
-/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
-/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
-/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
-/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
-/* ============================================================================ */
-
-/* This file supports MSP430G2553 devices. */
-/* Version: 1.212 */
-/* Default linker script, for normal executables */
-
-OUTPUT_ARCH(msp430)
-ENTRY(_start)
-
-MEMORY {
- SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */
- RAM : ORIGIN = 0x0200, LENGTH = 0x0200 /* END=0x03FF, size 512 */
- INFOMEM : ORIGIN = 0x1000, LENGTH = 0x0100 /* END=0x10FF, size 256 as 4 64-byte segments */
- INFOA : ORIGIN = 0x10C0, LENGTH = 0x0040 /* END=0x10FF, size 64 */
- INFOB : ORIGIN = 0x1080, LENGTH = 0x0040 /* END=0x10BF, size 64 */
- INFOC : ORIGIN = 0x1040, LENGTH = 0x0040 /* END=0x107F, size 64 */
- INFOD : ORIGIN = 0x1000, LENGTH = 0x0040 /* END=0x103F, size 64 */
- ROM (rx) : ORIGIN = 0xC000, LENGTH = 0x3FDE /* END=0xFFDD, size 16350 */
- BSLSIGNATURE : ORIGIN = 0xFFDE, LENGTH = 0x0002
- VECT1 : ORIGIN = 0xFFE0, LENGTH = 0x0002
- VECT2 : ORIGIN = 0xFFE2, LENGTH = 0x0002
- VECT3 : ORIGIN = 0xFFE4, LENGTH = 0x0002
- VECT4 : ORIGIN = 0xFFE6, LENGTH = 0x0002
- VECT5 : ORIGIN = 0xFFE8, LENGTH = 0x0002
- VECT6 : ORIGIN = 0xFFEA, LENGTH = 0x0002
- VECT7 : ORIGIN = 0xFFEC, LENGTH = 0x0002
- VECT8 : ORIGIN = 0xFFEE, LENGTH = 0x0002
- VECT9 : ORIGIN = 0xFFF0, LENGTH = 0x0002
- VECT10 : ORIGIN = 0xFFF2, LENGTH = 0x0002
- VECT11 : ORIGIN = 0xFFF4, LENGTH = 0x0002
- VECT12 : ORIGIN = 0xFFF6, LENGTH = 0x0002
- VECT13 : ORIGIN = 0xFFF8, LENGTH = 0x0002
- VECT14 : ORIGIN = 0xFFFA, LENGTH = 0x0002
- VECT15 : ORIGIN = 0xFFFC, LENGTH = 0x0002
- RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
-}
-
-SECTIONS
-{
- .bslsignature : {} > BSLSIGNATURE
- __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) KEEP (*(__interrupt_vector_trapint)) } > VECT1
- __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
- __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3
- __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4
- __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
- __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) KEEP (*(__interrupt_vector_adc10)) } > VECT6
- __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) KEEP (*(__interrupt_vector_usciab0tx)) } > VECT7
- __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) KEEP (*(__interrupt_vector_usciab0rx)) } > VECT8
- __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT9
- __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT10
- __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11
- __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) KEEP (*(__interrupt_vector_comparatora)) } > VECT12
- __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT13
- __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT14
- __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15
- __reset_vector :
- {
- KEEP (*(__interrupt_vector_16))
- KEEP (*(__interrupt_vector_reset))
- KEEP (*(.resetvec))
- } > RESETVEC
-
- .rodata :
- {
- . = ALIGN(2);
- *(.plt)
- *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
- *(.rodata1)
- KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
- } > ROM
-
- /* Note: This is a separate .rodata section for sections which are
- read only but which older linkers treat as read-write.
- This prevents older linkers from marking the entire .rodata
- section as read-write. */
- .rodata2 :
- {
- . = ALIGN(2);
- PROVIDE (__preinit_array_start = .);
- KEEP (*(.preinit_array))
- PROVIDE (__preinit_array_end = .);
- . = ALIGN(2);
- PROVIDE (__init_array_start = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array))
- PROVIDE (__init_array_end = .);
- . = ALIGN(2);
- PROVIDE (__fini_array_start = .);
- KEEP (*(.fini_array))
- KEEP (*(SORT(.fini_array.*)))
- PROVIDE (__fini_array_end = .);
- /* . = ALIGN(2);
- *(.eh_frame_hdr)
- KEEP (*(.eh_frame)) */
-
- /* gcc uses crtbegin.o to find the start of the constructors, so
- we make sure it is first. Because this is a wildcard, it
- doesn't matter if the user does not actually link against
- crtbegin.o; the linker won't look for a file to match a
- wildcard. The wildcard also means that it doesn't matter which
- directory crtbegin.o is in. */
- KEEP (*crtbegin*.o(.ctors))
-
- /* We don't want to include the .ctor section from the crtend.o
- file until after the sorted ctors. The .ctor section from
- the crtend file contains the end of ctors marker and it must
- be last */
- KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
- KEEP (*(SORT(.ctors.*)))
- KEEP (*(.ctors))
-
- KEEP (*crtbegin*.o(.dtors))
- KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
- KEEP (*(SORT(.dtors.*)))
- KEEP (*(.dtors))
- } > ROM
-
- .text :
- {
- . = ALIGN(2);
- PROVIDE (_start = .);
- KEEP (*(SORT(.crt_*)))
- *(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
- KEEP (*(.text.*personality*))
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- *(.interp .hash .dynsym .dynstr .gnu.version*)
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
- . = ALIGN(2);
- KEEP (*(.init))
- KEEP (*(.fini))
- KEEP (*(.tm_clone_table))
- } > ROM
-
- .data :
- {
- . = ALIGN(2);
- PROVIDE (__datastart = .);
-
- KEEP (*(.jcr))
- *(.data.rel.ro.local) *(.data.rel.ro*)
- *(.dynamic)
-
- *(.data .data.* .gnu.linkonce.d.*)
- KEEP (*(.gnu.linkonce.d.*personality*))
- SORT(CONSTRUCTORS)
- *(.data1)
- *(.got.plt) *(.got)
-
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- . = ALIGN(2);
- *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
-
- . = ALIGN(2);
- _edata = .;
- PROVIDE (edata = .);
- PROVIDE (__dataend = .);
- } > RAM AT>ROM
-
- /* Note that crt0 assumes this is a multiple of two; all the
- start/stop symbols are also assumed word-aligned. */
- PROVIDE(__romdatastart = LOADADDR(.data));
- PROVIDE (__romdatacopysize = SIZEOF(.data));
-
- .bss :
- {
- . = ALIGN(2);
- PROVIDE (__bssstart = .);
- *(.dynbss)
- *(.sbss .sbss.*)
- *(.bss .bss.* .gnu.linkonce.b.*)
- . = ALIGN(2);
- *(COMMON)
- PROVIDE (__bssend = .);
- } > RAM
- PROVIDE (__bsssize = SIZEOF(.bss));
-
- /* This section contains data that is not initialised during load
- or application reset. */
- .noinit (NOLOAD) :
- {
- . = ALIGN(2);
- PROVIDE (__noinit_start = .);
- *(.noinit)
- . = ALIGN(2);
- PROVIDE (__noinit_end = .);
- end = .;
- } > RAM
-
- /* We create this section so that "end" will always be in the
- RAM region (matching .stack below), even if the .bss
- section is empty. */
- .heap (NOLOAD) :
- {
- . = ALIGN(2);
- __heap_start__ = .;
- _end = __heap_start__;
- PROVIDE (end = .);
- KEEP (*(.heap))
- _end = .;
- PROVIDE (end = .);
- /* This word is here so that the section is not empty, and thus
- not discarded by the linker. The actual value does not matter
- and is ignored. */
- LONG(0);
- __heap_end__ = .;
- __HeapLimit = __heap_end__;
- } > RAM
- /* WARNING: Do not place anything in RAM here.
- The heap section must be the last section in RAM and the stack
- section must be placed at the very end of the RAM region. */
-
- .stack (ORIGIN (RAM) + LENGTH(RAM)) :
- {
- PROVIDE (__stack = .);
- *(.stack)
- }
-
- .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
- .infoB : {} > INFOB
- .infoC : {} > INFOC
- .infoD : {} > INFOD
-
- /* The rest are all not normally part of the runtime image. */
-
- .MSP430.attributes 0 :
- {
- KEEP (*(.MSP430.attributes))
- KEEP (*(.gnu.attributes))
- KEEP (*(__TI_build_attributes))
- }
-
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- .comment 0 : { *(.comment) }
- /* DWARF debug sections.
- Symbols in the DWARF debugging sections are relative to the beginning
- of the section so we begin them at 0. */
- /* DWARF 1. */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions. */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2. */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2. */
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions. */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
- /* DWARF 3 */
- .debug_pubtypes 0 : { *(.debug_pubtypes) }
- .debug_ranges 0 : { *(.debug_ranges) }
- /* DWARF Extension. */
- .debug_macro 0 : { *(.debug_macro) }
-
- /DISCARD/ : { *(.note.GNU-stack) }
-}
-
-
-/****************************************************************************/
-/* Include peripherals memory map */
-/****************************************************************************/
-
-INCLUDE msp430g2553_symbols.ld
-
projects / bitgloo / alee-forth.git / commitdiff