]> code.bitgloo.com Git - clyne/msp430-temp-lcd.git/commitdiff
removed submodule so files can be edited
authorClyne Sullivan <tullivan99@gmail.com>
Mon, 29 Apr 2019 14:26:32 +0000 (10:26 -0400)
committerClyne Sullivan <tullivan99@gmail.com>
Mon, 29 Apr 2019 14:26:32 +0000 (10:26 -0400)
.gitmodules [deleted file]
Makefile
i2c [deleted submodule]
i2c.c [new file with mode: 0644]
i2c.h [new file with mode: 0644]
temp.c

diff --git a/.gitmodules b/.gitmodules
deleted file mode 100644 (file)
index 2fbd7ce..0000000
+++ /dev/null
@@ -1,3 +0,0 @@
-[submodule "i2c"]
-       path = i2c
-       url = https://github.com/heliocapella/msp430g2553_i2c
index 76536609380e227ed9a80e67b5dfe4e14933ea50..54bba864b4a1c1e7b69e63f68690138cb5c4a23a 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@ CFLAGS = -mmcu=msp430g2553 -std=gnu99 \
         -Os
 
 CSRC = board.c \
-       i2c/i2c.c \
+       i2c.c \
        temp.c \
        main.c
 COBJ = $(patsubst %.c, %.o, $(CSRC))
diff --git a/i2c b/i2c
deleted file mode 160000 (submodule)
index 6c90102..0000000
--- a/i2c
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 6c90102daca09c221d62391ddf2fe989cc0a1ce7
diff --git a/i2c.c b/i2c.c
new file mode 100644 (file)
index 0000000..a10141c
--- /dev/null
+++ b/i2c.c
@@ -0,0 +1,136 @@
+/*
+ * i2c.h
+ *
+ *  Created on: 28 de abr de 2017
+ *      Author: helio.capella
+ *
+ *      Based on msp430g2xx3_uscib0_i2c_12.c by D. Dang
+ *
+ *  Modified by tcsullivan:
+ *      04/29: Modified pin macros to work with project
+ */
+
+#include <msp430.h>
+#include "i2c.h"
+#include "board.h"
+
+#define I2CSEL   P1SEL
+#define I2CSEL2  P1SEL2
+#define I2CSCL   (TEMP_SCL)
+#define I2CSDA   (TEMP_SDA)
+
+void I2C_init(uint8_t slaveAddress){
+    // Port Configuration
+    I2CSEL |= I2CSDA + I2CSCL;                     // Assign I2C pins to USCI_B0
+    I2CSEL2|= I2CSDA + I2CSCL;                     // Assign I2C pins to USCI_B0
+
+//    isRx = 0;                                    // State variable - possibly useless
+
+    //USCI Configuration
+    UCB0CTL1 |= UCSWRST;                           // Enable SW reset
+    UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;          // I2C Master, synchronous mode
+    UCB0CTL1 = UCSSEL_2 + UCSWRST;                 // Use SMCLK, keep SW reset
+
+    //Set USCI Clock Speed
+    UCB0BR0 = 12;                                  // fSCL = SMCLK/12 = ~100kHz
+    UCB0BR1 = 0;
+
+    //Set Slave Address and Resume operation
+    UCB0I2CSA = slaveAddress;                      // Slave Address passed as parameter
+    UCB0CTL1 &= ~UCSWRST;                          // Clear SW reset, resume operation
+}
+
+
+void I2C_write(uint8_t ByteCtr, uint8_t *TxData) {
+    __disable_interrupt();
+//    isRx = 0;
+    //Interrupt management
+    IE2 &= ~UCB0RXIE;                              // Disable RX interrupt
+//    while (UCB0CTL1 & UCTXSTP);                  // Ensure stop condition got sent
+    IE2 |= UCB0TXIE;                               // Enable TX interrupt
+
+    //Pointer to where data is stored to be sent
+    PTxData = (uint8_t *) TxData;                  // TX array start address
+    TxByteCtr = ByteCtr;                           // Load TX byte counter
+
+    //Send start condition
+    //    while (UCB0CTL1 & UCTXSTP);              // Ensure stop condition got sent
+    UCB0CTL1 |= UCTR + UCTXSTT;                    // I2C TX, start condition
+
+    __bis_SR_register(CPUOFF + GIE);               // Enter LPM0 w/ interrupts
+    while (UCB0CTL1 & UCTXSTP);
+}
+
+void I2C_read(uint8_t ByteCtr, volatile uint8_t *RxData) {
+    __disable_interrupt();
+//    isRx = 1;
+
+    //Interrupt management
+    IE2 &= ~UCB0TXIE;                              // Disable TX interrupt
+    UCB0CTL1 = UCSSEL_2 + UCSWRST;                 // Use SMCLK, keep SW reset
+    UCB0CTL1 &= ~UCSWRST;                          // Clear SW reset, resume operation
+    IE2 |= UCB0RXIE;                               // Enable RX interrupt
+
+    //Pointer to where data will be stored
+    PRxData = (uint8_t *) RxData;                  // Start of RX buffer
+    RxByteCtr = ByteCtr;                           // Load RX byte counter
+
+    //while (UCB0CTL1 & UCTXSTP);                  // Ensure stop condition got sent
+
+    //If only 1 byte will be read send stop signal as soon as it starts transmission
+    if(RxByteCtr == 1){
+        UCB0CTL1 |= UCTXSTT;                       // I2C start condition
+        while (UCB0CTL1 & UCTXSTT);                // Start condition sent?
+        UCB0CTL1 |= UCTXSTP;                       // I2C stop condition
+        __enable_interrupt();
+    } else {
+        UCB0CTL1 |= UCTXSTT;                       // I2C start condition
+    }
+
+    __bis_SR_register(CPUOFF + GIE);               // Enter LPM0 w/ interrupts
+    while (UCB0CTL1 & UCTXSTP);                    // Ensure stop condition got sent
+}
+
+#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
+#pragma vector = USCIAB0TX_VECTOR
+__interrupt void USCIAB0TX_ISR(void)
+#elif defined(__GNUC__)
+void __attribute__ ((interrupt(USCIAB0TX_VECTOR))) USCIAB0TX_ISR (void)
+#else
+#error Compiler not supported!
+#endif
+{
+  if(IFG2 & UCB0RXIFG){                              // Receive In
+  if (RxByteCtr == 1)
+  {
+     *PRxData = UCB0RXBUF;                           // Move final RX data to PRxData
+     __bic_SR_register_on_exit(CPUOFF);              // Exit LPM0
+  }
+  else
+  {
+      *PRxData++ = UCB0RXBUF;                        // Move RX data to address PRxData
+      if (RxByteCtr == 2)                            // Check whether byte is second to last to be read to send stop condition
+      UCB0CTL1 |= UCTXSTP;
+      __no_operation();
+  }
+  RxByteCtr--;                                       // Decrement RX byte counter
+  }
+
+  else{                                              // Master Transmit
+      if (TxByteCtr)                                 // Check TX byte counter
+  {
+    UCB0TXBUF = *PTxData;                            // Load TX buffer
+    PTxData++;
+    TxByteCtr--;                                     // Decrement TX byte counter
+  }
+  else
+  {
+    UCB0CTL1 |= UCTXSTP;                             // I2C stop condition
+    IFG2 &= ~UCB0TXIFG;                              // Clear USCI_B0 TX int flag
+    __bic_SR_register_on_exit(CPUOFF);               // Exit LPM0
+  }
+ }
+}
+
+
+
diff --git a/i2c.h b/i2c.h
new file mode 100644 (file)
index 0000000..987d109
--- /dev/null
+++ b/i2c.h
@@ -0,0 +1,26 @@
+/*
+ * i2c.h
+ *
+ *  Created on: 28 de abr de 2017
+ *      Author: helio.capella
+ */
+
+#ifndef I2C_H_
+#define I2C_H_
+
+#include <stdint.h>
+
+uint8_t *PTxData;                     // Pointer to TX data
+uint8_t *PRxData;                     // Pointer to RX data
+
+uint8_t TxByteCtr;
+uint8_t RxByteCtr;
+
+//uint8_t isRx;
+
+void I2C_init(uint8_t slaveAddress);
+void I2C_write(uint8_t ByteCtr, uint8_t *TxData);
+void I2C_read(uint8_t ByteCtr, volatile uint8_t *RxData);
+
+#endif /* I2C_H_ */
+
diff --git a/temp.c b/temp.c
index 38e873d4bfc3edd56054469b86f6c9fdaeeb135c..95b74f7e0d53d5f2dc03ed505d121367224dd06a 100644 (file)
--- a/temp.c
+++ b/temp.c
@@ -19,7 +19,7 @@
  */
 
 #include "board.h"
-#include "i2c/i2c.h"
+#include "i2c.h"
 
 // TMP006 I2C address
 #define TEMP_ADDR (0x40)