diff options
author | Clyne Sullivan <clyne@bitgloo.com> | 2023-11-02 20:50:47 -0400 |
---|---|---|
committer | Clyne Sullivan <clyne@bitgloo.com> | 2023-11-02 20:50:47 -0400 |
commit | ea026f8d67c411fc4a0d8b255a2653753258175e (patch) | |
tree | 90b24cd555709b52ca50cfd6d629b2e565a7613b | |
parent | b26edffda07b017b5a385491d7232efce0020631 (diff) |
running on the devboard
-rw-r--r-- | Makefile | 5 | ||||
-rw-r--r-- | libalee/corewords.cpp | 7 | ||||
-rw-r--r-- | libalee/state.hpp | 4 | ||||
-rw-r--r-- | msp430/alee-msp430.cpp | 13 | ||||
-rw-r--r-- | msp430/msp430fr2476.ld | 34 |
5 files changed, 17 insertions, 46 deletions
@@ -16,10 +16,11 @@ msp430: CXXFLAGS += -I. -I/usr/msp430-elf/usr/include msp430: CXXFLAGS += -Os -mmcu=msp430fr2476 -ffunction-sections -fdata-sections msp430: CXXFLAGS += -DMEMDICTSIZE=1024 -flto -fno-asynchronous-unwind-tables -fno-threadsafe-statics -fno-stack-protector msp430: LDFLAGS += -L/usr/msp430-elf/usr/include -Tmsp430/msp430fr2476.ld -Wl,-gc-sections -msp430: clean-lib msp430/alee-msp430 +msp430: msp430/alee-msp430 msp430-prep: STANDALONE += forth/msp430.fth msp430-prep: core.fth.h +msp430-prep: clean-lib small: CXXFLAGS += -Os -fno-asynchronous-unwind-tables -fno-threadsafe-statics -fno-stack-protector small: alee @@ -45,7 +46,7 @@ $(LIBFILE): $(OBJFILES) core.fth.h: alee.dat xxd -i $< > $@ - sed -i "s/unsigned /static const &/" $@ + sed -i "s/unsigned /static &/" $@ alee.dat: alee $(STANDALONE) echo "3 sys" | ./alee $(STANDALONE) diff --git a/libalee/corewords.cpp b/libalee/corewords.cpp index 8f903e1..e3ba6b3 100644 --- a/libalee/corewords.cpp +++ b/libalee/corewords.cpp @@ -180,13 +180,10 @@ execute: cell = state.pop(); dcell = cell - state.dict.latest(); if (dcell > (1 << (sizeof(Cell) * 8 - 6)) - 1) { - state.dict.write(cell, - (state.dict.read(cell) & 0x1F) | static_cast<Cell>(((1 << (sizeof(Cell) * 8 - 6)) - 1) << 6)); state.dict.write(static_cast<Addr>(cell) + sizeof(Cell), static_cast<Cell>(dcell)); - } else { - state.dict.write(cell, - (state.dict.read(cell) & 0x1F) | static_cast<Cell>(dcell << 6)); + dcell = ((1 << (sizeof(Cell) * 8 - 6)) - 1); } + state.dict.write(cell, (state.dict.read(cell) & 0x1F) | static_cast<Cell>(dcell << 6)); state.dict.latest(cell); break; case 27: // _jmp0 diff --git a/libalee/state.hpp b/libalee/state.hpp index 12a3aeb..e77a223 100644 --- a/libalee/state.hpp +++ b/libalee/state.hpp @@ -25,8 +25,8 @@ #include <csetjmp> #include <cstddef> -constexpr unsigned DataStackSize = 16; -constexpr unsigned ReturnStackSize = 16; +constexpr unsigned DataStackSize = 64; +constexpr unsigned ReturnStackSize = 64; class State { diff --git a/msp430/alee-msp430.cpp b/msp430/alee-msp430.cpp index fba9c6f..92f3aa5 100644 --- a/msp430/alee-msp430.cpp +++ b/msp430/alee-msp430.cpp @@ -18,14 +18,16 @@ #include "alee.hpp" #include "libalee/ctype.hpp" -#include "splitmemdict.hpp" #include <msp430.h> +#include "splitmemdictrw.hpp" + alignas(sizeof(Cell)) +__attribute__((section(".text"))) #include "core.fth.h" -static char strbuf[32]; +static char strbuf[80]; static void readchar(State& state); static void serput(int c); @@ -38,14 +40,19 @@ static void initUART(); static void Software_Trim(); #define MCLK_FREQ_MHZ (8) // MCLK = 8MHz +//__attribute__((section(".upper.bss"))) +//static uint8_t hidict[16384]; + int main() { WDTCTL = WDTPW | WDTHOLD; initGPIO(); initClock(); initUART(); + SYSCFG0 = FRWPPW; - static SplitMemDict<alee_dat_len> dict (alee_dat); + (void)alee_dat_len; + static SplitMemDictRW<sizeof(alee_dat), /*sizeof(hidict)*/16384> dict (alee_dat, 0x10000/*(uint32_t)hidict*/); State state (dict, readchar); serputs("alee forth\n\r"); diff --git a/msp430/msp430fr2476.ld b/msp430/msp430fr2476.ld index 011683b..62004bd 100644 --- a/msp430/msp430fr2476.ld +++ b/msp430/msp430fr2476.ld @@ -224,11 +224,6 @@ SECTIONS KEEP (*(.dtors))
} > FRAM
- .upper.rodata :
- {
- *(.upper.rodata.* .upper.rodata)
- } > HIFRAM
-
/* This section contains data that is initialised during load
but not on application reset. */
.persistent :
@@ -281,19 +276,6 @@ SECTIONS PROVIDE(__romdatastart = LOADADDR(.lower.data));
PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));
- .upper.data :
- {
- __upper_data_init = LOADADDR (.upper.data);
- /* Status word. */
- SHORT(1);
- __high_datastart = .;
- *(.upper.data.* .upper.data)
- __high_dataend = .;
- } > HIFRAM AT> FRAM
-
- __rom_highdatacopysize = SIZEOF(.upper.data) - 2;
- __rom_highdatastart = LOADADDR(.upper.data) + 2;
-
.lower.bss :
{
. = ALIGN(2);
@@ -313,16 +295,6 @@ SECTIONS } > RAM
PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));
- .upper.bss :
- {
- . = ALIGN(2);
- __high_bssstart = .;
- *(.upper.bss.* .upper.bss)
- . = ALIGN(2);
- __high_bssend = .;
- } > HIFRAM
- __high_bsssize = SIZEOF(.upper.bss);
-
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
@@ -395,12 +367,6 @@ SECTIONS KEEP (*(.tm_clone_table))
} > FRAM
- .upper.text :
- {
- . = ALIGN(2);
- *(.upper.text.* .upper.text)
- } > HIFRAM
-
.info (NOLOAD) : {} > INFOMEM /* MSP430 INFO FLASH MEMORY SEGMENTS */
/* The rest are all not normally part of the runtime image. */
|