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-rw-r--r--msp430/Makefile12
-rw-r--r--msp430/alee-msp430.cpp149
-rwxr-xr-xmsp430/build.sh9
-rw-r--r--msp430/examples/spi.txt15
-rw-r--r--msp430/examples/uart.txt13
-rw-r--r--msp430/msp430fr2476.h52
-rw-r--r--msp430/msp430fr2476.ld118
7 files changed, 184 insertions, 184 deletions
diff --git a/msp430/Makefile b/msp430/Makefile
deleted file mode 100644
index 8b91764..0000000
--- a/msp430/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-dict: lzss
- cat msp430fr2476_symbols.ld | grep "^PROVIDE.*" | sed -e "s/^PROVIDE(//" -e "s/[ ][ ]*//" -e "s/=.0x/\\\\x/" -e "s/..);/\\\\x&/" -e "s/);//" > msp430fr2476_symbols.dat
- grep -E "^#define \w+\s+\([0-9].*$$" msp430fr2476.h | sed -e "s/).*$$/)/" -e "s/^#define //" -e "s/[ ][ ]*//" -e "s/(0x/\\\\x/" -e "s/..)/\\\\x&/" -e "s/)//" -e "s/(/\\\\x/" -e "s/\\\\x\\\\/\\\\x00\\\\/" > msp430fr2476.dat
- cat msp430fr2476_symbols.dat msp430fr2476.dat | tr '\n' '\373' | tr -d '\r' > msp430fr2476_all.dat
- @echo "printf ... > msp430fr2476_all.bin"
- @printf "$(shell cat msp430fr2476_all.dat)" > msp430fr2476_all.bin
- ./lzss e msp430fr2476_all.bin msp430fr2476_all.lzss
- ls -l msp430fr2476_all.lzss
- xxd -i msp430fr2476_all.lzss > msp430fr2476_all.h
-
-lzss: lzss.c
-
diff --git a/msp430/alee-msp430.cpp b/msp430/alee-msp430.cpp
index b983900..51f63f8 100644
--- a/msp430/alee-msp430.cpp
+++ b/msp430/alee-msp430.cpp
@@ -16,50 +16,63 @@
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
-#include "alee.hpp"
-#include "libalee/ctype.hpp"
+#include "libalee/alee.hpp"
#include "lzss.h"
static const
#include "msp430fr2476_all.h"
-#include <cstring>
#include <msp430.h>
#include "splitmemdictrw.hpp"
-alignas(sizeof(Cell))
-__attribute__((section(".lodict")))
-#include "core.fth.h"
-
static char strbuf[80];
static void readchar(State& state);
static void serput(int c);
static void serputs(const char *s);
-static void printint(DoubleCell n, char *buf);
+static void printint(DoubleCell n, char *buf, int base);
+
static Error findword(State&, Word);
static void initGPIO();
static void initClock();
static void initUART();
static void Software_Trim();
-#define MCLK_FREQ_MHZ (8) // MCLK = 8MHz
+#define MCLK_FREQ_MHZ (16)
+
+static void alee_main();
-//__attribute__((section(".hidict")))
-//static uint8_t hidict[16384];
+#define ALEE_RODICTSIZE (9088)
+__attribute__((section(".lodict")))
+#include "core.fth.h"
-static bool inISR = false;
+static bool exitLpm;
static Addr isr_list[24] = {};
-static SplitMemDictRW<sizeof(alee_dat), 16384> dict (alee_dat, 0x10000);
+
+using DictType = SplitMemDictRW<ALEE_RODICTSIZE, 32767>;
+extern char __dict[sizeof(DictType)];
+static auto& dict = *(new (__dict) DictType (alee_dat, 0x10000));
int main()
{
WDTCTL = WDTPW | WDTHOLD;
+
+ extern char __libaleebegin;
+ extern char __libaleeend;
+ extern char __libaleedst;
+ std::copy(&__libaleebegin, &__libaleeend, &__libaleedst);
+
initGPIO();
initClock();
initUART();
SYSCFG0 = FRWPPW;
+ alee_main();
+}
+
+LIBALEE_SECTION
+void alee_main()
+{
(void)alee_dat_len;
State state (dict, readchar);
Parser::customParse = findword;
@@ -105,6 +118,7 @@ int main()
}
}
+LIBALEE_SECTION
void readchar(State& state)
{
auto idx = state.dict.read(Dictionary::Input);
@@ -117,20 +131,25 @@ void readchar(State& state)
state.dict.writebyte(addr, c ? c : ' ');
}
+LIBALEE_SECTION
void serput(int c)
{
while (!(UCA0IFG & UCTXIFG));
UCA0TXBUF = static_cast<char>(c);
}
+LIBALEE_SECTION
void serputs(const char *s)
{
while (*s)
serput(*s++);
}
-void printint(DoubleCell n, char *buf)
+LIBALEE_SECTION
+void printint(DoubleCell n, char *buf, int base)
{
+ static const char digit[] = "0123456789ABCDEF";
+
char *ptr = buf;
bool neg = n < 0;
@@ -138,8 +157,8 @@ void printint(DoubleCell n, char *buf)
n = -n;
do {
- *ptr++ = static_cast<char>((n % 10) + '0');
- } while ((n /= 10));
+ *ptr++ = digit[n % base];
+ } while ((n /= base));
if (neg)
serput('-');
@@ -150,11 +169,12 @@ void printint(DoubleCell n, char *buf)
serput(' ');
}
+LIBALEE_SECTION
void user_sys(State& state)
{
switch (state.pop()) {
case 0: // .
- printint(state.pop(), strbuf);
+ printint(state.pop(), strbuf, state.dict.read(Dictionary::Base));
break;
case 1: // unused
state.push(static_cast<Addr>(state.dict.capacity() - state.dict.here()));
@@ -181,16 +201,18 @@ void user_sys(State& state)
state.push(*reinterpret_cast<uint16_t *>(state.pop()));
break;
case 15:
- if (!inISR)
- _bis_SR_register(state.pop());
- else
- _bis_SR_register_on_exit(state.pop());
+ _bis_SR_register(state.pop());
break;
case 16:
- if (!inISR)
- _bic_SR_register(state.pop());
- else
- _bic_SR_register_on_exit(state.pop());
+ _bic_SR_register(state.pop());
+ break;
+ case 17:
+ exitLpm |= true;
+ break;
+ case 50:
+ Parser::customParse = nullptr;
+ extern char _etext;
+ state.push((Addr)&_etext);
break;
default:
break;
@@ -199,14 +221,14 @@ void user_sys(State& state)
#define LZSS_MAGIC_SEPARATOR (0xFB)
-static char lzword[32];
+static uint8_t lzword[32];
static int lzwlen;
-static char lzbuf[32];
-static char *lzptr;
+static uint8_t lzbuf[32];
+static uint8_t *lzptr;
Error findword(State& state, Word word)
{
- char *ptr = lzword;
+ uint8_t *ptr = lzword;
for (auto it = word.begin(&state.dict); it != word.end(&state.dict); ++it) {
*ptr = *it;
if (islower(*ptr))
@@ -220,9 +242,9 @@ Error findword(State& state, Word word)
auto ret = decode([](int c) {
if (c != LZSS_MAGIC_SEPARATOR) {
- *lzptr++ = (char)c;
+ *lzptr++ = (uint8_t)c;
} else {
- if (lzwlen == lzptr - lzbuf - 2 && strncmp(lzword, lzbuf, lzptr - lzbuf - 2) == 0) {
+ if (lzwlen == lzptr - lzbuf - 2 && std::equal(lzbuf, lzptr - 2, lzword)) {
lzwlen = (*(lzptr - 2) << 8) | *(lzptr - 1);
return 1;
} else {
@@ -267,35 +289,47 @@ void initGPIO()
void initClock()
{
- __bis_SR_register(SCG0); // disable FLL
- CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
- CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
- CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
+ static_assert(MCLK_FREQ_MHZ == 16);
+
+ // Configure one FRAM waitstate as required by the device datasheet for MCLK
+ // operation beyond 8MHz _before_ configuring the clock system.
+ FRCTL0 = FRCTLPW | NWAITS_1;
+
+ P2SEL0 |= BIT0 | BIT1; // P2.0~P2.1: crystal pins
+ do
+ {
+ CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
+ SFRIFG1 &= ~OFIFG;
+ } while (SFRIFG1 & OFIFG); // Test oscillator fault flag
+
+ __bis_SR_register(SCG0); // disable FLL
+ CSCTL3 |= SELREF__XT1CLK; // Set XT1 as FLL reference source
+ CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_5;// DCOFTRIM=5, DCO Range = 16MHz
+ CSCTL2 = FLLD_0 + 487; // DCOCLKDIV = 16MHz
__delay_cycles(3);
- __bic_SR_register(SCG0); // enable FLL
- Software_Trim(); // Software Trim to get the best DCOFTRIM value
+ __bic_SR_register(SCG0); // enable FLL
+ Software_Trim(); // Software Trim to get the best DCOFTRIM value
+
+ CSCTL4 = SELMS__DCOCLKDIV | SELA__XT1CLK; // set XT1 (~32768Hz) as ACLK source, ACLK = 32768Hz
+ // default DCOCLKDIV as MCLK and SMCLK source
- CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
- // default DCODIV as MCLK and SMCLK source
}
void initUART()
{
// Configure UART pins
- P5SEL0 |= BIT1 | BIT2; // set 2-UART pin as second function
- SYSCFG3|=USCIA0RMP; //Set the remapping source
- // Configure UART
+ P5SEL0 |= BIT1 | BIT2;
+ SYSCFG3 |= USCIA0RMP; // Set the remapping source
+
UCA0CTLW0 |= UCSWRST;
- UCA0CTLW0 |= UCSSEL__SMCLK;
+ UCA0CTLW0 |= UCSSEL__SMCLK; // 16 MHz
// Baud Rate calculation
- // 8000000/(16*9600) = 52.083
- // Fractional portion = 0.083
- // User's Guide Table 17-4: UCBRSx = 0x49
- // UCBRFx = int ( (52.083-52)*16) = 1
- UCA0BR0 = 52; // 8000000/16/9600
- UCA0BR1 = 0x00;
- UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;
+ // N = 16MHz / 115200 = 138.888
+ // OS16 = 1, UCBRx = INT(N/16) = 8(.6806)
+ // UCBRFx = INT( ((N/16) - UCBRx) * 16) = 10(.8896)
+ UCA0BRW = 8;
+ UCA0MCTLW = 0xD600 | 0x00A0 | UCOS16;
UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
}
@@ -369,21 +403,25 @@ void Software_Trim()
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
}
-void alee_isr_handle(unsigned index)
+bool alee_isr_handle(unsigned index)
{
const Addr isr = isr_list[index];
if (isr != 0) {
State isrstate (dict, readchar);
- inISR = true;
+ exitLpm = false;
isrstate.execute(isr);
- inISR = false;
+ return exitLpm;
}
+
+ return false;
}
#define DEFINE_ISR(VVV, III) \
__attribute__((interrupt(VVV))) \
- void VVV##_ISR() { alee_isr_handle(III); }
+ void VVV##_ISR() { \
+ if (alee_isr_handle(III)) \
+ _low_power_mode_off_on_exit(); }
DEFINE_ISR(ECOMP0_VECTOR, 0)
DEFINE_ISR(PORT6_VECTOR, 1)
@@ -410,3 +448,6 @@ DEFINE_ISR(TIMER1_A0_VECTOR, 21)
DEFINE_ISR(TIMER0_A1_VECTOR, 22)
DEFINE_ISR(TIMER0_A0_VECTOR, 23)
+// Override newlib's free to save hundreds of bytes
+extern "C" void free(void *) {}
+
diff --git a/msp430/build.sh b/msp430/build.sh
new file mode 100755
index 0000000..3d296d3
--- /dev/null
+++ b/msp430/build.sh
@@ -0,0 +1,9 @@
+#!/bin/bash -x
+
+cat msp430fr2476_symbols.ld | grep "^PROVIDE.*" | sed -e "s/^PROVIDE(//" -e "s/[ ][ ]*//" -e "s/=.0x/\\\\x/" -e "s/..);/\\\\x&/" -e "s/);//" > msp430fr2476_symbols.dat
+grep -E "^#define \w+\s+\([0-9].*$" msp430fr2476.h | sed -e "s/).*$/)/" -e "s/^#define //" -e "s/[ ][ ]*//" -e "s/(0x/\\\\x/" -e "s/..)/\\\\x&/" -e "s/)//" -e "s/(/\\\\x/" -e "s/\\\\x\\\\/\\\\x00\\\\/" > msp430fr2476.dat
+cat msp430fr2476_symbols.dat msp430fr2476.dat | tr '\n' '\373' | tr -d '\r' > msp430fr2476_all.dat
+echo -e "$(cat msp430fr2476_all.dat)" > msp430fr2476_all.bin
+./lzss e msp430fr2476_all.bin msp430fr2476_all.lzss
+ls -l msp430fr2476_all.lzss
+xxd -i msp430fr2476_all.lzss > msp430fr2476_all.h
diff --git a/msp430/examples/spi.txt b/msp430/examples/spi.txt
new file mode 100644
index 0000000..64a7189
--- /dev/null
+++ b/msp430/examples/spi.txt
@@ -0,0 +1,15 @@
+unsigned char RXData = 0;
+unsigned char TXData;
+
+: spi-init
+ bit2 bit5 or bit6 or p3sel0 byte set
+ ucb1ctlw0
+ ucswrst over reg set
+ ucmst ucsync or ucckpl or ucmsb or over reg set
+ ucssel__aclk over reg set
+ 2 ucb1brw reg!
+ ucswrst swap reg clear ;
+
+: spi-emit
+ begin ucb1ifg reg@ uctxifg and until
+ ucb1txbuf reg! ;
diff --git a/msp430/examples/uart.txt b/msp430/examples/uart.txt
new file mode 100644
index 0000000..e090e75
--- /dev/null
+++ b/msp430/examples/uart.txt
@@ -0,0 +1,13 @@
+\ UART example, 19200 baud, pins D0/1
+
+: uart-init ( -- )
+ bit5 bit6 or p2sel0 byte set
+ ucswrst uca1ctlw0 reg set
+ ucssel__smclk uca1ctlw0 reg set
+ 52 uca1brw reg!
+ 18688 ucos16 or ucbrf0 or uca1mctlw reg!
+ ucswrst uca1ctlw0 reg clear ;
+
+: uart-emit ( n -- )
+ begin uca1ifg reg@ uctxifg and until
+ uca1txbuf byte! ;
diff --git a/msp430/msp430fr2476.h b/msp430/msp430fr2476.h
index 33c8ee8..fa02406 100644
--- a/msp430/msp430fr2476.h
+++ b/msp430/msp430fr2476.h
@@ -4232,32 +4232,32 @@ sfr_b(UCB1IV_H);
* Interrupt Vectors (offset from 0xFF80 + 0x10 for Password)
************************************************************/
-#define ECOMP0_VECTOR (20) /* 0xFFCA */
-#define PORT6_VECTOR (21) /* 0xFFCC */
-#define PORT5_VECTOR (22) /* 0xFFCE */
-#define PORT4_VECTOR (23) /* 0xFFD0 */
-#define PORT3_VECTOR (24) /* 0xFFD2 */
-#define PORT2_VECTOR (25) /* 0xFFD4 */
-#define PORT1_VECTOR (26) /* 0xFFD6 */
-#define ADC_VECTOR (27) /* 0xFFD8 */
-#define EUSCI_B1_VECTOR (28) /* 0xFFDA */
-#define EUSCI_B0_VECTOR (29) /* 0xFFDC */
-#define EUSCI_A1_VECTOR (30) /* 0xFFDE */
-#define EUSCI_A0_VECTOR (31) /* 0xFFE0 */
-#define WDT_VECTOR (32) /* 0xFFE2 */
-#define RTC_VECTOR (33) /* 0xFFE4 */
-#define TIMER0_B1_VECTOR (34) /* 0xFFE6 */
-#define TIMER0_B0_VECTOR (35) /* 0xFFE8 */
-#define TIMER3_A1_VECTOR (36) /* 0xFFEA */
-#define TIMER3_A0_VECTOR (37) /* 0xFFEC */
-#define TIMER2_A1_VECTOR (38) /* 0xFFEE */
-#define TIMER2_A0_VECTOR (39) /* 0xFFF0 */
-#define TIMER1_A1_VECTOR (40) /* 0xFFF2 */
-#define TIMER1_A0_VECTOR (41) /* 0xFFF4 */
-#define TIMER0_A1_VECTOR (42) /* 0xFFF6 */
-#define TIMER0_A0_VECTOR (43) /* 0xFFF8 */
-#define UNMI_VECTOR (44) /* 0xFFFA */
-#define SYSNMI_VECTOR (45) /* 0xFFFC */
+#define ECOMP0_VECTOR (0x14) /* 0xFFCA */
+#define PORT6_VECTOR (0x15) /* 0xFFCC */
+#define PORT5_VECTOR (0x16) /* 0xFFCE */
+#define PORT4_VECTOR (0x17) /* 0xFFD0 */
+#define PORT3_VECTOR (0x18) /* 0xFFD2 */
+#define PORT2_VECTOR (0x19) /* 0xFFD4 */
+#define PORT1_VECTOR (0x1A) /* 0xFFD6 */
+#define ADC_VECTOR (0x1B) /* 0xFFD8 */
+#define EUSCI_B1_VECTOR (0x1C) /* 0xFFDA */
+#define EUSCI_B0_VECTOR (0x1D) /* 0xFFDC */
+#define EUSCI_A1_VECTOR (0x1E) /* 0xFFDE */
+#define EUSCI_A0_VECTOR (0x1F) /* 0xFFE0 */
+#define WDT_VECTOR (0x20) /* 0xFFE2 */
+#define RTC_VECTOR (0x21) /* 0xFFE4 */
+#define TIMER0_B1_VECTOR (0x22) /* 0xFFE6 */
+#define TIMER0_B0_VECTOR (0x23) /* 0xFFE8 */
+#define TIMER3_A1_VECTOR (0x24) /* 0xFFEA */
+#define TIMER3_A0_VECTOR (0x25) /* 0xFFEC */
+#define TIMER2_A1_VECTOR (0x26) /* 0xFFEE */
+#define TIMER2_A0_VECTOR (0x27) /* 0xFFF0 */
+#define TIMER1_A1_VECTOR (0x28) /* 0xFFF2 */
+#define TIMER1_A0_VECTOR (0x29) /* 0xFFF4 */
+#define TIMER0_A1_VECTOR (0x2A) /* 0xFFF6 */
+#define TIMER0_A0_VECTOR (0x2B) /* 0xFFF8 */
+#define UNMI_VECTOR (0x2C) /* 0xFFFA */
+#define SYSNMI_VECTOR (0x2D) /* 0xFFFC */
#define RESET_VECTOR ("reset") /* 0xFFFE Reset (Highest Priority) */
diff --git a/msp430/msp430fr2476.ld b/msp430/msp430fr2476.ld
index fce197c..a65f652 100644
--- a/msp430/msp430fr2476.ld
+++ b/msp430/msp430fr2476.ld
@@ -44,11 +44,10 @@ MEMORY {
BOOTCODE : ORIGIN = 0x1C00, LENGTH = 0x0400 /* END=0x1FFF, size 1024 */
ROMLIB : ORIGIN = 0xC0000, LENGTH = 0x4000 /* END=0xC3FFF, size 16384 */
BSL1 : ORIGIN = 0xFFC00, LENGTH = 0x0400 /* END=0xFFFFF, size 1024 */
- RAM : ORIGIN = 0x2000, LENGTH = 0x2000 /* END=0x3FFF, size 8192 */
+ RAM (rwx) : ORIGIN = 0x2000, LENGTH = 0x2000 /* END=0x3FFF, size 8192 */
INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 */
- FRAM (rx) : ORIGIN = 0x8000, LENGTH = 0x6600 /* END=0xAFFF, size 9216 */
- LOFRAM (rxw) : ORIGIN = 0xE600, LENGTH = 0x1980 /* END=0xFF7F, size 23424 */
- HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00007FFF
+ FRAM (rwx) : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */
+ HIFRAM (rxw) : ORIGIN = 0x10000, LENGTH = 0x00007FFF
JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004
BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004
BSLCONFIGURATIONSIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0002
@@ -164,19 +163,11 @@ SECTIONS
KEEP (*(.resetvec))
} > RESETVEC
- .lower.rodata :
- {
- . = ALIGN(2);
- *(.lower.rodata.* .lower.rodata)
- } > FRAM
-
.rodata :
{
. = ALIGN(2);
- *(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
- KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > FRAM
/* Note: This is a separate .rodata section for sections which are
@@ -200,8 +191,6 @@ SECTIONS
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
- *(.eh_frame_hdr)
- KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
@@ -225,39 +214,27 @@ SECTIONS
KEEP (*(.dtors))
} > FRAM
- /* This section contains data that is initialised during load
- but not on application reset. */
- .persistent :
- {
- . = ALIGN(2);
- PROVIDE (__persistent_start = .);
- *(.persistent)
- . = ALIGN(2);
- PROVIDE (__persistent_end = .);
- } > FRAM
-
- .tinyram : {} > TINYRAM
+ .tinyram : {
+ PROVIDE (__dict = .);
+ } > TINYRAM
- .lower.data :
- {
+ .libalee : {
. = ALIGN(2);
- PROVIDE (__datastart = .);
- *(.lower.data.* .lower.data)
+ PROVIDE (__libaleedst = .);
+ *(.libalee)
} > RAM AT> FRAM
+ PROVIDE(__libaleebegin = LOADADDR(.libalee));
+ PROVIDE (__libaleeend = LOADADDR(.libalee) + SIZEOF(.libalee));
.data :
{
. = ALIGN(2);
-
- KEEP (*(.jcr))
- *(.data.rel.ro.local) *(.data.rel.ro*)
- *(.dynamic)
+ PROVIDE (__datastart = .);
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
- *(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
@@ -274,27 +251,20 @@ SECTIONS
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
- PROVIDE(__romdatastart = LOADADDR(.lower.data));
- PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));
-
- .lower.bss :
- {
- . = ALIGN(2);
- PROVIDE (__bssstart = .);
- *(.lower.bss.* .lower.bss)
- } > RAM
+ PROVIDE(__romdatastart = LOADADDR(.data));
+ PROVIDE (__romdatacopysize = SIZEOF(.data));
.bss :
{
. = ALIGN(2);
- *(.dynbss)
+ PROVIDE (__bssstart = .);
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
- PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));
+ PROVIDE (__bsssize = SIZEOF(.bss));
/* This section contains data that is not initialised during load
or application reset. */
@@ -307,47 +277,12 @@ SECTIONS
PROVIDE (__noinit_end = .);
} > RAM
- /* We create this section so that "end" will always be in the
- RAM region (matching .stack below), even if the .bss
- section is empty. */
- .heap (NOLOAD) :
- {
- . = ALIGN(2);
- __heap_start__ = .;
- _end = __heap_start__;
- PROVIDE (end = .);
- KEEP (*(.heap))
- _end = .;
- PROVIDE (end = .);
- /* This word is here so that the section is not empty, and thus
- not discarded by the linker. The actual value does not matter
- and is ignored. */
- LONG(0);
- __heap_end__ = .;
- __HeapLimit = __heap_end__;
- } > RAM
- /* WARNING: Do not place anything in RAM here.
- The heap section must be the last section in RAM and the stack
- section must be placed at the very end of the RAM region. */
-
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
- .lower.text :
- {
- . = ALIGN(2);
- *(.lower.text.* .lower.text)
- } > FRAM
-
- .lodict :
- {
- . = ALIGN(2);
- *(.lodict)
- } > LOFRAM
-
.hidict :
{
. = ALIGN(2);
@@ -362,22 +297,21 @@ SECTIONS
KEEP (*(SORT(.crt_*)))
. = ALIGN(2);
- KEEP (*(.lowtext))
-
- . = ALIGN(2);
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
- KEEP (*(.text.*personality*))
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
- *(.interp .hash .dynsym .dynstr .gnu.version*)
- PROVIDE (__etext = .);
- PROVIDE (_etext = .);
- PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
+
+ . = ALIGN(2);
+ PROVIDE (_etext = .);
+ } > FRAM
+
+ .lodict :
+ {
+ . = ALIGN(1024);
+ *(.lodict)
} > FRAM
.info (NOLOAD) : {} > INFOMEM /* MSP430 INFO FLASH MEMORY SEGMENTS */
@@ -430,7 +364,7 @@ SECTIONS
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
- /DISCARD/ : { *(.note.GNU-stack) }
+ /DISCARD/ : { *(.note.GNU-stack .debug_loclists) }
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-05 23:01:07 +0000