diff options
author | Clyne Sullivan <clyne@bitgloo.com> | 2023-08-08 23:10:02 -0400 |
---|---|---|
committer | Clyne Sullivan <clyne@bitgloo.com> | 2023-08-08 23:10:02 -0400 |
commit | f440728644ad3698ffd6af1abcfcc07aad5793c3 (patch) | |
tree | 68aff014ff17933717616f2f8d407b51611afe2b /firmware/source/sclock.cpp |
initial commit
* combine all source files into this monorepo
* convert all third-party source packages into submodules
* small fixes due to changes in latest third-part packages
Diffstat (limited to 'firmware/source/sclock.cpp')
-rw-r--r-- | firmware/source/sclock.cpp | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/firmware/source/sclock.cpp b/firmware/source/sclock.cpp new file mode 100644 index 0000000..6660f95 --- /dev/null +++ b/firmware/source/sclock.cpp @@ -0,0 +1,78 @@ +/** + * @file sclock.cpp + * @brief Manages sampling rate clock speeds. + * + * Copyright (C) 2021 Clyne Sullivan + * + * Distributed under the GNU GPL v3 or later. You should have received a copy of + * the GNU General Public License along with this program. + * If not, see <https://www.gnu.org/licenses/>. + */ + +#include "sclock.hpp" + +GPTDriver *SClock::m_timer = &GPTD6; +unsigned int SClock::m_div = 1; +unsigned int SClock::m_runcount = 0; + +const GPTConfig SClock::m_timer_config = { +#if defined(TARGET_PLATFORM_H7) + .frequency = 4800000, +#else + .frequency = 36000000, +#endif + .callback = nullptr, + .cr2 = TIM_CR2_MMS_1, /* TRGO */ + .dier = 0 +}; + +const std::array<unsigned int, 6> SClock::m_rate_divs = {{ +#if defined(TARGET_PLATFORM_H7) + /* 8k */ 600, + /* 16k */ 300, + /* 20k */ 240, + /* 32k */ 150, + /* 48k */ 100, + /* 96k */ 50 +#else + /* 8k */ 4500, + /* 16k */ 2250, + /* 20k */ 1800, + /* 32k */ 1125, + /* 48k */ 750, + /* 96k */ 375 +#endif +}}; + +void SClock::begin() +{ + gptStart(m_timer, &m_timer_config); +} + +void SClock::start() +{ + if (m_runcount++ == 0) + gptStartContinuous(m_timer, m_div); +} + +void SClock::stop() +{ + if (--m_runcount == 0) + gptStopTimer(m_timer); +} + +void SClock::setRate(SClock::Rate rate) +{ + m_div = m_rate_divs[static_cast<unsigned int>(rate)]; +} + +unsigned int SClock::getRate() +{ + for (unsigned int i = 0; i < m_rate_divs.size(); ++i) { + if (m_rate_divs[i] == m_div) + return i; + } + + return static_cast<unsigned int>(-1); +} + |