| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-10-08 | finish rev2 layout | Clyne Sullivan |
| 2023-09-23 | finalize rev2 schematic | Clyne Sullivan |
| 2023-09-23 | use nucleo 3.3v vdda; add 2nd low-pass stage to input | Clyne Sullivan |
| 2023-09-11 | vdda buffer; vdda for pots; other fixes | Clyne Sullivan |
| 2023-09-05 | wip: schematic fixes based on testing | Clyne Sullivan |
| 2023-08-19 | design finalized; publish pdfs | Clyne Sullivan |
| 2023-08-18 | pcb design finalization | Clyne Sullivan |
| 2023-08-17 | finalize pcb design; add layout file | Clyne Sullivan |
| 2023-08-08 | initial commit | Clyne Sullivan |
 |
index : bitgloo/dsp-paw | |
| Digital Signal Processing Portable All-in-one Workstation | bitgloo |
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