--- /dev/null
+var vector_table: [256] *const fn () void = undefined;
+var vtor: *u32 = @ptrFromInt(0xE000ED08);
+
+pub const vector = enum(u8) {
+ NMI = 2,
+ HardFault,
+ MemManage,
+ BusFault,
+ UsageFault,
+ rsvd7,
+ rsvd8,
+ rsvd9,
+ rsvd10,
+ SVCall,
+ DebugMonitor,
+ rsvd13,
+ PendSV,
+ SysTick,
+};
+
+pub fn initialize() void {
+ register(.NMI, nmi);
+ register(.HardFault, hardfault);
+ register(.MemManage, memmanage);
+ register(.BusFault, busfault);
+ register(.UsageFault, usagefault);
+
+ vtor.* = @as(u32, @intFromPtr(&vector_table));
+}
+
+pub fn register(index: vector, handler: *const fn () void) void {
+ vector_table[@intFromEnum(index)] = handler;
+}
+
+fn nmi() void { while (true) {} }
+fn hardfault() void { while (true) {} }
+fn memmanage() void { while (true) {} }
+fn busfault() void { while (true) {} }
+fn usagefault() void { while (true) {} }
+
const cpu = @import("cpu.zig");
const gpio = @import("gpio.zig");
+const interrupt = @import("interrupt.zig");
const rcc: *[39]u32 = @ptrFromInt(0x40021000);
const gpioa = gpio.gpioa;
export fn _start() callconv(.C) noreturn {
cpu.interrupt_disable();
+ interrupt.initialize();
+ interrupt.register(.SVCall, svcall);
+ cpu.interrupt_enable();
rcc[19] |= 5; // gpio a and c
gpioa.set_mode(5, .output);
gpioc.set_mode(13, .input);
while (true) {
- const state = gpioc.read(13);
- gpioa.write(5, state);
+ asm volatile("svc 0");
}
}
-export fn fault_handler() callconv(.C) void {
- while (true) {}
+fn svcall() void {
+ const state = gpioc.read(13);
+ gpioa.write(5, state);
}