diff options
| author | Clyne Sullivan <clyne@bitgloo.com> | 2025-01-11 13:24:01 -0500 |
|---|---|---|
| committer | Clyne Sullivan <clyne@bitgloo.com> | 2025-01-11 13:24:01 -0500 |
| commit | 5c625ca6f53839488639c2b6b0e66cc89745c9c4 (patch) | |
| tree | 5a2b20a43e982cbaa9a94150aa1aa8f471e52d02 | |
| parent | 8fa66b024f91e47d8b5273e8c85ec5f60fe42d5b (diff) | |
add font table and bcd support
| -rw-r--r-- | src/ada_chip.adb | 12 | ||||
| -rw-r--r-- | src/cpu.ads | 20 |
2 files changed, 31 insertions, 1 deletions
diff --git a/src/ada_chip.adb b/src/ada_chip.adb index b79db1c..1ce198a 100644 --- a/src/ada_chip.adb +++ b/src/ada_chip.adb @@ -101,9 +101,21 @@ procedure Ada_Chip is State.Registers (X_Register (ins)) := State.Delay_Timer; when 16#15# => State.Delay_Timer := State.Registers (X_Register (ins)); + when 16#18# => null; -- TODO: sound when 16#1E# => State.Address_Register := State.Address_Register + Address (State.Registers (X_Register (ins))); + when 16#29# => + State.Address_Register := + Address (State.Registers (X_Register (ins))) * 5; + when 16#33# => begin + State.Memory (State.Address_Register) := + State.Registers (X_Register (ins)) / 100; + State.Memory (State.Address_Register + 1) := + State.Registers (X_Register (ins)) / 10 mod 10; + State.Memory (State.Address_Register + 2) := + State.Registers (X_Register (ins)) mod 10; + end; when 16#55# => CPU.Reg_Store (State, X_Register (ins)); when 16#65# => diff --git a/src/cpu.ads b/src/cpu.ads index 2fb34f2..562402f 100644 --- a/src/cpu.ads +++ b/src/cpu.ads @@ -8,7 +8,25 @@ package CPU is (Index_Type => Natural, Element_Type => Address); type Instance is record - Memory : Bank; + Memory : Bank := [ + 16#F0#, 16#90#, 16#90#, 16#90#, 16#F0#, -- 0 + 16#20#, 16#60#, 16#20#, 16#20#, 16#70#, -- 1 + 16#F0#, 16#10#, 16#F0#, 16#80#, 16#F0#, -- 2 + 16#F0#, 16#10#, 16#F0#, 16#10#, 16#F0#, -- 3 + 16#90#, 16#90#, 16#F0#, 16#10#, 16#10#, -- 4 + 16#F0#, 16#80#, 16#F0#, 16#10#, 16#F0#, -- 5 + 16#F0#, 16#80#, 16#F0#, 16#90#, 16#F0#, -- 6 + 16#F0#, 16#10#, 16#20#, 16#40#, 16#40#, -- 7 + 16#F0#, 16#90#, 16#F0#, 16#90#, 16#F0#, -- 8 + 16#F0#, 16#90#, 16#F0#, 16#10#, 16#F0#, -- 9 + 16#F0#, 16#90#, 16#F0#, 16#90#, 16#90#, -- A + 16#E0#, 16#90#, 16#E0#, 16#90#, 16#E0#, -- B + 16#F0#, 16#80#, 16#80#, 16#80#, 16#F0#, -- C + 16#E0#, 16#90#, 16#90#, 16#90#, 16#E0#, -- D + 16#F0#, 16#80#, 16#F0#, 16#80#, 16#F0#, -- E + 16#F0#, 16#80#, 16#F0#, 16#80#, 16#80#, -- F + others => 0 + ]; Registers : Register_Bank; Program_Counter : Address := Start_Address; Address_Register : Address := 0; |