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| author | Clyne <clyne@bitgloo.com> | 2024-11-23 11:54:13 -0500 |
|---|---|---|
| committer | Clyne <clyne@bitgloo.com> | 2024-11-23 11:54:13 -0500 |
| commit | f8d0898f53464cdc6b01cbee066536afac7915f1 (patch) | |
| tree | f3801e143f606c0ae820b0957a734aacd8d7b755 | |
| parent | 7e0631622917b64a72f4a7d0fb6c2c4e962d8b6b (diff) | |
| -rw-r--r-- | ads1278_core.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/ads1278_core.c b/ads1278_core.c index e47f0c7..6a199d4 100644 --- a/ads1278_core.c +++ b/ads1278_core.c @@ -11,11 +11,11 @@ // 10'000'000 Hz = 52 kSPS #define TRANSFER_HZ (27000000) -// TODO: minimize 45us delay between xfers - -// 24-11-23: We're hitting 130 kSPS initially, but are eventually slowed down -// to 87 kSPS. Need to investigate high-priority workers, forcing a high SPI -// clock speed, and/or minimizing overall latency. +// TODO: +// - Require max CPU clock speed so 130 kSPS can be achieved +// - Minimize ~30us delay between transfers +// - Figure out how to get sample data out +// - Create configuration interface struct ads1278 { |