From d6869d1ec4bd24cd2c3eafa534f0849b25ec5607 Mon Sep 17 00:00:00 2001
From: Clyne Sullivan <tullivan99@gmail.com>
Date: Thu, 28 Feb 2019 17:04:22 -0500
Subject: added basic code
---
arduino/cores/nRF5/linker/gcc_startup_nrf52.S | 421 ++++++++++++++++++++++
arduino/cores/nRF5/linker/gcc_startup_nrf52840.S | 425 +++++++++++++++++++++++
arduino/cores/nRF5/linker/nrf52832_s132_v6.ld | 39 +++
arduino/cores/nRF5/linker/nrf52840_s140_v6.ld | 38 ++
arduino/cores/nRF5/linker/nrf52_common.ld | 175 ++++++++++
5 files changed, 1098 insertions(+)
create mode 100755 arduino/cores/nRF5/linker/gcc_startup_nrf52.S
create mode 100755 arduino/cores/nRF5/linker/gcc_startup_nrf52840.S
create mode 100755 arduino/cores/nRF5/linker/nrf52832_s132_v6.ld
create mode 100755 arduino/cores/nRF5/linker/nrf52840_s140_v6.ld
create mode 100755 arduino/cores/nRF5/linker/nrf52_common.ld
(limited to 'arduino/cores/nRF5/linker')
diff --git a/arduino/cores/nRF5/linker/gcc_startup_nrf52.S b/arduino/cores/nRF5/linker/gcc_startup_nrf52.S
new file mode 100755
index 0000000..2778fac
--- /dev/null
+++ b/arduino/cores/nRF5/linker/gcc_startup_nrf52.S
@@ -0,0 +1,421 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+#ifdef NRF52832_XXAA
+
+ .syntax unified
+ .arch armv7e-m
+
+/* Adafruit define stack & heap inside linker script */
+/*
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+ .section .stack
+#if defined(__STARTUP_CONFIG)
+ .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+ .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+ .align 3
+ .equ Stack_Size, __STACK_SIZE
+#else
+ .align 3
+ .equ Stack_Size, 8192
+#endif
+ .globl __StackTop
+ .globl __StackLimit
+__StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+__StackTop:
+ .size __StackTop, . - __StackTop
+
+ .section .heap
+ .align 3
+#if defined(__STARTUP_CONFIG)
+ .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+ .equ Heap_Size, __HEAP_SIZE
+#else
+ .equ Heap_Size, 8192
+#endif
+ .globl __HeapBase
+ .globl __HeapLimit
+__HeapBase:
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+__HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
+*/
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
+__isr_vector:
+ .long __StackTop /* Top of Stack */
+ .long Reset_Handler
+ .long NMI_Handler
+ .long HardFault_Handler
+ .long MemoryManagement_Handler
+ .long BusFault_Handler
+ .long UsageFault_Handler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long SVC_Handler
+ .long DebugMon_Handler
+ .long 0 /*Reserved */
+ .long PendSV_Handler
+ .long SysTick_Handler
+
+ /* External Interrupts */
+ .long POWER_CLOCK_IRQHandler
+ .long RADIO_IRQHandler
+ .long UARTE0_UART0_IRQHandler
+ .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ .long NFCT_IRQHandler
+ .long GPIOTE_IRQHandler
+ .long SAADC_IRQHandler
+ .long TIMER0_IRQHandler
+ .long TIMER1_IRQHandler
+ .long TIMER2_IRQHandler
+ .long RTC0_IRQHandler
+ .long TEMP_IRQHandler
+ .long RNG_IRQHandler
+ .long ECB_IRQHandler
+ .long CCM_AAR_IRQHandler
+ .long WDT_IRQHandler
+ .long RTC1_IRQHandler
+ .long QDEC_IRQHandler
+ .long COMP_LPCOMP_IRQHandler
+ .long SWI0_EGU0_IRQHandler
+ .long SWI1_EGU1_IRQHandler
+ .long SWI2_EGU2_IRQHandler
+ .long SWI3_EGU3_IRQHandler
+ .long SWI4_EGU4_IRQHandler
+ .long SWI5_EGU5_IRQHandler
+ .long TIMER3_IRQHandler
+ .long TIMER4_IRQHandler
+ .long PWM0_IRQHandler
+ .long PDM_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long MWU_IRQHandler
+ .long PWM1_IRQHandler
+ .long PWM2_IRQHandler
+ .long SPIM2_SPIS2_SPI2_IRQHandler
+ .long RTC2_IRQHandler
+ .long I2S_IRQHandler
+ .long FPU_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+
+ .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+ .text
+ .thumb
+ .thumb_func
+ .align 1
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to.
+ * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ * the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__bss_start__
+
+ subs r3, r3, r2
+ ble .L_loop1_done
+
+.L_loop1:
+ subs r3, r3, #4
+ ldr r0, [r1,r3]
+ str r0, [r2,r3]
+ bgt .L_loop1
+
+.L_loop1_done:
+
+
+/* Adafruit fill stack region with pattern 0xADADADAD */
+ ldr r0, =__StackLimit
+ ldr r1, =__StackSize
+ ldr r2, =0xADADADAD
+.L_fill:
+ str r2, [r0]
+ adds r0, 4
+ subs r1, 4
+ bne .L_fill
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+ movs r0, 0
+
+ subs r2, r2, r1
+ ble .L_loop3_done
+
+.L_loop3:
+ subs r2, r2, #4
+ str r0, [r1, r2]
+ bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+ bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+ bl __START
+
+ .pool
+ .size Reset_Handler,.-Reset_Handler
+
+ .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+ .weak NMI_Handler
+ .type NMI_Handler, %function
+NMI_Handler:
+ b .
+ .size NMI_Handler, . - NMI_Handler
+
+
+ .weak HardFault_Handler
+ .type HardFault_Handler, %function
+HardFault_Handler:
+ b .
+ .size HardFault_Handler, . - HardFault_Handler
+
+
+ .weak MemoryManagement_Handler
+ .type MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+ b .
+ .size MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+ .weak BusFault_Handler
+ .type BusFault_Handler, %function
+BusFault_Handler:
+ b .
+ .size BusFault_Handler, . - BusFault_Handler
+
+
+ .weak UsageFault_Handler
+ .type UsageFault_Handler, %function
+UsageFault_Handler:
+ b .
+ .size UsageFault_Handler, . - UsageFault_Handler
+
+
+ .weak SVC_Handler
+ .type SVC_Handler, %function
+SVC_Handler:
+ b .
+ .size SVC_Handler, . - SVC_Handler
+
+
+ .weak DebugMon_Handler
+ .type DebugMon_Handler, %function
+DebugMon_Handler:
+ b .
+ .size DebugMon_Handler, . - DebugMon_Handler
+
+
+ .weak PendSV_Handler
+ .type PendSV_Handler, %function
+PendSV_Handler:
+ b .
+ .size PendSV_Handler, . - PendSV_Handler
+
+
+ .weak SysTick_Handler
+ .type SysTick_Handler, %function
+SysTick_Handler:
+ b .
+ .size SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+ .globl Default_Handler
+ .type Default_Handler, %function
+Default_Handler:
+ b .
+ .size Default_Handler, . - Default_Handler
+
+ .macro IRQ handler
+ .weak \handler
+ .set \handler, Default_Handler
+ .endm
+
+ IRQ POWER_CLOCK_IRQHandler
+ IRQ RADIO_IRQHandler
+ IRQ UARTE0_UART0_IRQHandler
+ IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ IRQ NFCT_IRQHandler
+ IRQ GPIOTE_IRQHandler
+ IRQ SAADC_IRQHandler
+ IRQ TIMER0_IRQHandler
+ IRQ TIMER1_IRQHandler
+ IRQ TIMER2_IRQHandler
+ IRQ RTC0_IRQHandler
+ IRQ TEMP_IRQHandler
+ IRQ RNG_IRQHandler
+ IRQ ECB_IRQHandler
+ IRQ CCM_AAR_IRQHandler
+ IRQ WDT_IRQHandler
+ IRQ RTC1_IRQHandler
+ IRQ QDEC_IRQHandler
+ IRQ COMP_LPCOMP_IRQHandler
+ IRQ SWI0_EGU0_IRQHandler
+ IRQ SWI1_EGU1_IRQHandler
+ IRQ SWI2_EGU2_IRQHandler
+ IRQ SWI3_EGU3_IRQHandler
+ IRQ SWI4_EGU4_IRQHandler
+ IRQ SWI5_EGU5_IRQHandler
+ IRQ TIMER3_IRQHandler
+ IRQ TIMER4_IRQHandler
+ IRQ PWM0_IRQHandler
+ IRQ PDM_IRQHandler
+ IRQ MWU_IRQHandler
+ IRQ PWM1_IRQHandler
+ IRQ PWM2_IRQHandler
+ IRQ SPIM2_SPIS2_SPI2_IRQHandler
+ IRQ RTC2_IRQHandler
+ IRQ I2S_IRQHandler
+ IRQ FPU_IRQHandler
+
+ .end
+
+#endif
diff --git a/arduino/cores/nRF5/linker/gcc_startup_nrf52840.S b/arduino/cores/nRF5/linker/gcc_startup_nrf52840.S
new file mode 100755
index 0000000..20cfb27
--- /dev/null
+++ b/arduino/cores/nRF5/linker/gcc_startup_nrf52840.S
@@ -0,0 +1,425 @@
+/*
+
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
+
+ SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+#ifdef NRF52840_XXAA
+
+ .syntax unified
+ .arch armv7e-m
+/* Adafruit define stack & heap inside linker script */
+/*
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+ .section .stack
+#if defined(__STARTUP_CONFIG)
+ .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+ .equ Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+ .align 3
+ .equ Stack_Size, __STACK_SIZE
+#else
+ .align 3
+ .equ Stack_Size, 8192
+#endif
+ .globl __StackTop
+ .globl __StackLimit
+__StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+__StackTop:
+ .size __StackTop, . - __StackTop
+
+ .section .heap
+ .align 3
+#if defined(__STARTUP_CONFIG)
+ .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+ .equ Heap_Size, __HEAP_SIZE
+#else
+ .equ Heap_Size, 8192
+#endif
+ .globl __HeapBase
+ .globl __HeapLimit
+__HeapBase:
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+__HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
+*/
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
+__isr_vector:
+ .long __StackTop /* Top of Stack */
+ .long Reset_Handler
+ .long NMI_Handler
+ .long HardFault_Handler
+ .long MemoryManagement_Handler
+ .long BusFault_Handler
+ .long UsageFault_Handler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long SVC_Handler
+ .long DebugMon_Handler
+ .long 0 /*Reserved */
+ .long PendSV_Handler
+ .long SysTick_Handler
+
+ /* External Interrupts */
+ .long POWER_CLOCK_IRQHandler
+ .long RADIO_IRQHandler
+ .long UARTE0_UART0_IRQHandler
+ .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ .long NFCT_IRQHandler
+ .long GPIOTE_IRQHandler
+ .long SAADC_IRQHandler
+ .long TIMER0_IRQHandler
+ .long TIMER1_IRQHandler
+ .long TIMER2_IRQHandler
+ .long RTC0_IRQHandler
+ .long TEMP_IRQHandler
+ .long RNG_IRQHandler
+ .long ECB_IRQHandler
+ .long CCM_AAR_IRQHandler
+ .long WDT_IRQHandler
+ .long RTC1_IRQHandler
+ .long QDEC_IRQHandler
+ .long COMP_LPCOMP_IRQHandler
+ .long SWI0_EGU0_IRQHandler
+ .long SWI1_EGU1_IRQHandler
+ .long SWI2_EGU2_IRQHandler
+ .long SWI3_EGU3_IRQHandler
+ .long SWI4_EGU4_IRQHandler
+ .long SWI5_EGU5_IRQHandler
+ .long TIMER3_IRQHandler
+ .long TIMER4_IRQHandler
+ .long PWM0_IRQHandler
+ .long PDM_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long MWU_IRQHandler
+ .long PWM1_IRQHandler
+ .long PWM2_IRQHandler
+ .long SPIM2_SPIS2_SPI2_IRQHandler
+ .long RTC2_IRQHandler
+ .long I2S_IRQHandler
+ .long FPU_IRQHandler
+ .long USBD_IRQHandler
+ .long UARTE1_IRQHandler
+ .long QSPI_IRQHandler
+ .long CRYPTOCELL_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long PWM3_IRQHandler
+ .long 0 /*Reserved */
+ .long SPIM3_IRQHandler
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+ .long 0 /*Reserved */
+
+ .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+ .text
+ .thumb
+ .thumb_func
+ .align 1
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ * __etext: LMA of start of the section to copy from. Usually end of text
+ * __data_start__: VMA of start of the section to copy to.
+ * __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ * the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__bss_start__
+
+ subs r3, r3, r2
+ ble .L_loop1_done
+
+.L_loop1:
+ subs r3, r3, #4
+ ldr r0, [r1,r3]
+ str r0, [r2,r3]
+ bgt .L_loop1
+
+.L_loop1_done:
+
+/* Adafruit fill stack region with pattern 0xADADADAD */
+ ldr r0, =__StackLimit
+ ldr r1, =__StackSize
+ ldr r2, =0xADADADAD
+.L_fill:
+ str r2, [r0]
+ adds r0, 4
+ subs r1, 4
+ bne .L_fill
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+
+ movs r0, 0
+
+ subs r2, r2, r1
+ ble .L_loop3_done
+
+.L_loop3:
+ subs r2, r2, #4
+ str r0, [r1, r2]
+ bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+ bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+ bl __START
+
+ .pool
+ .size Reset_Handler,.-Reset_Handler
+
+ .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+ .weak NMI_Handler
+ .type NMI_Handler, %function
+NMI_Handler:
+ b .
+ .size NMI_Handler, . - NMI_Handler
+
+
+ .weak HardFault_Handler
+ .type HardFault_Handler, %function
+HardFault_Handler:
+ b .
+ .size HardFault_Handler, . - HardFault_Handler
+
+
+ .weak MemoryManagement_Handler
+ .type MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+ b .
+ .size MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+ .weak BusFault_Handler
+ .type BusFault_Handler, %function
+BusFault_Handler:
+ b .
+ .size BusFault_Handler, . - BusFault_Handler
+
+
+ .weak UsageFault_Handler
+ .type UsageFault_Handler, %function
+UsageFault_Handler:
+ b .
+ .size UsageFault_Handler, . - UsageFault_Handler
+
+
+ .weak SVC_Handler
+ .type SVC_Handler, %function
+SVC_Handler:
+ b .
+ .size SVC_Handler, . - SVC_Handler
+
+
+ .weak DebugMon_Handler
+ .type DebugMon_Handler, %function
+DebugMon_Handler:
+ b .
+ .size DebugMon_Handler, . - DebugMon_Handler
+
+
+ .weak PendSV_Handler
+ .type PendSV_Handler, %function
+PendSV_Handler:
+ b .
+ .size PendSV_Handler, . - PendSV_Handler
+
+
+ .weak SysTick_Handler
+ .type SysTick_Handler, %function
+SysTick_Handler:
+ b .
+ .size SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+ .globl Default_Handler
+ .type Default_Handler, %function
+Default_Handler:
+ b .
+ .size Default_Handler, . - Default_Handler
+
+ .macro IRQ handler
+ .weak \handler
+ .set \handler, Default_Handler
+ .endm
+
+ IRQ POWER_CLOCK_IRQHandler
+ IRQ RADIO_IRQHandler
+ IRQ UARTE0_UART0_IRQHandler
+ IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+ IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+ IRQ NFCT_IRQHandler
+ IRQ GPIOTE_IRQHandler
+ IRQ SAADC_IRQHandler
+ IRQ TIMER0_IRQHandler
+ IRQ TIMER1_IRQHandler
+ IRQ TIMER2_IRQHandler
+ IRQ RTC0_IRQHandler
+ IRQ TEMP_IRQHandler
+ IRQ RNG_IRQHandler
+ IRQ ECB_IRQHandler
+ IRQ CCM_AAR_IRQHandler
+ IRQ WDT_IRQHandler
+ IRQ RTC1_IRQHandler
+ IRQ QDEC_IRQHandler
+ IRQ COMP_LPCOMP_IRQHandler
+ IRQ SWI0_EGU0_IRQHandler
+ IRQ SWI1_EGU1_IRQHandler
+ IRQ SWI2_EGU2_IRQHandler
+ IRQ SWI3_EGU3_IRQHandler
+ IRQ SWI4_EGU4_IRQHandler
+ IRQ SWI5_EGU5_IRQHandler
+ IRQ TIMER3_IRQHandler
+ IRQ TIMER4_IRQHandler
+ IRQ PWM0_IRQHandler
+ IRQ PDM_IRQHandler
+ IRQ MWU_IRQHandler
+ IRQ PWM1_IRQHandler
+ IRQ PWM2_IRQHandler
+ IRQ SPIM2_SPIS2_SPI2_IRQHandler
+ IRQ RTC2_IRQHandler
+ IRQ I2S_IRQHandler
+ IRQ FPU_IRQHandler
+ IRQ USBD_IRQHandler
+ IRQ UARTE1_IRQHandler
+ IRQ QSPI_IRQHandler
+ IRQ CRYPTOCELL_IRQHandler
+ IRQ PWM3_IRQHandler
+ IRQ SPIM3_IRQHandler
+
+ .end
+
+#endif
diff --git a/arduino/cores/nRF5/linker/nrf52832_s132_v6.ld b/arduino/cores/nRF5/linker/nrf52832_s132_v6.ld
new file mode 100755
index 0000000..9c8af1f
--- /dev/null
+++ b/arduino/cores/nRF5/linker/nrf52832_s132_v6.ld
@@ -0,0 +1,39 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0x6D000-0x26000
+
+ /* SRAM required by S132 depend on
+ * - Attribute Table Size
+ * - Vendor UUID count
+ * - Max ATT MTU
+ * - Concurrent connection peripheral + central + secure links
+ * - Event Len, HVN queue, Write CMD queue
+ */
+ /* RAM (rwx) : ORIGIN = 0x20003200, LENGTH = 0x20010000 - 0x20003200 */
+ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20010000 - 0x20003400
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM
+
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM
+} INSERT AFTER .data;
+
+INCLUDE "nrf52_common.ld"
diff --git a/arduino/cores/nRF5/linker/nrf52840_s140_v6.ld b/arduino/cores/nRF5/linker/nrf52840_s140_v6.ld
new file mode 100755
index 0000000..dc71846
--- /dev/null
+++ b/arduino/cores/nRF5/linker/nrf52840_s140_v6.ld
@@ -0,0 +1,38 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x26000, LENGTH = 0xED000 - 0x26000
+
+ /* SRAM required by S132 depend on
+ * - Attribute Table Size
+ * - Vendor UUID count
+ * - Max ATT MTU
+ * - Concurrent connection peripheral + central + secure links
+ * - Event Len, HVN queue, Write CMD queue
+ */
+ RAM (rwx) : ORIGIN = 0x20003400, LENGTH = 0x20040000 - 0x20003400
+}
+
+SECTIONS
+{
+ . = ALIGN(4);
+ .svc_data :
+ {
+ PROVIDE(__start_svc_data = .);
+ KEEP(*(.svc_data))
+ PROVIDE(__stop_svc_data = .);
+ } > RAM
+
+ .fs_data :
+ {
+ PROVIDE(__start_fs_data = .);
+ KEEP(*(.fs_data))
+ PROVIDE(__stop_fs_data = .);
+ } > RAM
+} INSERT AFTER .data;
+
+INCLUDE "nrf52_common.ld"
diff --git a/arduino/cores/nRF5/linker/nrf52_common.ld b/arduino/cores/nRF5/linker/nrf52_common.ld
new file mode 100755
index 0000000..0695855
--- /dev/null
+++ b/arduino/cores/nRF5/linker/nrf52_common.ld
@@ -0,0 +1,175 @@
+/* Linker script for Nordic Semiconductor nRF52 devices
+ *
+ * Version: Sourcery G++ 4.5-1
+ * Support: https://support.codesourcery.com/GNUToolchain/
+ *
+ * Copyright (c) 2007, 2008, 2009, 2010 CodeSourcery, Inc.
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ * Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ * __exidx_start
+ * __exidx_end
+ * __etext
+ * __data_start__
+ * __preinit_array_start
+ * __preinit_array_end
+ * __init_array_start
+ * __init_array_end
+ * __fini_array_start
+ * __fini_array_end
+ * __data_end__
+ * __bss_start__
+ * __bss_end__
+ * __end__
+ * end
+ * __HeapBase
+ * __HeapLimit
+ * __StackLimit
+ * __StackTop
+ * __stack
+ */
+ENTRY(Reset_Handler)
+
+/* Adafruit
+ * Stack is used by ISR and SoftDevice only, other code run on thread's allocated stack from heap.
+ * Maximum stack used by S132's spec is 1536 byte. Therefore 2KB should be enough
+ */
+__StackSize = 1024*2;
+
+/* Set stack top to end of RAM, and stack limit move down by size of stack_dummy section */
+PROVIDE(__StackTop = ORIGIN(RAM) + LENGTH(RAM));
+PROVIDE(__StackLimit = __StackTop - __StackSize);
+PROVIDE(__stack = __StackTop);
+
+/* Flash region */
+__flash_arduino_start = ORIGIN(FLASH);
+__flash_arduino_end = ORIGIN(FLASH) + LENGTH(FLASH);
+
+SECTIONS
+{
+ .text :
+ {
+ KEEP(*(.isr_vector))
+ *(.text*)
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+ } > FLASH
+
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
+
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
+
+ __etext = .;
+
+ .data : AT (__etext)
+ {
+ __data_start__ = .;
+ *(vtable)
+ *(.data*)
+
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __data_end__ = .;
+
+ } > RAM
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } > RAM
+
+ .heap :
+ {
+ __HeapBase = .;
+ __end__ = .;
+ PROVIDE(end = .);
+ KEEP(*(.heap*))
+ . = ALIGN(__StackLimit);
+ __HeapLimit = .;
+ } > RAM
+
+ /* .stack_dummy section doesn't contains any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ /*
+ .stack_dummy (COPY):
+ {
+ KEEP(*(.stack*))
+ } > RAM
+ */
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+ ASSERT(__StackLimit >= __bss_end__, "region RAM overflowed with stack")
+}
+
--
cgit v1.2.3