From 48026bb824fd2d9cfb00ecd040db6ef3a416bae9 Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Fri, 22 Jan 2021 21:43:36 -0500 Subject: upload initial port --- .../os/common/ports/e200/compilers/CW/chcoreasm.s | 119 +++++++++ .../os/common/ports/e200/compilers/CW/chtypes.h | 97 ++++++++ .../os/common/ports/e200/compilers/CW/ivor.s | 205 ++++++++++++++++ .../os/common/ports/e200/compilers/GCC/chcoreasm.S | 113 +++++++++ .../os/common/ports/e200/compilers/GCC/chtypes.h | 97 ++++++++ .../os/common/ports/e200/compilers/GCC/ivor.S | 263 ++++++++++++++++++++ .../os/common/ports/e200/compilers/GCC/mk/port.mk | 13 + .../os/common/ports/e200/compilers/GHS/chcoreasm.s | 107 +++++++++ .../os/common/ports/e200/compilers/GHS/chtypes.h | 97 ++++++++ .../os/common/ports/e200/compilers/GHS/ivor.s | 265 +++++++++++++++++++++ .../os/common/ports/e200/compilers/GHS/mk/port.mk | 13 + 11 files changed, 1389 insertions(+) create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chcoreasm.s create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chtypes.h create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/ivor.s create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chcoreasm.S create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chtypes.h create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/ivor.S create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/mk/port.mk create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chcoreasm.s create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chtypes.h create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/ivor.s create mode 100644 ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/mk/port.mk (limited to 'ChibiOS_20.3.2/os/common/ports/e200/compilers') diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chcoreasm.s b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chcoreasm.s new file mode 100644 index 0000000..5e55281 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chcoreasm.s @@ -0,0 +1,119 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GCC/chcoreasm.s + * @brief Power Architecture port low level code. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +/* + * Imports the PPC configuration headers. + */ +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + +#if defined(_CHIBIOS_RT_CONF_) + .extern chThdExit +#endif + +#if PPC_USE_VLE == TRUE + .section .text_vle, 16 + + .align 2 + .globl _port_switch + .type _port_switch, @function +_port_switch: + e_subi r1, r1, 80 + se_mflr r0 + e_stw r0, 84(r1) + mfcr r0 + se_stw r0, 0(r1) + e_stmw r14, 4(r1) + + se_stw r1, 12(r4) + se_lwz r1, 12(r3) + + e_lmw r14, 4(r1) + se_lwz r0, 0(r1) + mtcr r0 + e_lwz r0, 84(r1) + se_mtlr r0 + e_addi r1, r1, 80 + se_blr + + .align 2 + .globl _port_thread_start + .type _port_thread_start, @function +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + wrteei 1 + mr r3, r31 + mtctr r30 + se_bctrl + se_li r0, 0 + e_bl chThdExit + +#else /* PPC_USE_VLE == FALSE */ + +#error "non-VLE mode not yet implemented" + +#endif /* PPC_USE_VLE == FALSE */ + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chtypes.h b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chtypes.h new file mode 100644 index 0000000..22be822 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/chtypes.h @@ -0,0 +1,97 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/CW/chtypes.h + * @brief Power e200 port system types. + * + * @addtogroup PPC_CW_CORE + * @{ + */ + +#ifndef CHTYPES_H +#define CHTYPES_H + +#include +#include +#include + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then some + * time-dependent services could be degraded. + */ +#define NOINLINE __attribute__((noinline)) + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __attribute__((packed)) + +/** + * @brief Memory alignment enforcement for variables. + */ +#define ALIGNED_VAR(n) __attribute__((aligned(n))) + +/** + * @brief Size of a pointer. + * @note To be used where the sizeof operator cannot be used, preprocessor + * expressions for example. + */ +#define SIZEOF_PTR 4 + +/** + * @brief True if alignment is low-high in current architecture. + */ +#define REVERSE_ORDER 0 + +#endif /* CHTYPES_H */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/ivor.s b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/ivor.s new file mode 100644 index 0000000..64b2408 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/CW/ivor.s @@ -0,0 +1,205 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ivor.s + * @brief Kernel ISRs. + * + * @addtogroup PPC_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +/* + * Imports the PPC configuration headers. + */ +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + + .extern _stats_start_measure_crit_thd + .extern _stats_stop_measure_crit_thd + .extern _dbg_check_lock + .extern _dbg_check_unlock + .extern chSchIsPreemptionRequired + .extern chSchDoReschedule + .extern chSysTimerHandlerI + + .section .handlers, text_vle + +#if PPC_USE_VLE == TRUE + +#if PPC_SUPPORTS_DECREMENTER + /* + * _IVOR10 handler (Book-E decrementer). + */ + .align 16 + .globl _IVOR10 + .type _IVOR10, @function +_IVOR10: + /* Saving the external context (port_extctx structure).*/ + e_stwu r1, -80(r1) + e_stmvsrrw 8(r1) /* Saves PC, MSR. */ + e_stmvsprw 16(r1) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(r1) /* Saves GPR0, GPR3...GPR12. */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Reset DIE bit in TSR register.*/ + e_lis r3, 0x0800 /* DIS bit mask. */ + mtspr 336, r3 /* TSR register. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_enter_isr + bl _dbg_check_lock_from_isr +#endif + /* System tick handler invocation.*/ + e_bl chSysTimerHandlerI +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock_from_isr + bl _dbg_check_leave_isr +#endif + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Jumps to the common IVOR epilogue code.*/ + se_b _ivor_exit +#endif /* PPC_SUPPORTS_DECREMENTER */ + + /* + * _IVOR4 handler (Book-E external interrupt). + */ + .align 16 + .globl _IVOR4 + .type _IVOR4, @function +_IVOR4: + /* Saving the external context (port_extctx structure).*/ + e_stwu r1, -80(r1) + e_stmvsrrw 8(r1) /* Saves PC, MSR. */ + e_stmvsprw 16(r1) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(r1) /* Saves GPR0, GPR3...GPR12. */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Software vector address from the INTC register.*/ + e_lis r3, INTC_IACKR_ADDR@h + e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */ + se_lwz r3, 0(r3) /* IACKR register value. */ + se_lwz r3, 0(r3) + mtCTR r3 /* Software handler address. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + + /* Exectes the software handler.*/ + se_bctrl + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Informs the INTC that the interrupt has been served.*/ + mbar 0 + e_lis r3, INTC_EOIR_ADDR@h + e_or2i r3, INTC_EOIR_ADDR@l + se_stw r3, 0(r3) /* Writing any value should do. */ + + /* Common IVOR epilogue code, context restore.*/ + .globl _ivor_exit +_ivor_exit: + /* Decreasing the SPGR0 register.*/ + mfspr r0, 272 + se_subi r0, 1 + mtspr 272, r0 + +#if CH_DBG_STATISTICS + e_bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_lock +#endif + e_bl chSchIsPreemptionRequired + e_cmpli cr0, r3, 0 + se_beq .noresch + e_bl chSchDoReschedule +.noresch: +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + e_bl _stats_stop_measure_crit_thd +#endif + + /* Restoring the external context.*/ + e_lmvgprw 32(r1) /* Restores GPR0, GPR3...GPR12. */ + e_lmvsprw 16(r1) /* Restores CR, LR, CTR, XER. */ + e_lmvsrrw 8(r1) /* Restores PC, MSR. */ + e_addi r1, r1, 80 /* Back to the previous frame. */ + se_rfi + +#else /* PPC_USE_VLE == FALSE */ + +#error "non-VLE mode not yet implemented" + +#endif /* PPC_USE_VLE == FALSE */ + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chcoreasm.S b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chcoreasm.S new file mode 100644 index 0000000..4b31238 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chcoreasm.S @@ -0,0 +1,113 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GCC/chcoreasm.S + * @brief Power Architecture port low level code. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if defined(__HIGHTEC__) +#define e_subi subi +#endif + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + +#if PPC_USE_VLE == TRUE + .section .text_vle, "ax" +#else + .section .text, "ax" +#endif + + .align 2 + .globl _port_switch + .type _port_switch, @function +_port_switch: + e_subi sp, sp, 80 + mflr r0 + e_stw r0, 84(sp) + mfcr r0 + se_stw r0, 0(sp) + e_stmw r14, 4(sp) + + se_stw sp, CONTEXT_OFFSET(r4) + se_lwz sp, CONTEXT_OFFSET(r3) + + e_lmw r14, 4(sp) + se_lwz r0, 0(sp) + mtcr r0 + e_lwz r0, 84(sp) + mtlr r0 + e_addi sp, sp, 80 + se_blr + + .align 2 + .globl _port_thread_start + .type _port_thread_start, @function +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + e_bl _stats_stop_measure_crit_thd +#endif + wrteei 1 + mr r3, r31 + mtctr r30 + se_bctrl + e_li r0, 0 + e_bl chThdExit + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chtypes.h b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chtypes.h new file mode 100644 index 0000000..ae4d116 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/chtypes.h @@ -0,0 +1,97 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GCC/chtypes.h + * @brief Power e200 port system types. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +#ifndef CHTYPES_H +#define CHTYPES_H + +#include +#include +#include + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then some + * time-dependent services could be degraded. + */ +#define NOINLINE __attribute__((noinline)) + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __attribute__((packed)) + +/** + * @brief Memory alignment enforcement for variables. + */ +#define ALIGNED_VAR(n) __attribute__((aligned(n))) + +/** + * @brief Size of a pointer. + * @note To be used where the sizeof operator cannot be used, preprocessor + * expressions for example. + */ +#define SIZEOF_PTR 4 + +/** + * @brief True if alignment is low-high in current architecture. + */ +#define REVERSE_ORDER 0 + +#endif /* CHTYPES_H */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/ivor.S b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/ivor.S new file mode 100644 index 0000000..6bc2f5b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/ivor.S @@ -0,0 +1,263 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file GCC/ivor.S + * @brief Kernel ISRs. + * + * @addtogroup PPC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/* + * Imports the PPC configuration headers. + */ +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if defined(__HIGHTEC__) +#define se_beq beq +#endif + +#if !defined(__DOXYGEN__) + + .section .handlers, "ax" + +#if PPC_SUPPORTS_DECREMENTER + /* + * _IVOR10 handler (Book-E decrementer). + */ + .align 4 + .globl _IVOR10 + .type _IVOR10, @function +_IVOR10: + /* Saving the external context (port_extctx structure).*/ + e_stwu sp, -80(sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(sp) /* Saves PC, MSR. */ + e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_stw r0, 32(sp) /* Saves GPR0. */ + mfSRR0 r0 + se_stw r0, 8(sp) /* Saves PC. */ + mfSRR1 r0 + se_stw r0, 12(sp) /* Saves MSR. */ + mfCR r0 + se_stw r0, 16(sp) /* Saves CR. */ + mfLR r0 + se_stw r0, 20(sp) /* Saves LR. */ + mfCTR r0 + se_stw r0, 24(sp) /* Saves CTR. */ + mfXER r0 + se_stw r0, 28(sp) /* Saves XER. */ + se_stw r3, 36(sp) /* Saves GPR3...GPR12. */ + se_stw r4, 40(sp) + se_stw r5, 44(sp) + se_stw r6, 48(sp) + se_stw r7, 52(sp) + e_stw r8, 56(sp) + e_stw r9, 60(sp) + e_stw r10, 64(sp) + e_stw r11, 68(sp) + e_stw r12, 72(sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Reset DIE bit in TSR register.*/ + e_lis r3, 0x0800 /* DIS bit mask. */ + mtspr 336, r3 /* TSR register. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_enter_isr + e_bl _dbg_check_lock_from_isr +#endif + /* System tick handler invocation.*/ + e_bl chSysTimerHandlerI +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock_from_isr + e_bl _dbg_check_leave_isr +#endif + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Jumps to the common IVOR epilogue code.*/ + e_b _ivor_exit +#endif /* PPC_SUPPORTS_DECREMENTER */ + + /* + * _IVOR4 handler (Book-E external interrupt). + */ + .align 4 + .globl _IVOR4 + .type _IVOR4, @function +_IVOR4: + /* Saving the external context (port_extctx structure).*/ + e_stwu sp, -80(sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(sp) /* Saves PC, MSR. */ + e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_stw r0, 32(sp) /* Saves GPR0. */ + mfSRR0 r0 + se_stw r0, 8(sp) /* Saves PC. */ + mfSRR1 r0 + se_stw r0, 12(sp) /* Saves MSR. */ + mfCR r0 + se_stw r0, 16(sp) /* Saves CR. */ + mfLR r0 + se_stw r0, 20(sp) /* Saves LR. */ + mfCTR r0 + se_stw r0, 24(sp) /* Saves CTR. */ + mfXER r0 + se_stw r0, 28(sp) /* Saves XER. */ + se_stw r3, 36(sp) /* Saves GPR3...GPR12. */ + se_stw r4, 40(sp) + se_stw r5, 44(sp) + se_stw r6, 48(sp) + se_stw r7, 52(sp) + e_stw r8, 56(sp) + e_stw r9, 60(sp) + e_stw r10, 64(sp) + e_stw r11, 68(sp) + e_stw r12, 72(sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Software vector address from the INTC register.*/ + e_lis r3, INTC_IACKR_ADDR@h + e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */ + e_lwz r3, 0(r3) /* IACKR register value. */ + e_lwz r3, 0(r3) + mtCTR r3 /* Software handler address. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + + /* Exectes the software handler.*/ + se_bctrl + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Informs the INTC that the interrupt has been served.*/ + mbar 0 + e_lis r3, INTC_EOIR_ADDR@h + e_or2i r3, INTC_EOIR_ADDR@l + se_stw r3, 0(r3) /* Writing any value should do. */ + + /* Common IVOR epilogue code, context restore.*/ + .globl _ivor_exit +_ivor_exit: + /* Decreasing the SPGR0 register.*/ + mfspr r0, 272 + se_subi r0, 1 + mtspr 272, r0 + +#if CH_DBG_STATISTICS + e_bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_lock +#endif + e_bl chSchIsPreemptionRequired + se_cmpi r3, 0 + se_beq .noresch + e_bl chSchDoReschedule +.noresch: +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + e_bl _stats_stop_measure_crit_thd +#endif + + /* Restoring the external context.*/ +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_lmvgprw 32(sp) /* Restores GPR0, GPR3...GPR12. */ + e_lmvsprw 16(sp) /* Restores CR, LR, CTR, XER. */ + e_lmvsrrw 8(sp) /* Restores PC, MSR. */ +#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_lwz r3, 36(sp) /* Restores GPR3...GPR12. */ + se_lwz r4, 40(sp) + se_lwz r5, 44(sp) + se_lwz r6, 48(sp) + se_lwz r7, 52(sp) + e_lwz r8, 56(sp) + e_lwz r9, 60(sp) + e_lwz r10, 64(sp) + e_lwz r11, 68(sp) + e_lwz r12, 72(sp) + se_lwz r0, 8(sp) + mtSRR0 r0 /* Restores PC. */ + se_lwz r0, 12(sp) + mtSRR1 r0 /* Restores MSR. */ + se_lwz r0, 16(sp) + mtCR r0 /* Restores CR. */ + se_lwz r0, 20(sp) + mtLR r0 /* Restores LR. */ + se_lwz r0, 24(sp) + mtCTR r0 /* Restores CTR. */ + se_lwz r0, 28(sp) + mtXER r0 /* Restores XER. */ + se_lwz r0, 32(sp) /* Restores GPR0. */ +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + e_addi sp, sp, 80 /* Back to the previous frame. */ + se_rfi + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/mk/port.mk b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/mk/port.mk new file mode 100644 index 0000000..063beb4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GCC/mk/port.mk @@ -0,0 +1,13 @@ +# List of the ChibiOS/RT e200 generic port files. +PORTSRC = $(CHIBIOS)/os/common/ports/e200/chcore.c + +PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/GCC/ivor.S \ + $(CHIBIOS)/os/common/ports/e200/compilers/GCC/chcoreasm.S + +PORTINC = $(CHIBIOS)/os/common/ports/e200 \ + $(CHIBIOS)/os/common/ports/e200/compilers/GCC + +# Shared variables +ALLXASMSRC += $(PORTASM) +ALLCSRC += $(PORTSRC) +ALLINC += $(PORTINC) diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chcoreasm.s b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chcoreasm.s new file mode 100644 index 0000000..9d49a7d --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chcoreasm.s @@ -0,0 +1,107 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GHS/chcoreasm.S + * @brief Power Architecture port low level code. + * + * @addtogroup PPC_GHS_CORE + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .vle + + .section .vletext, "axv" + + .align 2 + .globl _port_switch + .type _port_switch, @function +_port_switch: + e_subi sp, sp, 80 + mflr r0 + e_stw r0, 84(sp) + mfcr r0 + se_stw r0, 0(sp) + e_stmw r14, 4(sp) + + se_stw sp, CONTEXT_OFFSET(r4) + se_lwz sp, CONTEXT_OFFSET(r3) + + e_lmw r14, 4(sp) + se_lwz r0, 0(sp) + mtcr r0 + e_lwz r0, 84(sp) + mtlr r0 + e_addi sp, sp, 80 + se_blr + + .align 2 + .globl _port_thread_start + .type _port_thread_start, @function +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + e_bl _stats_stop_measure_crit_thd +#endif + wrteei 1 + mr r3, r31 + mtctr r30 + se_bctrl + e_li r0, 0 + e_bl chThdExit + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chtypes.h b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chtypes.h new file mode 100644 index 0000000..ae4d116 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/chtypes.h @@ -0,0 +1,97 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GCC/chtypes.h + * @brief Power e200 port system types. + * + * @addtogroup PPC_GCC_CORE + * @{ + */ + +#ifndef CHTYPES_H +#define CHTYPES_H + +#include +#include +#include + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then some + * time-dependent services could be degraded. + */ +#define NOINLINE __attribute__((noinline)) + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __attribute__((packed)) + +/** + * @brief Memory alignment enforcement for variables. + */ +#define ALIGNED_VAR(n) __attribute__((aligned(n))) + +/** + * @brief Size of a pointer. + * @note To be used where the sizeof operator cannot be used, preprocessor + * expressions for example. + */ +#define SIZEOF_PTR 4 + +/** + * @brief True if alignment is low-high in current architecture. + */ +#define REVERSE_ORDER 0 + +#endif /* CHTYPES_H */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/ivor.s b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/ivor.s new file mode 100644 index 0000000..2fd98ba --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/ivor.s @@ -0,0 +1,265 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file e200/compilers/GHS/ivor.S + * @brief Kernel ISRs. + * + * @addtogroup PPC_GHS_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +/* + * Imports the PPC configuration headers. + */ +#define _FROM_ASM_ +#include "chlicense.h" +#include "chconf.h" +#include "chcore.h" + +#if defined(__HIGHTEC__) +#define se_beq beq +#endif + +#if !defined(__DOXYGEN__) + + .vle + + .section .handlers, "axv" + +#if PPC_SUPPORTS_DECREMENTER + /* + * _IVOR10 handler (Book-E decrementer). + */ + .align 4 + .globl _IVOR10 + .type _IVOR10, @function +_IVOR10: + /* Saving the external context (port_extctx structure).*/ + e_stwu sp, -80(sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(sp) /* Saves PC, MSR. */ + e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_stw r0, 32(sp) /* Saves GPR0. */ + mfSRR0 r0 + se_stw r0, 8(sp) /* Saves PC. */ + mfSRR1 r0 + se_stw r0, 12(sp) /* Saves MSR. */ + mfCR r0 + se_stw r0, 16(sp) /* Saves CR. */ + mfLR r0 + se_stw r0, 20(sp) /* Saves LR. */ + mfCTR r0 + se_stw r0, 24(sp) /* Saves CTR. */ + mfXER r0 + se_stw r0, 28(sp) /* Saves XER. */ + se_stw r3, 36(sp) /* Saves GPR3...GPR12. */ + se_stw r4, 40(sp) + se_stw r5, 44(sp) + se_stw r6, 48(sp) + se_stw r7, 52(sp) + e_stw r8, 56(sp) + e_stw r9, 60(sp) + e_stw r10, 64(sp) + e_stw r11, 68(sp) + e_stw r12, 72(sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Reset DIE bit in TSR register.*/ + e_lis r3, 0x0800 /* DIS bit mask. */ + mtspr 336, r3 /* TSR register. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_enter_isr + e_bl _dbg_check_lock_from_isr +#endif + /* System tick handler invocation.*/ + e_bl chSysTimerHandlerI +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock_from_isr + e_bl _dbg_check_leave_isr +#endif + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Jumps to the common IVOR epilogue code.*/ + e_b _ivor_exit +#endif /* PPC_SUPPORTS_DECREMENTER */ + + /* + * _IVOR4 handler (Book-E external interrupt). + */ + .align 4 + .globl _IVOR4 + .type _IVOR4, @function +_IVOR4: + /* Saving the external context (port_extctx structure).*/ + e_stwu sp, -80(sp) +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_stmvsrrw 8(sp) /* Saves PC, MSR. */ + e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */ + e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */ +#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_stw r0, 32(sp) /* Saves GPR0. */ + mfSRR0 r0 + se_stw r0, 8(sp) /* Saves PC. */ + mfSRR1 r0 + se_stw r0, 12(sp) /* Saves MSR. */ + mfCR r0 + se_stw r0, 16(sp) /* Saves CR. */ + mfLR r0 + se_stw r0, 20(sp) /* Saves LR. */ + mfCTR r0 + se_stw r0, 24(sp) /* Saves CTR. */ + mfXER r0 + se_stw r0, 28(sp) /* Saves XER. */ + se_stw r3, 36(sp) /* Saves GPR3...GPR12. */ + se_stw r4, 40(sp) + se_stw r5, 44(sp) + se_stw r6, 48(sp) + se_stw r7, 52(sp) + e_stw r8, 56(sp) + e_stw r9, 60(sp) + e_stw r10, 64(sp) + e_stw r11, 68(sp) + e_stw r12, 72(sp) +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + + /* Increasing the SPGR0 register.*/ + mfspr r0, 272 + se_addi r0, 1 + mtspr 272, r0 + + /* Software vector address from the INTC register.*/ + e_lis r3, INTC_IACKR_ADDR@h + e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */ + e_lwz r3, 0(r3) /* IACKR register value. */ + e_lwz r3, 0(r3) + mtCTR r3 /* Software handler address. */ + + /* Restoring pre-IRQ MSR register value.*/ + mfSRR1 r0 +#if !PPC_USE_IRQ_PREEMPTION + /* No preemption, keeping EE disabled.*/ + se_bclri r0, 16 /* EE = bit 16. */ +#endif + mtMSR r0 + + /* Exectes the software handler.*/ + se_bctrl + +#if PPC_USE_IRQ_PREEMPTION + /* Prevents preemption again.*/ + wrteei 0 +#endif + + /* Informs the INTC that the interrupt has been served.*/ + mbar 0 + e_lis r3, INTC_EOIR_ADDR@h + e_or2i r3, INTC_EOIR_ADDR@l + se_stw r3, 0(r3) /* Writing any value should do. */ + + /* Common IVOR epilogue code, context restore.*/ + .globl _ivor_exit +_ivor_exit: + /* Decreasing the SPGR0 register.*/ + mfspr r0, 272 + se_subi r0, 1 + mtspr 272, r0 + +#if CH_DBG_STATISTICS + e_bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_lock +#endif + e_bl chSchIsPreemptionRequired + se_cmpi r3, 0 + se_beq .noresch + e_bl chSchDoReschedule +.noresch: +#if CH_DBG_SYSTEM_STATE_CHECK + e_bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + e_bl _stats_stop_measure_crit_thd +#endif + + /* Restoring the external context.*/ +#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI + e_lmvgprw 32(sp) /* Restores GPR0, GPR3...GPR12. */ + e_lmvsprw 16(sp) /* Restores CR, LR, CTR, XER. */ + e_lmvsrrw 8(sp) /* Restores PC, MSR. */ +#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + se_lwz r3, 36(sp) /* Restores GPR3...GPR12. */ + se_lwz r4, 40(sp) + se_lwz r5, 44(sp) + se_lwz r6, 48(sp) + se_lwz r7, 52(sp) + e_lwz r8, 56(sp) + e_lwz r9, 60(sp) + e_lwz r10, 64(sp) + e_lwz r11, 68(sp) + e_lwz r12, 72(sp) + se_lwz r0, 8(sp) + mtSRR0 r0 /* Restores PC. */ + se_lwz r0, 12(sp) + mtSRR1 r0 /* Restores MSR. */ + se_lwz r0, 16(sp) + mtCR r0 /* Restores CR. */ + se_lwz r0, 20(sp) + mtLR r0 /* Restores LR. */ + se_lwz r0, 24(sp) + mtCTR r0 /* Restores CTR. */ + se_lwz r0, 28(sp) + mtXER r0 /* Restores XER. */ + se_lwz r0, 32(sp) /* Restores GPR0. */ +#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */ + e_addi sp, sp, 80 /* Back to the previous frame. */ + se_rfi + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/mk/port.mk b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/mk/port.mk new file mode 100644 index 0000000..f58e5a8 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/ports/e200/compilers/GHS/mk/port.mk @@ -0,0 +1,13 @@ +# List of the ChibiOS/RT e200 generic port files. +PORTSRC = $(CHIBIOS)/os/common/ports/e200/chcore.c + +PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/GHS/ivor.s \ + $(CHIBIOS)/os/common/ports/e200/compilers/GHS/chcoreasm.s + +PORTINC = $(CHIBIOS)/os/common/ports/e200 \ + $(CHIBIOS)/os/common/ports/e200/compilers/GHS + +# Shared variables +ALLASMSRC += $(PORTASM) +ALLCSRC += $(PORTSRC) +ALLINC += $(PORTINC) -- cgit v1.2.3