From 48026bb824fd2d9cfb00ecd040db6ef3a416bae9 Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Fri, 22 Jan 2021 21:43:36 -0500 Subject: upload initial port --- .../common/startup/ARMCMx/compilers/GCC/crt0_v6m.S | 288 ++++++ .../common/startup/ARMCMx/compilers/GCC/crt0_v7m.S | 350 +++++++ .../os/common/startup/ARMCMx/compilers/GCC/crt1.c | 219 +++++ .../startup/ARMCMx/compilers/GCC/ld/ADUCM360.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/ADUCM410.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F070x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F070xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld | 85 ++ .../GCC/ld/STM32F103xB_maplemini_bootloader.ld | 88 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F303xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F407xE.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F410x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F410xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F412xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F412xG.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F413xH.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F446xC.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F446xE.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F469xI.ld | 86 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32F722xE.ld | 136 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld | 136 +++ .../ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld | 137 +++ .../ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld | 138 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32F756xG.ld | 136 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32F76xxG.ld | 136 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32F76xxI.ld | 136 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32G071xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32G431xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32G474xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld | 139 +++ .../ARMCMx/compilers/GCC/ld/STM32H755xI_M7.ld | 143 +++ .../startup/ARMCMx/compilers/GCC/ld/STM32L011x3.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L031x4.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L031x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L053x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L073x8.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L073xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L073xZ.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L432xB.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L432xC.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L452xE.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L496xG.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L4R5xI.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/STM32L4R9xI.ld | 85 ++ .../startup/ARMCMx/compilers/GCC/ld/rules.ld | 11 + .../startup/ARMCMx/compilers/GCC/ld/rules_code.ld | 80 ++ .../startup/ARMCMx/compilers/GCC/ld/rules_data.ld | 43 + .../ARMCMx/compilers/GCC/ld/rules_memory.ld | 317 ++++++ .../ARMCMx/compilers/GCC/ld/rules_stacks.ld | 40 + .../ARMCMx/compilers/GCC/mk/arm-none-eabi.mk | 23 + .../startup/ARMCMx/compilers/GCC/mk/rules.mk | 291 ++++++ .../ARMCMx/compilers/GCC/mk/startup_aducm36x.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_aducm41x.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32g0xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk | 18 + .../ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk | 18 + .../common/startup/ARMCMx/compilers/GCC/vectors.S | 1031 ++++++++++++++++++++ .../common/startup/ARMCMx/compilers/IAR/cstartup.s | 169 ++++ .../common/startup/ARMCMx/compilers/IAR/vectors.s | 1006 +++++++++++++++++++ .../startup/ARMCMx/compilers/LLVM/mk/clang.mk | 19 + .../startup/ARMCMx/compilers/LLVM/mk/rules.mk | 284 ++++++ .../startup/ARMCMx/compilers/RVCT/cstartup.s | 131 +++ .../common/startup/ARMCMx/compilers/RVCT/vectors.s | 1002 +++++++++++++++++++ 107 files changed, 12499 insertions(+) create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt1.c create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM360.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM410.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB_maplemini_bootloader.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F413xH.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F469xI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F722xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F756xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G071xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G431xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G474xE.ld create mode 100755 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H755xI_M7.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x3.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x4.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073x8.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xZ.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xB.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xC.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L452xE.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L496xG.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R5xI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R9xI.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_memory.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm36x.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm41x.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g0xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/vectors.S create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/cstartup.s create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/vectors.s create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/clang.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/rules.mk create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/cstartup.s create mode 100644 ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/vectors.s (limited to 'ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers') diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S new file mode 100644 index 0000000..4adb573 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S @@ -0,0 +1,288 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file crt0_v6m.S + * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V6M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 + +#define SCB_VTOR 0xE000ED08 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Enforces initialization of MSP. + * @note This is required if the boot process is not reliable for whatever + * reason (bad ROMs, bad bootloaders, bad debuggers=. + */ +#if !defined(CRT0_FORCE_MSP_INIT) || defined(__DOXYGEN__) +#define CRT0_FORCE_MSP_INIT TRUE +#endif + +/** + * @brief VTOR special register initialization. + * @details VTOR is initialized to point to the vectors table. + * @note This option can only be enabled on Cortex-M0+ cores. + */ +#if !defined(CRT0_VTOR_INIT) || defined(__DOXYGEN__) +#define CRT0_VTOR_INIT FALSE +#endif + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .cpu cortex-m0 + .fpu softvfp + .syntax unified + .thumb + .text + +/* + * CRT0 entry point. + */ + .align 2 + .thumb_func + .global _crt0_entry +_crt0_entry: + /* Interrupts are globally masked initially.*/ + cpsid i + +#if CRT0_FORCE_MSP_INIT == TRUE + /* MSP stack pointers initialization.*/ + ldr r0, =__main_stack_end__ + msr MSP, r0 +#endif + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + + /* CPU mode initialization as configured.*/ + movs r0, #CRT0_CONTROL_INIT + msr CONTROL, r0 + isb + +#if CRT0_VTOR_INIT == TRUE + ldr r0, =_vectors + ldr r1, =SCB_VTOR + str r0, [r1] +#endif + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization..*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + bge endmsloop + str r0, [r1] + adds r1, #4 + b msloop +endmsloop: + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + bge endpsloop + str r0, [r1] + adds r1, #4 + b psloop +endpsloop: +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =__textdata_base__ + ldr r2, =__data_base__ + ldr r3, =__data_end__ +dloop: + cmp r2, r3 + bge enddloop + ldr r0, [r1] + str r0, [r2] + adds r1, #4 + adds r2, #4 + b dloop +enddloop: +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =__bss_base__ + ldr r2, =__bss_end__ +bloop: + cmp r1, r2 + bge endbloop + str r0, [r1] + adds r1, #4 + b bloop +endbloop: +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_base__ + ldr r5, =__init_array_end__ +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4] + blx r1 + adds r4, #4 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_base__ + ldr r5, =__fini_array_end__ +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4] + blx r1 + adds r4, #4 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + ldr r1, =__default_exit + bx r1 + +#endif + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S new file mode 100644 index 0000000..4ce96d6 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S @@ -0,0 +1,350 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file crt0_v7m.S + * @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP_V7M + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 +#define CONTROL_FPCA 4 + +#define FPCCR_ASPEN (1 << 31) +#define FPCCR_LSPEN (1 << 30) + +#define SCB_VTOR 0xE000ED08 +#define SCB_CPACR 0xE000ED88 +#define SCB_FPCCR 0xE000EF34 +#define SCB_FPDSCR 0xE000EF3C + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Enforces initialization of MSP. + * @note This is required if the boot process is not reliable for whatever + * reason (bad ROMs, bad bootloaders, bad debuggers=. + */ +#if !defined(CRT0_FORCE_MSP_INIT) || defined(__DOXYGEN__) +#define CRT0_FORCE_MSP_INIT TRUE +#endif + +/** + * @brief VTOR special register initialization. + * @details VTOR is initialized to point to the vectors table. + */ +#if !defined(CRT0_VTOR_INIT) || defined(__DOXYGEN__) +#define CRT0_VTOR_INIT TRUE +#endif + +/** + * @brief FPU initialization switch. + */ +#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__) +#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__) +#define CRT0_INIT_FPU CORTEX_USE_FPU +#else +#define CRT0_INIT_FPU FALSE +#endif +#endif + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Core initialization switch. + */ +#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__) +#define CRT0_INIT_CORE TRUE +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief RAM areas initialization switch. + */ +#if !defined(CRT0_INIT_RAM_AREAS) || defined(__DOXYGEN__) +#define CRT0_INIT_RAM_AREAS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/** + * @brief FPU FPCCR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_FPCCR_INIT) || defined(__DOXYGEN__) +#define CRT0_FPCCR_INIT (FPCCR_ASPEN | FPCCR_LSPEN) +#endif + +/** + * @brief CPACR register initialization value. + * @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE. + */ +#if !defined(CRT0_CPACR_INIT) || defined(__DOXYGEN__) +#define CRT0_CPACR_INIT 0x00F00000 +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .syntax unified + .cpu cortex-m3 +#if CRT0_INIT_FPU == TRUE + .fpu fpv4-sp-d16 +#else + .fpu softvfp +#endif + + .thumb + .text + +/* + * CRT0 entry point. + */ + .align 2 + .thumb_func + .global _crt0_entry +_crt0_entry: + /* Interrupts are globally masked initially.*/ + cpsid i + +#if CRT0_FORCE_MSP_INIT == TRUE + /* MSP stack pointers initialization.*/ + ldr r0, =__main_stack_end__ + msr MSP, r0 +#endif + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + +#if CRT0_VTOR_INIT == TRUE + ldr r0, =_vectors + movw r1, #SCB_VTOR & 0xFFFF + movt r1, #SCB_VTOR >> 16 + str r0, [r1] +#endif + +#if CRT0_INIT_FPU == TRUE + /* FPU FPCCR initialization.*/ + movw r0, #CRT0_FPCCR_INIT & 0xFFFF + movt r0, #CRT0_FPCCR_INIT >> 16 + movw r1, #SCB_FPCCR & 0xFFFF + movt r1, #SCB_FPCCR >> 16 + str r0, [r1] + dsb + isb + + /* CPACR initialization.*/ + movw r0, #CRT0_CPACR_INIT & 0xFFFF + movt r0, #CRT0_CPACR_INIT >> 16 + movw r1, #SCB_CPACR & 0xFFFF + movt r1, #SCB_CPACR >> 16 + str r0, [r1] + dsb + isb + + /* FPU FPSCR initially cleared.*/ + mov r0, #0 + vmsr FPSCR, r0 + + /* FPU FPDSCR initially cleared.*/ + movw r1, #SCB_FPDSCR & 0xFFFF + movt r1, #SCB_FPDSCR >> 16 + str r0, [r1] + + /* Enforcing FPCA bit in the CONTROL register.*/ + movs r0, #CRT0_CONTROL_INIT | CONTROL_FPCA + +#else + movs r0, #CRT0_CONTROL_INIT +#endif + + /* CONTROL register initialization as configured.*/ + msr CONTROL, r0 + isb + +#if CRT0_INIT_CORE == TRUE + /* Core initialization.*/ + bl __core_init +#endif + + /* Early initialization.*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo msloop + + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo psloop +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =__textdata_base__ + ldr r2, =__data_base__ + ldr r3, =__data_end__ +dloop: + cmp r2, r3 + ittt lo + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo dloop +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =__bss_base__ + ldr r2, =__bss_end__ +bloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bloop +#endif + +#if CRT0_INIT_RAM_AREAS == TRUE + /* RAM areas initialization.*/ + bl __init_ram_areas +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_base__ + ldr r5, =__init_array_end__ +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4], #4 + blx r1 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_DESTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_base__ + ldr r5, =__fini_array_end__ +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4], #4 + blx r1 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + b __default_exit + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt1.c b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt1.c new file mode 100644 index 0000000..87179c4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/crt1.c @@ -0,0 +1,219 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/compilers/GCC/crt1.c + * @brief Startup stub functions. + * + * @addtogroup ARMCMx_GCC_STARTUP + * @{ + */ + +#include +#include + +#include "cmparams.h" + +/*===========================================================================*/ +/* Module local definitions. */ +/*===========================================================================*/ + +#if !defined(CRT1_AREAS_NUMBER) || defined(__DOXYGEN__) +#define CRT1_AREAS_NUMBER 8 +#endif + +#if (CRT1_AREAS_NUMBER < 0) || (CRT1_AREAS_NUMBER > 8) +#error "CRT1_AREAS_NUMBER must be within 0 and 8" +#endif + +/*===========================================================================*/ +/* Module exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module local types. */ +/*===========================================================================*/ + +/** + * @brief Type of an area to be initialized. + */ +typedef struct { + uint32_t *init_text_area; + uint32_t *init_area; + uint32_t *clear_area; + uint32_t *no_init_area; +} ram_init_area_t; + +/*===========================================================================*/ +/* Module local variables. */ +/*===========================================================================*/ + +#if (CRT1_AREAS_NUMBER > 0) || defined(__DOXYGEN__) +extern uint32_t __ram0_init_text__, __ram0_init__, __ram0_clear__, __ram0_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 1) || defined(__DOXYGEN__) +extern uint32_t __ram1_init_text__, __ram1_init__, __ram1_clear__, __ram1_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 2) || defined(__DOXYGEN__) +extern uint32_t __ram2_init_text__, __ram2_init__, __ram2_clear__, __ram2_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 3) || defined(__DOXYGEN__) +extern uint32_t __ram3_init_text__, __ram3_init__, __ram3_clear__, __ram3_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 4) || defined(__DOXYGEN__) +extern uint32_t __ram4_init_text__, __ram4_init__, __ram4_clear__, __ram4_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 5) || defined(__DOXYGEN__) +extern uint32_t __ram5_init_text__, __ram5_init__, __ram5_clear__, __ram5_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 6) || defined(__DOXYGEN__) +extern uint32_t __ram6_init_text__, __ram6_init__, __ram6_clear__, __ram6_noinit__; +#endif +#if (CRT1_AREAS_NUMBER > 7) || defined(__DOXYGEN__) +extern uint32_t __ram7_init_text__, __ram7_init__, __ram7_clear__, __ram7_noinit__; +#endif + +/** + * @brief Static table of areas to be initialized. + */ +#if (CRT1_AREAS_NUMBER > 0) || defined(__DOXYGEN__) +static const ram_init_area_t ram_areas[CRT1_AREAS_NUMBER] = { + {&__ram0_init_text__, &__ram0_init__, &__ram0_clear__, &__ram0_noinit__}, +#if (CRT1_AREAS_NUMBER > 1) || defined(__DOXYGEN__) + {&__ram1_init_text__, &__ram1_init__, &__ram1_clear__, &__ram1_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 2) || defined(__DOXYGEN__) + {&__ram2_init_text__, &__ram2_init__, &__ram2_clear__, &__ram2_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 3) || defined(__DOXYGEN__) + {&__ram3_init_text__, &__ram3_init__, &__ram3_clear__, &__ram3_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 4) || defined(__DOXYGEN__) + {&__ram4_init_text__, &__ram4_init__, &__ram4_clear__, &__ram4_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 5) || defined(__DOXYGEN__) + {&__ram5_init_text__, &__ram5_init__, &__ram5_clear__, &__ram5_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 6) || defined(__DOXYGEN__) + {&__ram6_init_text__, &__ram6_init__, &__ram6_clear__, &__ram6_noinit__}, +#endif +#if (CRT1_AREAS_NUMBER > 7) || defined(__DOXYGEN__) + {&__ram7_init_text__, &__ram7_init__, &__ram7_clear__, &__ram7_noinit__}, +#endif +}; +#endif + +/*===========================================================================*/ +/* Module local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module exported functions. */ +/*===========================================================================*/ + +/** + * @brief Architecture-dependent core initialization. + * @details This hook is invoked immediately after the stack initialization + * and before the DATA and BSS segments initialization. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __core_init(void) { + +#if CORTEX_MODEL == 7 + SCB_EnableICache(); + SCB_EnableDCache(); +#endif +} + +/** + * @brief Early initialization. + * @details This hook is invoked immediately after the stack and core + * initialization and before the DATA and BSS segments + * initialization. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __early_init(void) {} +/*lint -restore*/ + +/** + * @brief Late initialization. + * @details This hook is invoked after the DATA and BSS segments + * initialization and before any static constructor. The + * default behavior is to do nothing. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __late_init(void) {} +/*lint -restore*/ + +/** + * @brief Default @p main() function exit handler. + * @details This handler is invoked or the @p main() function exit. The + * default behavior is to enter an infinite loop. + * @note This function is a weak symbol. + */ +#if !defined(__DOXYGEN__) +__attribute__((noreturn, weak)) +#endif +/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/ +void __default_exit(void) { +/*lint -restore*/ + + while (true) { + } +} + +/** + * @brief Performs the initialization of the various RAM areas. + */ +void __init_ram_areas(void) { +#if CRT1_AREAS_NUMBER > 0 + const ram_init_area_t *rap = ram_areas; + + do { + uint32_t *tp = rap->init_text_area; + uint32_t *p = rap->init_area; + + /* Copying initialization data.*/ + while (p < rap->clear_area) { + *p = *tp; + p++; + tp++; + } + + /* Zeroing clear area.*/ + while (p < rap->no_init_area) { + *p = 0; + p++; + } + rap++; + } + while (rap < &ram_areas[CRT1_AREAS_NUMBER]); +#endif +} + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM360.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM360.ld new file mode 100644 index 0000000..6393a09 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM360.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ADUCM360 memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x00000000, len = 128k /* On-chip Flash/EE */ + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k /* SRAM */ + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM410.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM410.ld new file mode 100644 index 0000000..be56f7b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/ADUCM410.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ADUCM410 memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x00000000, len = 512k /* Flash Block 0 */ + flash1 (rx) : org = 0x00080000, len = 512k /* Flash Block 1 */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM with ECC */ + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld new file mode 100644 index 0000000..52c131a --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x4.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F030x4 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 16k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 4k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld new file mode 100644 index 0000000..5afc8cb --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F030x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 4k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld new file mode 100644 index 0000000..c2732f0 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F030x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F030x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld new file mode 100644 index 0000000..5ff7b07 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F031x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F031x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 4k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld new file mode 100644 index 0000000..22ee72f --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F042x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F042x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 6k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld new file mode 100644 index 0000000..89d3cb0 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F051x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F051x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070x6.ld new file mode 100644 index 0000000..0430df4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F070x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 6k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070xB.ld new file mode 100644 index 0000000..a848ef8 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F070xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F070xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 16k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld new file mode 100644 index 0000000..353ffb5 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F072xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F072xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 16k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld new file mode 100644 index 0000000..fd5b883 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F091xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F091xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 32k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld new file mode 100644 index 0000000..fb6ef4f --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F100xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F100xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld new file mode 100644 index 0000000..3de103d --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 20k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld new file mode 100644 index 0000000..2a5b200 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 20k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB_maplemini_bootloader.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB_maplemini_bootloader.ld new file mode 100644 index 0000000..be17184 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xB_maplemini_bootloader.ld @@ -0,0 +1,88 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xB memory setup for use with the maplemini bootloader. + * You will have to + * #define CORTEX_VTOR_INIT 0x5000 + * in your projects chconf.h + */ +MEMORY +{ + flash0 (rx) : org = 0x08005000, len = 128k - 0x5000 + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000C00, len = 20k - 0xC00 + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld new file mode 100644 index 0000000..b5bbb32 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xD.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 384k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld new file mode 100644 index 0000000..082a76e --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld new file mode 100644 index 0000000..02326fa --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F103xG.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F103xG memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 96k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld new file mode 100644 index 0000000..0b4749a --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F107xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F107xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld new file mode 100644 index 0000000..853d10e --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F207xG.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F207xG memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld new file mode 100644 index 0000000..f32b744 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F302x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F302x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 16k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld new file mode 100644 index 0000000..739e7a4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F303x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 12k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 4k + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld new file mode 100644 index 0000000..c6e2bc8 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F303xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 40k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 8k + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xE.ld new file mode 100644 index 0000000..ac78bde --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F303xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F303xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 16k + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld new file mode 100644 index 0000000..c95fb24 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F334x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F3334x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 12k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 4k + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld new file mode 100644 index 0000000..fbb3a3b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F373xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F303xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 32k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld new file mode 100644 index 0000000..33b128f --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F401xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld new file mode 100644 index 0000000..ad8b786 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F401xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F401xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 96k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld new file mode 100644 index 0000000..3d0c214 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F405xG.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F405xG memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xE.ld new file mode 100644 index 0000000..b00c3b8 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xE.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F407xE memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld new file mode 100644 index 0000000..e6d633a --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F407xG.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F407xG memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410x8.ld new file mode 100644 index 0000000..6e5fac4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F410x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 32k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410xB.ld new file mode 100644 index 0000000..32737bd --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F410xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F410xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 32k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld new file mode 100644 index 0000000..4cc2580 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F411xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld new file mode 100644 index 0000000..dbaafc4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F411xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F411xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xE.ld new file mode 100644 index 0000000..e485983 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F412xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 256k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xG.ld new file mode 100644 index 0000000..176d33c --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F412xG.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F412xG memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 256k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F413xH.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F413xH.ld new file mode 100644 index 0000000..2d32dae --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F413xH.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F413xH memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1536k /* Program memory */ + flash1 (rx) : org = 0x1FFF7800, len = 528 /* OTP memory */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 320k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 256k /* SRAM1 */ + ram2 (wx) : org = 0x20040000, len = 64k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM2 */ + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld new file mode 100644 index 0000000..57c9b41 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F429xI.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F429xI memory setup. + * Note: Use of ram1, ram2 and ram3 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 192k /* SRAM1 + SRAM2 + SRAM3 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x2001C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20020000, len = 64k /* SRAM3 */ + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xC.ld new file mode 100644 index 0000000..9d5ca51 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xC.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F446xC memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x00000000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xE.ld new file mode 100644 index 0000000..de7d56c --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F446xE.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F446xE memory setup. + * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20000000, len = 112k /* SRAM1 */ + ram2 (wx) : org = 0x00000000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F469xI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F469xI.ld new file mode 100644 index 0000000..5dcac00 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F469xI.ld @@ -0,0 +1,86 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F469xI memory setup. + * Note: Use of ram1, ram2 and ram3 is mutually exclusive with use of ram0. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 384k /* SRAM1 + SRAM2 + SRAM3 */ + ram1 (wx) : org = 0x20000000, len = 160k /* SRAM1 */ + ram2 (wx) : org = 0x20028000, len = 32k /* SRAM2 */ + ram3 (wx) : org = 0x20030000, len = 128k /* SRAM3 */ + ram4 (wx) : org = 0x10000000, len = 64k /* CCM SRAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F722xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F722xE.ld new file mode 100644 index 0000000..f3915db --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F722xE.ld @@ -0,0 +1,136 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * ST32F722xE generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20010000, len = 192k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20010000, len = 176k /* SRAM1 */ + ram2 (wx) : org = 0x2003C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld new file mode 100644 index 0000000..82ce157 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG.ld @@ -0,0 +1,136 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F746xG generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (RX) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (RX) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (RX) : org = 0x00000000, len = 0 + flash3 (RX) : org = 0x00000000, len = 0 + flash4 (RX) : org = 0x00000000, len = 0 + flash5 (RX) : org = 0x00000000, len = 0 + flash6 (RX) : org = 0x00000000, len = 0 + flash7 (RX) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 (wx) : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld new file mode 100644 index 0000000..6f6de62 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_ETH.ld @@ -0,0 +1,137 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F746xG Ethernet setup. + * + * RAM1 - Data, Heap. + * RAM2 - ETH. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 (wx) : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram1); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram1); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram2); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld new file mode 100644 index 0000000..d2917e9 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F746xG_MAX.ld @@ -0,0 +1,138 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F746xG maximum RAM setup. + * + * RAM0 - Data, BSS, Heap. + * RAM3 - Main Stack, Process Stack, NOCACHE, ETH. + * + * Notes: + * BSS is placed in cached RAM, DMA buffers management is delegated to the + * application code. This setup maximizes the linear RAM available to BSS and + * Heap. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 (wx) : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F756xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F756xG.ld new file mode 100644 index 0000000..75ba962 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F756xG.ld @@ -0,0 +1,136 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F756xG generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20010000, len = 240k /* SRAM1 */ + ram2 (wx) : org = 0x2004C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxG.ld new file mode 100644 index 0000000..74d8ba9 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxG.ld @@ -0,0 +1,136 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F76xxG generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20020000, len = 384k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20020000, len = 368k /* SRAM1 */ + ram2 (wx) : org = 0x2007C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxI.ld new file mode 100644 index 0000000..19fbfa8 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32F76xxI.ld @@ -0,0 +1,136 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F76xxI generic setup. + * + * RAM0 - Data, Heap. + * RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH. + * + * Notes: + * BSS is placed in DTCM RAM in order to simplify DMA buffers management. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 2M /* Flash as AXIM (writable) */ + flash1 (rx) : org = 0x00200000, len = 2M /* Flash as ITCM */ + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20020000, len = 384k /* SRAM1 + SRAM2 */ + ram1 (wx) : org = 0x20020000, len = 368k /* SRAM1 */ + ram2 (wx) : org = 0x2007C000, len = 16k /* SRAM2 */ + ram3 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */ + ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */ + ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram3); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram3); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram3); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32F7xx. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G071xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G071xB.ld new file mode 100644 index 0000000..a752e3d --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G071xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32G071xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 36k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G431xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G431xB.ld new file mode 100644 index 0000000..a02962b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G431xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32G431xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 32k /* SRAM1+SRAM2+CCM */ + ram1 (wx) : org = 0x20000000, len = 22k /* SRAM1+SRAM2 */ + ram2 (wx) : org = 0x20000000, len = 16k /* SRAM1 */ + ram3 (wx) : org = 0x20004000, len = 6k /* SRAM2 */ + ram4 (wx) : org = 0x20005800, len = 10k /* CCM */ + ram5 (wx) : org = 0x10000000, len = 10k /* CCM alias */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G474xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G474xE.ld new file mode 100644 index 0000000..a412843 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32G474xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32G474xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k /* SRAM1+SRAM2+CCM */ + ram1 (wx) : org = 0x20000000, len = 96k /* SRAM1+SRAM2 */ + ram2 (wx) : org = 0x20000000, len = 80k /* SRAM1 */ + ram3 (wx) : org = 0x20014000, len = 16k /* SRAM2 */ + ram4 (wx) : org = 0x20018000, len = 32k /* CCM */ + ram5 (wx) : org = 0x10000000, len = 32k /* CCM alias */ + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld new file mode 100755 index 0000000..f715a8f --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H743xI.ld @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32H743xI generic setup. + * + * AXI SRAM - BSS, Data, Heap. + * SRAM1+SRAM2 - None. + * SRAM3 - NOCACHE, ETH. + * SRAM4 - None. + * DTCM-RAM - Main Stack, Process Stack. + * ITCM-RAM - None. + * BCKP SRAM - None. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 2M /* Flash bank1+bank2 */ + flash1 (rx) : org = 0x08000000, len = 1M /* Flash bank 1 */ + flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 */ + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x24000000, len = 512k /* AXI SRAM */ + ram1 (wx) : org = 0x30000000, len = 256k /* AHB SRAM1+SRAM2 */ + ram2 (wx) : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */ + ram3 (wx) : org = 0x30040000, len = 32k /* AHB SRAM3 */ + ram4 (wx) : org = 0x38000000, len = 64k /* AHB SRAM4 */ + ram5 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */ + ram6 (wx) : org = 0x00000000, len = 64k /* ITCM-RAM */ + ram7 (wx) : org = 0x38800000, len = 4k /* BCKP SRAM */ +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram5); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram5); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32H7xx. */ +/* SRAM3 is assumed to be marked non-cacheable using MPU. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H755xI_M7.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H755xI_M7.ld new file mode 100644 index 0000000..11af7dc --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32H755xI_M7.ld @@ -0,0 +1,143 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32H755xI (M7 side) generic setup. + * Flash1 is assumed to be in use for the M7 core. + * Flash2 is not touched and can be used by the M4 core. + * RAM1 and RAM2 are assumed to be in use for the M7 core. + * RAM3 and RAM4 are not touched and can be used by the M4 core. + * + * AXI SRAM - BSS, Data, Heap. + * SRAM1+SRAM2 - None. + * SRAM3 - NOCACHE, ETH. + * SRAM4 - None. + * DTCM-RAM - Main Stack, Process Stack. + * ITCM-RAM - None. + * BCKP SRAM - None. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 2M /* Flash bank1+bank2 */ + flash1 (rx) : org = 0x08000000, len = 1M /* Flash bank 1 */ + flash2 (rx) : org = 0x08100000, len = 1M /* Flash bank 2 */ + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x24000000, len = 512k /* AXI SRAM */ + ram1 (wx) : org = 0x30000000, len = 256k /* AHB SRAM1+SRAM2 */ + ram2 (wx) : org = 0x30000000, len = 288k /* AHB SRAM1+SRAM2+SRAM3 */ + ram3 (wx) : org = 0x30040000, len = 32k /* AHB SRAM3 */ + ram4 (wx) : org = 0x38000000, len = 64k /* AHB SRAM4 */ + ram5 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */ + ram6 (wx) : org = 0x00000000, len = 64k /* ITCM-RAM */ + ram7 (wx) : org = 0x38800000, len = 4k /* BCKP SRAM */ +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash1); +REGION_ALIAS("VECTORS_FLASH_LMA", flash1); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash1); +REGION_ALIAS("XTORS_FLASH_LMA", flash1); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash1); +REGION_ALIAS("TEXT_FLASH_LMA", flash1); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash1); +REGION_ALIAS("RODATA_FLASH_LMA", flash1); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash1); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash1); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash1); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram5); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram5); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash1); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/*===========================================================================*/ +/* Custom sections for STM32H7xx. */ +/* SRAM3 is assumed to be marked non-cacheable using MPU. */ +/*===========================================================================*/ + +/* RAM region to be used for nocache segment.*/ +REGION_ALIAS("NOCACHE_RAM", ram3); + +/* RAM region to be used for eth segment.*/ +REGION_ALIAS("ETH_RAM", ram3); + +SECTIONS +{ + /* Special section for non cache-able areas.*/ + .nocache (NOLOAD) : ALIGN(4) + { + __nocache_base__ = .; + *(.nocache) + *(.nocache.*) + *(.bss.__nocache_*) + . = ALIGN(4); + __nocache_end__ = .; + } > NOCACHE_RAM + + /* Special section for Ethernet DMA non cache-able areas.*/ + .eth (NOLOAD) : ALIGN(4) + { + __eth_base__ = .; + *(.eth) + *(.eth.*) + *(.bss.__eth_*) + . = ALIGN(4); + __eth_end__ = .; + } > ETH_RAM +} + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld + diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x3.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x3.ld new file mode 100644 index 0000000..878feb4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x3.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L011x3 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 8k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 2k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld new file mode 100644 index 0000000..a896621 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L011x4.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L011x4 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 16k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 2k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x4.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x4.ld new file mode 100644 index 0000000..527783e --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x4.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L031x4 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 16k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x6.ld new file mode 100644 index 0000000..c424b5a --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L031x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L031x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld new file mode 100644 index 0000000..e478aad --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L052x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 16k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld new file mode 100644 index 0000000..64f0c15 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L052x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L052x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x6.ld new file mode 100644 index 0000000..6b2116d --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L053x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld new file mode 100644 index 0000000..3a6f917 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L053x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L053x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 8k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073x8.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073x8.ld new file mode 100644 index 0000000..7503de2 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073x8.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L073x8 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 64k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 20k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xB.ld new file mode 100644 index 0000000..1b92681 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L073xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 20k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xZ.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xZ.ld new file mode 100644 index 0000000..e60ebe0 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L073xZ.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L073xZ memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 192k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 20k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld new file mode 100644 index 0000000..8ec6e1b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L151x6.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L151x6 memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 32k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 10k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld new file mode 100644 index 0000000..e899a77 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L152xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 16k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld new file mode 100644 index 0000000..5552026 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L152xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L152xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 80k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xB.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xB.ld new file mode 100644 index 0000000..f7e723b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xB.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L432xB memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 128k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xC.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xC.ld new file mode 100644 index 0000000..e09722f --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L432xC.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L432xC memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 256k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 64k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x00000000, len = 0 + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L452xE.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L452xE.ld new file mode 100644 index 0000000..d84ddb6 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L452xE.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L452xE memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 512k + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 128k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 32k /* This memory also mapped at address 0x20020000 */ + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld new file mode 100644 index 0000000..986e259 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L476xG.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L476xG memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 96k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 32k + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L496xG.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L496xG.ld new file mode 100644 index 0000000..d773328 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L496xG.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L496xG memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 1M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 256k + ram1 (wx) : org = 0x00000000, len = 0 + ram2 (wx) : org = 0x00000000, len = 0 + ram3 (wx) : org = 0x00000000, len = 0 + ram4 (wx) : org = 0x10000000, len = 64k /* This memory also mapped at address 0x20040000 */ + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R5xI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R5xI.ld new file mode 100644 index 0000000..64ed234 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R5xI.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L4R5xI memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 2M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 640k /* SRAM1+SRAM2+SRAM3 */ + ram1 (wx) : org = 0x20000000, len = 192k /* SRAM1 */ + ram2 (wx) : org = 0x00000000, len = 64k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 384k /* SRAM3 */ + ram4 (wx) : org = 0x10000000, len = 64k /* SRAM2 alias */ + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R9xI.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R9xI.ld new file mode 100644 index 0000000..a985bee --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/STM32L4R9xI.ld @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32L4R9xI memory setup. + */ +MEMORY +{ + flash0 (rx) : org = 0x08000000, len = 2M + flash1 (rx) : org = 0x00000000, len = 0 + flash2 (rx) : org = 0x00000000, len = 0 + flash3 (rx) : org = 0x00000000, len = 0 + flash4 (rx) : org = 0x00000000, len = 0 + flash5 (rx) : org = 0x00000000, len = 0 + flash6 (rx) : org = 0x00000000, len = 0 + flash7 (rx) : org = 0x00000000, len = 0 + ram0 (wx) : org = 0x20000000, len = 640k /* SRAM1+SRAM2+SRAM3 */ + ram1 (wx) : org = 0x20000000, len = 192k /* SRAM1 */ + ram2 (wx) : org = 0x00000000, len = 64k /* SRAM2 */ + ram3 (wx) : org = 0x00000000, len = 384k /* SRAM3 */ + ram4 (wx) : org = 0x10000000, len = 64k /* SRAM2 alias */ + ram5 (wx) : org = 0x00000000, len = 0 + ram6 (wx) : org = 0x00000000, len = 0 + ram7 (wx) : org = 0x00000000, len = 0 +} + +/* For each data/text section two region are defined, a virtual region + and a load region (_LMA suffix).*/ + +/* Flash region to be used for exception vectors.*/ +REGION_ALIAS("VECTORS_FLASH", flash0); +REGION_ALIAS("VECTORS_FLASH_LMA", flash0); + +/* Flash region to be used for constructors and destructors.*/ +REGION_ALIAS("XTORS_FLASH", flash0); +REGION_ALIAS("XTORS_FLASH_LMA", flash0); + +/* Flash region to be used for code text.*/ +REGION_ALIAS("TEXT_FLASH", flash0); +REGION_ALIAS("TEXT_FLASH_LMA", flash0); + +/* Flash region to be used for read only data.*/ +REGION_ALIAS("RODATA_FLASH", flash0); +REGION_ALIAS("RODATA_FLASH_LMA", flash0); + +/* Flash region to be used for various.*/ +REGION_ALIAS("VARIOUS_FLASH", flash0); +REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); + +/* Flash region to be used for RAM(n) initialization data.*/ +REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); + +/* RAM region to be used for Main stack. This stack accommodates the processing + of all exceptions and interrupts.*/ +REGION_ALIAS("MAIN_STACK_RAM", ram0); + +/* RAM region to be used for the process stack. This is the stack used by + the main() function.*/ +REGION_ALIAS("PROCESS_STACK_RAM", ram0); + +/* RAM region to be used for data segment.*/ +REGION_ALIAS("DATA_RAM", ram0); +REGION_ALIAS("DATA_RAM_LMA", flash0); + +/* RAM region to be used for BSS segment.*/ +REGION_ALIAS("BSS_RAM", ram0); + +/* RAM region to be used for the default heap.*/ +REGION_ALIAS("HEAP_RAM", ram0); + +/* Generic rules inclusion.*/ +INCLUDE rules.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules.ld new file mode 100644 index 0000000..8ca9a47 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules.ld @@ -0,0 +1,11 @@ +/* Stack rules inclusion.*/ +INCLUDE rules_stacks.ld + +/* Code rules inclusion.*/ +INCLUDE rules_code.ld + +/* Data rules inclusion.*/ +INCLUDE rules_data.ld + +/* Memory rules inclusion.*/ +INCLUDE rules_memory.ld diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld new file mode 100644 index 0000000..5a288af --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld @@ -0,0 +1,80 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +ENTRY(Reset_Handler) + +SECTIONS +{ + .vectors : ALIGN(1024) + { + KEEP(*(.vectors)) + } > VECTORS_FLASH AT > VECTORS_FLASH_LMA + + .xtors : ALIGN(4) + { + __init_array_base__ = .; + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + __init_array_end__ = .; + __fini_array_base__ = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end__ = .; + } > XTORS_FLASH AT > XTORS_FLASH_LMA + + .text : ALIGN_WITH_INPUT + { + __text_base__ = .; + *(.text) + *(.text.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + __text_end__ = .; + } > TEXT_FLASH AT > TEXT_FLASH_LMA + + .rodata : ALIGN(4) + { + __rodata_base__ = .; + *(.rodata) + *(.rodata.*) + . = ALIGN(4); + __rodata_end__ = .; + } > RODATA_FLASH AT > RODATA_FLASH_LMA + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > VARIOUS_FLASH AT > VARIOUS_FLASH_LMA + + .ARM.exidx : { + __exidx_base__ = .; + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end__ = .; + __exidx_end = .; + } > VARIOUS_FLASH AT > VARIOUS_FLASH_LMA + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > VARIOUS_FLASH AT > VARIOUS_FLASH_LMA + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > VARIOUS_FLASH AT > VARIOUS_FLASH_LMA +} diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld new file mode 100644 index 0000000..c7fe00c --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld @@ -0,0 +1,43 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +SECTIONS +{ + .data : ALIGN(4) + { + PROVIDE(_textdata = LOADADDR(.data)); + PROVIDE(_data = .); + __textdata_base__ = LOADADDR(.data); + __data_base__ = .; + *(.data) + *(.data.*) + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + __data_end__ = .; + } > DATA_RAM AT > DATA_RAM_LMA + + .bss (NOLOAD) : ALIGN(4) + { + __bss_base__ = .; + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > BSS_RAM +} diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_memory.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_memory.ld new file mode 100644 index 0000000..ab914b6 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_memory.ld @@ -0,0 +1,317 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +__ram0_base__ = ORIGIN(ram0); +__ram0_size__ = LENGTH(ram0); +__ram0_end__ = __ram0_base__ + __ram0_size__; +__ram1_base__ = ORIGIN(ram1); +__ram1_size__ = LENGTH(ram1); +__ram1_end__ = __ram1_base__ + __ram1_size__; +__ram2_base__ = ORIGIN(ram2); +__ram2_size__ = LENGTH(ram2); +__ram2_end__ = __ram2_base__ + __ram2_size__; +__ram3_base__ = ORIGIN(ram3); +__ram3_size__ = LENGTH(ram3); +__ram3_end__ = __ram3_base__ + __ram3_size__; +__ram4_base__ = ORIGIN(ram4); +__ram4_size__ = LENGTH(ram4); +__ram4_end__ = __ram4_base__ + __ram4_size__; +__ram5_base__ = ORIGIN(ram5); +__ram5_size__ = LENGTH(ram5); +__ram5_end__ = __ram5_base__ + __ram5_size__; +__ram6_base__ = ORIGIN(ram6); +__ram6_size__ = LENGTH(ram6); +__ram6_end__ = __ram6_base__ + __ram6_size__; +__ram7_base__ = ORIGIN(ram7); +__ram7_size__ = LENGTH(ram7); +__ram7_end__ = __ram7_base__ + __ram7_size__; + +__flash0_base__ = ORIGIN(flash0); +__flash0_size__ = LENGTH(flash0); +__flash0_end__ = __flash0_base__ + __flash0_size__; +__flash1_base__ = ORIGIN(flash1); +__flash1_size__ = LENGTH(flash1); +__flash1_end__ = __flash1_base__ + __flash1_size__; +__flash2_base__ = ORIGIN(flash2); +__flash2_size__ = LENGTH(flash2); +__flash2_end__ = __flash2_base__ + __flash2_size__; +__flash3_base__ = ORIGIN(flash3); +__flash3_size__ = LENGTH(flash3); +__flash3_end__ = __flash3_base__ + __flash3_size__; +__flash4_base__ = ORIGIN(flash4); +__flash4_size__ = LENGTH(flash4); +__flash4_end__ = __flash4_base__ + __flash4_size__; +__flash5_base__ = ORIGIN(flash5); +__flash5_size__ = LENGTH(flash5); +__flash5_end__ = __flash5_base__ + __flash5_size__; +__flash6_base__ = ORIGIN(flash6); +__flash6_size__ = LENGTH(flash6); +__flash6_end__ = __flash6_base__ + __flash6_size__; +__flash7_base__ = ORIGIN(flash7); +__flash7_size__ = LENGTH(flash7); +__flash7_end__ = __flash7_base__ + __flash7_size__; + +SECTIONS +{ + .ram0_init : ALIGN(4) + { + __ram0_init_text__ = LOADADDR(.ram0_init); + __ram0_init__ = .; + KEEP(*(.ram0_init)) + KEEP(*(.ram0_init.*)) + . = ALIGN(4); + } > ram0 AT > RAM_INIT_FLASH_LMA + + .ram0 (NOLOAD) : ALIGN(4) + { + __ram0_clear__ = .; + *(.ram0_clear) + *(.ram0_clear.*) + . = ALIGN(4); + __ram0_noinit__ = .; + *(.ram0) + *(.ram0.*) + . = ALIGN(4); + __ram0_free__ = .; + } > ram0 + + .ram1_init : ALIGN(4) + { + __ram1_init_text__ = LOADADDR(.ram1_init); + __ram1_init__ = .; + KEEP(*(.ram1_init)) + KEEP(*(.ram1_init.*)) + . = ALIGN(4); + } > ram1 AT > RAM_INIT_FLASH_LMA + + .ram1 (NOLOAD) : ALIGN(4) + { + __ram1_clear__ = .; + *(.ram1_clear) + *(.ram1_clear.*) + . = ALIGN(4); + __ram1_noinit__ = .; + *(.ram1) + *(.ram1.*) + . = ALIGN(4); + __ram1_free__ = .; + } > ram1 + + .ram2_init : ALIGN(4) + { + __ram2_init_text__ = LOADADDR(.ram2_init); + __ram2_init__ = .; + KEEP(*(.ram2_init)) + KEEP(*(.ram2_init.*)) + . = ALIGN(4); + } > ram2 AT > RAM_INIT_FLASH_LMA + + .ram2 (NOLOAD) : ALIGN(4) + { + __ram2_clear__ = .; + *(.ram2_clear) + *(.ram2_clear.*) + . = ALIGN(4); + __ram2_noinit__ = .; + *(.ram2) + *(.ram2.*) + . = ALIGN(4); + __ram2_free__ = .; + } > ram2 + + .ram3_init : ALIGN(4) + { + __ram3_init_text__ = LOADADDR(.ram3_init); + __ram3_init__ = .; + KEEP(*(.ram3_init)) + KEEP(*(.ram3_init.*)) + . = ALIGN(4); + } > ram3 AT > RAM_INIT_FLASH_LMA + + .ram3 (NOLOAD) : ALIGN(4) + { + __ram3_clear__ = .; + *(.ram3_clear) + *(.ram3_clear.*) + . = ALIGN(4); + __ram3_noinit__ = .; + *(.ram3) + *(.ram3.*) + . = ALIGN(4); + __ram3_free__ = .; + } > ram3 + + .ram4_init : ALIGN(4) + { + __ram4_init_text__ = LOADADDR(.ram4_init); + __ram4_init__ = .; + KEEP(*(.ram4_init)) + KEEP(*(.ram4_init.*)) + . = ALIGN(4); + } > ram4 AT > RAM_INIT_FLASH_LMA + + .ram4 (NOLOAD) : ALIGN(4) + { + __ram4_clear__ = .; + *(.ram4_clear) + *(.ram4_clear.*) + . = ALIGN(4); + __ram4_noinit__ = .; + *(.ram4) + *(.ram4.*) + . = ALIGN(4); + __ram4_free__ = .; + } > ram4 + + .ram5_init : ALIGN(4) + { + __ram5_init_text__ = LOADADDR(.ram5_init); + __ram5_init__ = .; + KEEP(*(.ram5_init)) + KEEP(*(.ram5_init.*)) + . = ALIGN(4); + } > ram5 AT > RAM_INIT_FLASH_LMA + + .ram5 (NOLOAD) : ALIGN(4) + { + __ram5_clear__ = .; + *(.ram5_clear) + *(.ram5_clear.*) + . = ALIGN(4); + __ram5_noinit__ = .; + *(.ram5) + *(.ram5.*) + . = ALIGN(4); + __ram5_free__ = .; + } > ram5 + + .ram6_init : ALIGN(4) + { + __ram6_init_text__ = LOADADDR(.ram6_init); + __ram6_init__ = .; + KEEP(*(.ram6_init)) + KEEP(*(.ram6_init.*)) + . = ALIGN(4); + } > ram6 AT > RAM_INIT_FLASH_LMA + + .ram6 (NOLOAD) : ALIGN(4) + { + __ram6_clear__ = .; + *(.ram6_clear) + *(.ram6_clear.*) + . = ALIGN(4); + __ram6_noinit__ = .; + *(.ram6) + *(.ram6.*) + . = ALIGN(4); + __ram6_free__ = .; + } > ram6 + + .ram7_init : ALIGN(4) + { + __ram7_init_text__ = LOADADDR(.ram7_init); + __ram7_init__ = .; + KEEP(*(.ram7_init)) + KEEP(*(.ram7_init.*)) + . = ALIGN(4); + } > ram7 AT > RAM_INIT_FLASH_LMA + + .ram7 (NOLOAD) : ALIGN(4) + { + __ram7_clear__ = .; + *(.ram7_clear) + *(.ram7_clear.*) + . = ALIGN(4); + __ram7_noinit__ = .; + *(.ram7) + *(.ram7.*) + . = ALIGN(4); + __ram7_free__ = .; + } > ram7 + + .flash0 : ALIGN(4) + { + __flash0_init__ = .; + KEEP(*(.flash0_init)) + KEEP(*(.flash0_init.*)) + __flash0_free__ = .; + } > flash0 + + .flash1 : ALIGN(4) + { + __flash1_init__ = .; + KEEP(*(.flash1_init)) + KEEP(*(.flash1_init.*)) + __flash1_free__ = .; + } > flash1 + + .flash2 : ALIGN(4) + { + __flash2_init__ = .; + KEEP(*(.flash2_init)) + KEEP(*(.flash2_init.*)) + __flash2_free__ = .; + } > flash2 + + .flash3 : ALIGN(4) + { + __flash3_init__ = .; + KEEP(*(.flash3_init)) + KEEP(*(.flash3_init.*)) + __flash3_free__ = .; + } > flash3 + + .flash4 : ALIGN(4) + { + __flash4_init__ = .; + KEEP(*(.flash4_init)) + KEEP(*(.flash4_init.*)) + __flash4_free__ = .; + } > flash4 + + .flash5 : ALIGN(4) + { + __flash5_init__ = .; + KEEP(*(.flash5_init)) + KEEP(*(.flash5_init.*)) + __flash5_free__ = .; + } > flash5 + + .flash6 : ALIGN(4) + { + __flash6_init__ = .; + KEEP(*(.flash6_init)) + KEEP(*(.flash6_init.*)) + __flash6_free__ = .; + } > flash6 + + .flash7 : ALIGN(4) + { + __flash7_init__ = .; + KEEP(*(.flash7_init)) + KEEP(*(.flash7_init.*)) + __flash7_free__ = .; + } > flash7 + + /* The default heap uses the (statically) unused part of a RAM section.*/ + .heap (NOLOAD) : + { + . = ALIGN(8); + __heap_base__ = .; + . = ORIGIN(HEAP_RAM) + LENGTH(HEAP_RAM); + __heap_end__ = .; + } > HEAP_RAM +} diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld new file mode 100644 index 0000000..1c64a44 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/ld/rules_stacks.ld @@ -0,0 +1,40 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +SECTIONS +{ + /* Special section for exceptions stack.*/ + .mstack (NOLOAD) : + { + . = ALIGN(8); + __main_stack_base__ = .; + . += __main_stack_size__; + . = ALIGN(8); + __main_stack_end__ = .; + } > MAIN_STACK_RAM + + /* Special section for process stack.*/ + .pstack (NOLOAD) : + { + . = ALIGN(8); + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > PROCESS_STACK_RAM +} diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk new file mode 100644 index 0000000..5df5fe2 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/arm-none-eabi.mk @@ -0,0 +1,23 @@ +############################################################################## +# Compiler settings +# + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# +# Compiler settings +############################################################################## diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk new file mode 100644 index 0000000..4f7178d --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/rules.mk @@ -0,0 +1,291 @@ +# ARM Cortex-Mx common makefile scripts and rules. + +############################################################################## +# Processing options coming from the upper Makefile. +# + +# Compiler options +OPT := $(USE_OPT) +COPT := $(USE_COPT) +CPPOPT := $(USE_CPPOPT) + +# Garbage collection +ifeq ($(USE_LINK_GC),yes) + OPT += -ffunction-sections -fdata-sections -fno-common + LDOPT := ,--gc-sections +else + LDOPT := +endif + +# Linker extra options +ifneq ($(USE_LDOPT),) + LDOPT := $(LDOPT),$(USE_LDOPT) +endif + +# Link time optimizations +ifeq ($(USE_LTO),yes) + OPT += -flto +endif + +# FPU options default (Cortex-M4 and Cortex-M7 single precision). +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# FPU-related options +ifeq ($(USE_FPU),) + USE_FPU = no +endif +ifneq ($(USE_FPU),no) + OPT += $(USE_FPU_OPT) + DDEFS += -DCORTEX_USE_FPU=TRUE + DADEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE + DADEFS += -DCORTEX_USE_FPU=FALSE +endif + +# Process stack size +ifeq ($(USE_PROCESS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE) +endif + +# Exceptions stack size +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE) +endif + +# Output directory and files +ifeq ($(BUILDDIR),) + BUILDDIR = build +endif +ifeq ($(BUILDDIR),.) + BUILDDIR = build +endif + +# Dependencies directory +ifeq ($(DEPDIR),) + DEPDIR = .dep +endif +ifeq ($(DEPDIR),.) + DEPDIR = .dep +endif + +OUTFILES := $(BUILDDIR)/$(PROJECT).elf \ + $(BUILDDIR)/$(PROJECT).hex \ + $(BUILDDIR)/$(PROJECT).bin \ + $(BUILDDIR)/$(PROJECT).dmp \ + $(BUILDDIR)/$(PROJECT).list + +ifdef SREC + OUTFILES += $(BUILDDIR)/$(PROJECT).srec +endif + +# Source files groups and paths +TCSRC += $(CSRC) +TCPPSRC += $(CPPSRC) +TSRC := $(TCSRC) $(TCPPSRC) +SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC))) + +# Various directories +OBJDIR := $(BUILDDIR)/obj +LSTDIR := $(BUILDDIR)/lst + +# Object files groups +TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o))) +#TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o))) +TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(patsubst %.cpp, %.o, $(filter %.cpp, $(TCPPSRC))))) +TCCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(patsubst %.cc, %.o, $(filter %.cc, $(TCPPSRC))))) +ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) +ASMXOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o))) +#OBJS := $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) +OBJS := $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) $(TCCOBJS) + +# Paths +IINCDIR := $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR)) +LLIBDIR := $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) + +# Macros +DEFS := $(DDEFS) $(UDEFS) +ADEFS := $(DADEFS) $(UADEFS) + +# Libs +LIBS := $(DLIBS) $(ULIBS) + +# Various settings +MCFLAGS := -mcpu=$(MCU) -mthumb +ODFLAGS = -x --syms +ASFLAGS = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS) +ASXFLAGS = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS) +CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS) +CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) +LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(STARTUPLD),--script=$(LDSCRIPT)$(LDOPT) + +# Generate dependency information +ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +CFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +CPPFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d + +# Paths where to search for sources +VPATH = $(SRCPATHS) + +# +# Makefile rules +# + +all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK + +PRE_MAKE_ALL_RULE_HOOK: + +POST_MAKE_ALL_RULE_HOOK: + +$(OBJS): | PRE_MAKE_ALL_RULE_HOOK $(BUILDDIR) $(OBJDIR) $(LSTDIR) $(DEPDIR) + +$(BUILDDIR): +ifneq ($(USE_VERBOSE_COMPILE),yes) + @echo Compiler Options + @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o + @echo +endif + @mkdir -p $(BUILDDIR) + +$(OBJDIR): + @mkdir -p $(OBJDIR) + +$(LSTDIR): + @mkdir -p $(LSTDIR) + +$(DEPDIR): + @mkdir -p $(DEPDIR) + +$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST) +ifeq ($(USE_VERBOSE_COMPILE),yes) + @echo + $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@ +else + @echo Compiling $( $@ + $(SZ) $< +else + @echo Creating $@ + @$(OD) $(ODFLAGS) $< > $@ + @echo + @$(SZ) $< +endif + +%.list: %.elf +ifeq ($(USE_VERBOSE_COMPILE),yes) + $(OD) -S $< > $@ +else + @echo Creating $@ + @$(OD) -S $< > $@ + @echo + @echo Done +endif + +lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a + +$(BUILDDIR)/lib$(PROJECT).a: $(OBJS) + @$(AR) -r $@ $^ + @echo + @echo Done + +clean: CLEAN_RULE_HOOK + @echo Cleaning + @echo - $(DEPDIR) + @-rm -fR $(DEPDIR)/* $(BUILDDIR)/* 2>/dev/null + @-if [ -d "$(DEPDIR)" ]; then rmdir -p --ignore-fail-on-non-empty $(subst ./,,$(DEPDIR)) 2>/dev/null; fi + @echo - $(BUILDDIR) + @-if [ -d "$(BUILDDIR)" ]; then rmdir -p --ignore-fail-on-non-empty $(subst ./,,$(BUILDDIR)) 2>/dev/null; fi + @echo + @echo Done + +CLEAN_RULE_HOOK: + +# +# Include the dependency files, should be the last of the makefile +# +-include $(wildcard $(DEPDIR)/*) + +# *** EOF *** diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm36x.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm36x.mk new file mode 100644 index 0000000..7a9ad98 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm36x.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic ADUCM36x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/ADUCM36x \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ADI/ADUCM36x + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm41x.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm41x.mk new file mode 100644 index 0000000..c40b34b --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_aducm41x.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic ADUCM41x startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/ADUCM41x \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ADI/ADUCM41x + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk new file mode 100644 index 0000000..3101560 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F0xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F0xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk new file mode 100644 index 0000000..0247e72 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F1xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F1xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk new file mode 100644 index 0000000..e216f1e --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f2xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F2xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F2xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F2xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk new file mode 100644 index 0000000..7650405 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F3xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F3xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F3xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk new file mode 100644 index 0000000..e0c8d55 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F4xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F4xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk new file mode 100644 index 0000000..1846f43 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f7xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32F7xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32F7xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32F7xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g0xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g0xx.mk new file mode 100644 index 0000000..5f9eb71 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g0xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32G0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32G0xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32G0xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk new file mode 100644 index 0000000..669ff62 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32g4xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32G4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32G4xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32G4xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk new file mode 100644 index 0000000..e467162 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32H7xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32H7xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32H7xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk new file mode 100644 index 0000000..0c6fc35 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l0xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32L0xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L0xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32L0xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk new file mode 100644 index 0000000..96510e4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l1xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32L1xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L1xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32L1xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk new file mode 100644 index 0000000..87f6587 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk @@ -0,0 +1,18 @@ +# List of the ChibiOS generic STM32L4xx startup and CMSIS files. +STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c + +STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.S + +STARTUPINC = $(CHIBIOS)/os/common/portability/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ + $(CHIBIOS)/os/common/startup/ARMCMx/devices/STM32L4xx \ + $(CHIBIOS)/os/common/ext/ARM/CMSIS/Core/Include \ + $(CHIBIOS)/os/common/ext/ST/STM32L4xx + +STARTUPLD = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/ld + +# Shared variables +ALLXASMSRC += $(STARTUPASM) +ALLCSRC += $(STARTUPSRC) +ALLINC += $(STARTUPINC) diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/vectors.S b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/vectors.S new file mode 100644 index 0000000..ef1c7bc --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/GCC/vectors.S @@ -0,0 +1,1031 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/GCC/vectors.S + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_GCC_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +#define _FROM_ASM_ +#include "cmparams.h" + +#if (CORTEX_NUM_VECTORS % 8) != 0 +#error "the constant CORTEX_NUM_VECTORS must be a multiple of 8" +#endif + +#if (CORTEX_NUM_VECTORS < 8) || (CORTEX_NUM_VECTORS > 240) +#error "the constant CORTEX_NUM_VECTORS must be between 8 and 240 inclusive" +#endif + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .syntax unified + .cpu cortex-m0 + .thumb + + .section .vectors, "ax" + .align 4 + .globl _vectors +_vectors: + .long __main_stack_end__ + .long Reset_Handler + .long NMI_Handler + .long HardFault_Handler + .long MemManage_Handler + .long BusFault_Handler + .long UsageFault_Handler + .long Vector1C + .long Vector20 + .long Vector24 + .long Vector28 + .long SVC_Handler + .long DebugMon_Handler + .long Vector34 + .long PendSV_Handler + .long SysTick_Handler + .long Vector40, Vector44, Vector48, Vector4C +#if CORTEX_NUM_VECTORS > 4 + .long Vector50, Vector54, Vector58, Vector5C +#endif +#if CORTEX_NUM_VECTORS > 8 + .long Vector60, Vector64, Vector68, Vector6C +#endif +#if CORTEX_NUM_VECTORS > 12 + .long Vector70, Vector74, Vector78, Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 + .long Vector80, Vector84, Vector88, Vector8C +#endif +#if CORTEX_NUM_VECTORS > 20 + .long Vector90, Vector94, Vector98, Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 + .long VectorA0, VectorA4, VectorA8, VectorAC +#endif +#if CORTEX_NUM_VECTORS > 28 + .long VectorB0, VectorB4, VectorB8, VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 + .long VectorC0, VectorC4, VectorC8, VectorCC +#endif +#if CORTEX_NUM_VECTORS > 36 + .long VectorD0, VectorD4, VectorD8, VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 + .long VectorE0, VectorE4, VectorE8, VectorEC +#endif +#if CORTEX_NUM_VECTORS > 44 + .long VectorF0, VectorF4, VectorF8, VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 + .long Vector100, Vector104, Vector108, Vector10C +#endif +#if CORTEX_NUM_VECTORS > 52 + .long Vector110, Vector114, Vector118, Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 + .long Vector120, Vector124, Vector128, Vector12C +#endif +#if CORTEX_NUM_VECTORS > 60 + .long Vector130, Vector134, Vector138, Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 + .long Vector140, Vector144, Vector148, Vector14C +#endif +#if CORTEX_NUM_VECTORS > 68 + .long Vector150, Vector154, Vector158, Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 + .long Vector160, Vector164, Vector168, Vector16C +#endif +#if CORTEX_NUM_VECTORS > 76 + .long Vector170, Vector174, Vector178, Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 + .long Vector180, Vector184, Vector188, Vector18C +#endif +#if CORTEX_NUM_VECTORS > 84 + .long Vector190, Vector194, Vector198, Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 + .long Vector1A0, Vector1A4, Vector1A8, Vector1AC +#endif +#if CORTEX_NUM_VECTORS > 92 + .long Vector1B0, Vector1B4, Vector1B8, Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 + .long Vector1C0, Vector1C4, Vector1C8, Vector1CC +#endif +#if CORTEX_NUM_VECTORS > 100 + .long Vector1D0, Vector1D4, Vector1D8, Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 + .long Vector1E0, Vector1E4, Vector1E8, Vector1EC +#endif +#if CORTEX_NUM_VECTORS > 108 + .long Vector1F0, Vector1F4, Vector1F8, Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 + .long Vector200, Vector204, Vector208, Vector20C +#endif +#if CORTEX_NUM_VECTORS > 116 + .long Vector210, Vector214, Vector218, Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 + .long Vector220, Vector224, Vector228, Vector22C +#endif +#if CORTEX_NUM_VECTORS > 124 + .long Vector230, Vector234, Vector238, Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 + .long Vector240, Vector244, Vector248, Vector24C +#endif +#if CORTEX_NUM_VECTORS > 132 + .long Vector250, Vector254, Vector258, Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 + .long Vector260, Vector264, Vector268, Vector26C +#endif +#if CORTEX_NUM_VECTORS > 140 + .long Vector270, Vector274, Vector278, Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 + .long Vector280, Vector284, Vector288, Vector28C +#endif +#if CORTEX_NUM_VECTORS > 148 + .long Vector290, Vector294, Vector298, Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 + .long Vector2A0, Vector2A4, Vector2A8, Vector2AC +#endif +#if CORTEX_NUM_VECTORS > 156 + .long Vector2B0, Vector2B4, Vector2B8, Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 + .long Vector2C0, Vector2C4, Vector2C8, Vector2CC +#endif +#if CORTEX_NUM_VECTORS > 164 + .long Vector2D0, Vector2D4, Vector2D8, Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 + .long Vector2E0, Vector2E4, Vector2E8, Vector2EC +#endif +#if CORTEX_NUM_VECTORS > 172 + .long Vector2F0, Vector2F4, Vector2F8, Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 + .long Vector300, Vector304, Vector308, Vector30C +#endif +#if CORTEX_NUM_VECTORS > 180 + .long Vector310, Vector314, Vector318, Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 + .long Vector320, Vector324, Vector328, Vector32C +#endif +#if CORTEX_NUM_VECTORS > 188 + .long Vector330, Vector334, Vector338, Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 + .long Vector340, Vector344, Vector348, Vector34C +#endif +#if CORTEX_NUM_VECTORS > 196 + .long Vector350, Vector354, Vector358, Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 + .long Vector360, Vector364, Vector368, Vector36C +#endif +#if CORTEX_NUM_VECTORS > 204 + .long Vector370, Vector374, Vector378, Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 + .long Vector380, Vector384, Vector388, Vector38C +#endif +#if CORTEX_NUM_VECTORS > 212 + .long Vector390, Vector394, Vector398, Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 + .long Vector3A0, Vector3A4, Vector3A8, Vector3AC +#endif +#if CORTEX_NUM_VECTORS > 220 + .long Vector3B0, Vector3B4, Vector3B8, Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 + .long Vector3C0, Vector3C4, Vector3C8, Vector3CC +#endif +#if CORTEX_NUM_VECTORS > 228 + .long Vector3D0, Vector3D4, Vector3D8, Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + .long Vector3E0, Vector3E4, Vector3E8, Vector3EC +#endif +#if CORTEX_NUM_VECTORS > 236 + .long Vector3F0, Vector3F4, Vector3F8, Vector3FC +#endif + + .text + + .align 2 + .thumb_func + .weak Reset_Handler +Reset_Handler: + b _crt0_entry + + .thumb_func + .weak NMI_Handler + .weak HardFault_Handler + .weak MemManage_Handler + .weak BusFault_Handler + .weak UsageFault_Handler + .weak Vector1C + .weak Vector20 + .weak Vector24 + .weak Vector28 + .weak SVC_Handler + .weak DebugMon_Handler + .weak Vector34 + .weak PendSV_Handler + .weak SysTick_Handler + .weak Vector40, Vector44, Vector48, Vector4C +#if CORTEX_NUM_VECTORS > 4 + .weak Vector50, Vector54, Vector58, Vector5C +#endif +#if CORTEX_NUM_VECTORS > 8 + .weak Vector60, Vector64, Vector68, Vector6C +#endif +#if CORTEX_NUM_VECTORS > 12 + .weak Vector70, Vector74, Vector78, Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 + .weak Vector80, Vector84, Vector88, Vector8C +#endif +#if CORTEX_NUM_VECTORS > 20 + .weak Vector90, Vector94, Vector98, Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 + .weak VectorA0, VectorA4, VectorA8, VectorAC +#endif +#if CORTEX_NUM_VECTORS > 28 + .weak VectorB0, VectorB4, VectorB8, VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 + .weak VectorC0, VectorC4, VectorC8, VectorCC +#endif +#if CORTEX_NUM_VECTORS > 36 + .weak VectorD0, VectorD4, VectorD8, VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 + .weak VectorE0, VectorE4, VectorE8, VectorEC +#endif +#if CORTEX_NUM_VECTORS > 44 + .weak VectorF0, VectorF4, VectorF8, VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 + .weak Vector100, Vector104, Vector108, Vector10C +#endif +#if CORTEX_NUM_VECTORS > 52 + .weak Vector110, Vector114, Vector118, Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 + .weak Vector120, Vector124, Vector128, Vector12C +#endif +#if CORTEX_NUM_VECTORS > 60 + .weak Vector130, Vector134, Vector138, Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 + .weak Vector140, Vector144, Vector148, Vector14C +#endif +#if CORTEX_NUM_VECTORS > 68 + .weak Vector150, Vector154, Vector158, Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 + .weak Vector160, Vector164, Vector168, Vector16C +#endif +#if CORTEX_NUM_VECTORS > 76 + .weak Vector170, Vector174, Vector178, Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 + .weak Vector180, Vector184, Vector188, Vector18C +#endif +#if CORTEX_NUM_VECTORS > 84 + .weak Vector190, Vector194, Vector198, Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 + .weak Vector1A0, Vector1A4, Vector1A8, Vector1AC +#endif +#if CORTEX_NUM_VECTORS > 92 + .weak Vector1B0, Vector1B4, Vector1B8, Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 + .weak Vector1C0, Vector1C4, Vector1C8, Vector1CC +#endif +#if CORTEX_NUM_VECTORS > 100 + .weak Vector1D0, Vector1D4, Vector1D8, Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 + .weak Vector1E0, Vector1E4, Vector1E8, Vector1EC +#endif +#if CORTEX_NUM_VECTORS > 108 + .weak Vector1F0, Vector1F4, Vector1F8, Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 + .weak Vector200, Vector204, Vector208, Vector20C +#endif +#if CORTEX_NUM_VECTORS > 116 + .weak Vector210, Vector214, Vector218, Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 + .weak Vector220, Vector224, Vector228, Vector22C +#endif +#if CORTEX_NUM_VECTORS > 124 + .weak Vector230, Vector234, Vector238, Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 + .weak Vector240, Vector244, Vector248, Vector24C +#endif +#if CORTEX_NUM_VECTORS > 132 + .weak Vector250, Vector254, Vector258, Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 + .weak Vector260, Vector264, Vector268, Vector26C +#endif +#if CORTEX_NUM_VECTORS > 140 + .weak Vector270, Vector274, Vector278, Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 + .weak Vector280, Vector284, Vector288, Vector28C +#endif +#if CORTEX_NUM_VECTORS > 148 + .weak Vector290, Vector294, Vector298, Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 + .weak Vector2A0, Vector2A4, Vector2A8, Vector2AC +#endif +#if CORTEX_NUM_VECTORS > 156 + .weak Vector2B0, Vector2B4, Vector2B8, Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 + .weak Vector2C0, Vector2C4, Vector2C8, Vector2CC +#endif +#if CORTEX_NUM_VECTORS > 164 + .weak Vector2D0, Vector2D4, Vector2D8, Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 + .weak Vector2E0, Vector2E4, Vector2E8, Vector2EC +#endif +#if CORTEX_NUM_VECTORS > 172 + .weak Vector2F0, Vector2F4, Vector2F8, Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 + .weak Vector300, Vector304, Vector308, Vector30C +#endif +#if CORTEX_NUM_VECTORS > 180 + .weak Vector310, Vector314, Vector318, Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 + .weak Vector320, Vector324, Vector328, Vector32C +#endif +#if CORTEX_NUM_VECTORS > 188 + .weak Vector330, Vector334, Vector338, Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 + .weak Vector340, Vector344, Vector348, Vector34C +#endif +#if CORTEX_NUM_VECTORS > 196 + .weak Vector350, Vector354, Vector358, Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 + .weak Vector360, Vector364, Vector368, Vector36C +#endif +#if CORTEX_NUM_VECTORS > 204 + .weak Vector370, Vector374, Vector378, Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 + .weak Vector380, Vector384, Vector388, Vector38C +#endif +#if CORTEX_NUM_VECTORS > 212 + .weak Vector390, Vector394, Vector398, Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 + .weak Vector3A0, Vector3A4, Vector3A8, Vector3AC +#endif +#if CORTEX_NUM_VECTORS > 220 + .weak Vector3B0, Vector3B4, Vector3B8, Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 + .weak Vector3C0, Vector3C4, Vector3C8, Vector3CC +#endif +#if CORTEX_NUM_VECTORS > 228 + .weak Vector3D0, Vector3D4, Vector3D8, Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + .weak Vector3E0, Vector3E4, Vector3E8, Vector3EC +#endif +#if CORTEX_NUM_VECTORS > 236 + .weak Vector3F0, Vector3F4, Vector3F8, Vector3FC +#endif + + .thumb_func +NMI_Handler: + .thumb_func +HardFault_Handler: + .thumb_func +MemManage_Handler: + .thumb_func +BusFault_Handler: + .thumb_func +UsageFault_Handler: + .thumb_func +Vector1C: + .thumb_func +Vector20: + .thumb_func +Vector24: + .thumb_func +Vector28: + .thumb_func +SVC_Handler: + .thumb_func +DebugMon_Handler: + .thumb_func +Vector34: + .thumb_func +PendSV_Handler: + .thumb_func +SysTick_Handler: + .thumb_func +Vector40: + .thumb_func +Vector44: + .thumb_func +Vector48: + .thumb_func +Vector4C: + .thumb_func +Vector50: + .thumb_func +Vector54: + .thumb_func +Vector58: + .thumb_func +Vector5C: +#if CORTEX_NUM_VECTORS > 8 + .thumb_func +Vector60: + .thumb_func +Vector64: + .thumb_func +Vector68: + .thumb_func +Vector6C: + .thumb_func +Vector70: + .thumb_func +Vector74: + .thumb_func +Vector78: + .thumb_func +Vector7C: +#endif +#if CORTEX_NUM_VECTORS > 16 + .thumb_func +Vector80: + .thumb_func +Vector84: + .thumb_func +Vector88: + .thumb_func +Vector8C: + .thumb_func +Vector90: + .thumb_func +Vector94: + .thumb_func +Vector98: + .thumb_func +Vector9C: +#endif +#if CORTEX_NUM_VECTORS > 24 + .thumb_func +VectorA0: + .thumb_func +VectorA4: + .thumb_func +VectorA8: + .thumb_func +VectorAC: + .thumb_func +VectorB0: + .thumb_func +VectorB4: + .thumb_func +VectorB8: + .thumb_func +VectorBC: +#endif +#if CORTEX_NUM_VECTORS > 32 + .thumb_func +VectorC0: + .thumb_func +VectorC4: + .thumb_func +VectorC8: + .thumb_func +VectorCC: + .thumb_func +VectorD0: + .thumb_func +VectorD4: + .thumb_func +VectorD8: + .thumb_func +VectorDC: +#endif +#if CORTEX_NUM_VECTORS > 40 + .thumb_func +VectorE0: + .thumb_func +VectorE4: + .thumb_func +VectorE8: + .thumb_func +VectorEC: + .thumb_func +VectorF0: + .thumb_func +VectorF4: + .thumb_func +VectorF8: + .thumb_func +VectorFC: +#endif +#if CORTEX_NUM_VECTORS > 48 + .thumb_func +Vector100: + .thumb_func +Vector104: + .thumb_func +Vector108: + .thumb_func +Vector10C: + .thumb_func +Vector110: + .thumb_func +Vector114: + .thumb_func +Vector118: + .thumb_func +Vector11C: +#endif +#if CORTEX_NUM_VECTORS > 56 + .thumb_func +Vector120: + .thumb_func +Vector124: + .thumb_func +Vector128: + .thumb_func +Vector12C: + .thumb_func +Vector130: + .thumb_func +Vector134: + .thumb_func +Vector138: + .thumb_func +Vector13C: +#endif +#if CORTEX_NUM_VECTORS > 64 + .thumb_func +Vector140: + .thumb_func +Vector144: + .thumb_func +Vector148: + .thumb_func +Vector14C: + .thumb_func +Vector150: + .thumb_func +Vector154: + .thumb_func +Vector158: + .thumb_func +Vector15C: +#endif +#if CORTEX_NUM_VECTORS > 72 + .thumb_func +Vector160: + .thumb_func +Vector164: + .thumb_func +Vector168: + .thumb_func +Vector16C: + .thumb_func +Vector170: + .thumb_func +Vector174: + .thumb_func +Vector178: + .thumb_func +Vector17C: +#endif +#if CORTEX_NUM_VECTORS > 80 + .thumb_func +Vector180: + .thumb_func +Vector184: + .thumb_func +Vector188: + .thumb_func +Vector18C: + .thumb_func +Vector190: + .thumb_func +Vector194: + .thumb_func +Vector198: + .thumb_func +Vector19C: +#endif +#if CORTEX_NUM_VECTORS > 88 + .thumb_func +Vector1A0: + .thumb_func +Vector1A4: + .thumb_func +Vector1A8: + .thumb_func +Vector1AC: + .thumb_func +Vector1B0: + .thumb_func +Vector1B4: + .thumb_func +Vector1B8: + .thumb_func +Vector1BC: +#endif +#if CORTEX_NUM_VECTORS > 96 + .thumb_func +Vector1C0: + .thumb_func +Vector1C4: + .thumb_func +Vector1C8: + .thumb_func +Vector1CC: + .thumb_func +Vector1D0: + .thumb_func +Vector1D4: + .thumb_func +Vector1D8: + .thumb_func +Vector1DC: +#endif +#if CORTEX_NUM_VECTORS > 104 + .thumb_func +Vector1E0: + .thumb_func +Vector1E4: + .thumb_func +Vector1E8: + .thumb_func +Vector1EC: + .thumb_func +Vector1F0: + .thumb_func +Vector1F4: + .thumb_func +Vector1F8: + .thumb_func +Vector1FC: +#endif +#if CORTEX_NUM_VECTORS > 112 + .thumb_func +Vector200: + .thumb_func +Vector204: + .thumb_func +Vector208: + .thumb_func +Vector20C: + .thumb_func +Vector210: + .thumb_func +Vector214: + .thumb_func +Vector218: + .thumb_func +Vector21C: +#endif +#if CORTEX_NUM_VECTORS > 120 + .thumb_func +Vector220: + .thumb_func +Vector224: + .thumb_func +Vector228: + .thumb_func +Vector22C: + .thumb_func +Vector230: + .thumb_func +Vector234: + .thumb_func +Vector238: + .thumb_func +Vector23C: +#endif +#if CORTEX_NUM_VECTORS > 128 + .thumb_func +Vector240: + .thumb_func +Vector244: + .thumb_func +Vector248: + .thumb_func +Vector24C: + .thumb_func +Vector250: + .thumb_func +Vector254: + .thumb_func +Vector258: + .thumb_func +Vector25C: +#endif +#if CORTEX_NUM_VECTORS > 136 + .thumb_func +Vector260: + .thumb_func +Vector264: + .thumb_func +Vector268: + .thumb_func +Vector26C: + .thumb_func +Vector270: + .thumb_func +Vector274: + .thumb_func +Vector278: + .thumb_func +Vector27C: +#endif +#if CORTEX_NUM_VECTORS > 144 + .thumb_func +Vector280: + .thumb_func +Vector284: + .thumb_func +Vector288: + .thumb_func +Vector28C: + .thumb_func +Vector290: + .thumb_func +Vector294: + .thumb_func +Vector298: + .thumb_func +Vector29C: +#endif +#if CORTEX_NUM_VECTORS > 152 + .thumb_func +Vector2A0: + .thumb_func +Vector2A4: + .thumb_func +Vector2A8: + .thumb_func +Vector2AC: + .thumb_func +Vector2B0: + .thumb_func +Vector2B4: + .thumb_func +Vector2B8: + .thumb_func +Vector2BC: +#endif +#if CORTEX_NUM_VECTORS > 160 + .thumb_func +Vector2C0: + .thumb_func +Vector2C4: + .thumb_func +Vector2C8: + .thumb_func +Vector2CC: + .thumb_func +Vector2D0: + .thumb_func +Vector2D4: + .thumb_func +Vector2D8: + .thumb_func +Vector2DC: +#endif +#if CORTEX_NUM_VECTORS > 168 + .thumb_func +Vector2E0: + .thumb_func +Vector2E4: + .thumb_func +Vector2E8: + .thumb_func +Vector2EC: + .thumb_func +Vector2F0: + .thumb_func +Vector2F4: + .thumb_func +Vector2F8: + .thumb_func +Vector2FC: +#endif +#if CORTEX_NUM_VECTORS > 176 + .thumb_func +Vector300: + .thumb_func +Vector304: + .thumb_func +Vector308: + .thumb_func +Vector30C: + .thumb_func +Vector310: + .thumb_func +Vector314: + .thumb_func +Vector318: + .thumb_func +Vector31C: +#endif +#if CORTEX_NUM_VECTORS > 184 + .thumb_func +Vector320: + .thumb_func +Vector324: + .thumb_func +Vector328: + .thumb_func +Vector32C: + .thumb_func +Vector330: + .thumb_func +Vector334: + .thumb_func +Vector338: + .thumb_func +Vector33C: +#endif +#if CORTEX_NUM_VECTORS > 192 + .thumb_func +Vector340: + .thumb_func +Vector344: + .thumb_func +Vector348: + .thumb_func +Vector34C: + .thumb_func +Vector350: + .thumb_func +Vector354: + .thumb_func +Vector358: + .thumb_func +Vector35C: +#endif +#if CORTEX_NUM_VECTORS > 200 + .thumb_func +Vector360: + .thumb_func +Vector364: + .thumb_func +Vector368: + .thumb_func +Vector36C: + .thumb_func +Vector370: + .thumb_func +Vector374: + .thumb_func +Vector378: + .thumb_func +Vector37C: +#endif +#if CORTEX_NUM_VECTORS > 208 + .thumb_func +Vector380: + .thumb_func +Vector384: + .thumb_func +Vector388: + .thumb_func +Vector38C: + .thumb_func +Vector390: + .thumb_func +Vector394: + .thumb_func +Vector398: + .thumb_func +Vector39C: +#endif +#if CORTEX_NUM_VECTORS > 216 + .thumb_func +Vector3A0: + .thumb_func +Vector3A4: + .thumb_func +Vector3A8: + .thumb_func +Vector3AC: + .thumb_func +Vector3B0: + .thumb_func +Vector3B4: + .thumb_func +Vector3B8: + .thumb_func +Vector3BC: +#endif +#if CORTEX_NUM_VECTORS > 224 + .thumb_func +Vector3C0: + .thumb_func +Vector3C4: + .thumb_func +Vector3C8: + .thumb_func +Vector3CC: + .thumb_func +Vector3D0: + .thumb_func +Vector3D4: + .thumb_func +Vector3D8: + .thumb_func +Vector3DC: +#endif +#if CORTEX_NUM_VECTORS > 232 + .thumb_func +Vector3E0: + .thumb_func +Vector3E4: + .thumb_func +Vector3E8: + .thumb_func +Vector3EC: + .thumb_func +Vector3F0: + .thumb_func +Vector3F4: + .thumb_func +Vector3F8: + .thumb_func +Vector3FC: +#endif + bl _unhandled_exception + + .thumb_func + .weak _unhandled_exception +_unhandled_exception: +.stay: + b .stay + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/cstartup.s b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/cstartup.s new file mode 100644 index 0000000..bf7aeca --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/cstartup.s @@ -0,0 +1,169 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/compilers/IAR/cstartup.s + * @brief Generic IAR Cortex-Mx startup file. + * + * @addtogroup ARMCMx_IAR_STARTUP + * @{ + */ + +#if !defined(__DOXYGEN__) + +#define SCB_VTOR 0xE000ED08 + + /** + * @brief VTOR special register initialization. + * @details VTOR is initialized to point to the vectors table. + * @note IAR assembler #if directive conditions do not work like C/C++ conditions. + * @details Set to 0 to disable the function, 1 to enable + */ +#ifndef CRT0_VTOR_INIT +#define CRT0_VTOR_INIT 1 +#endif +/** + * @brief Stack segments initialization value. + */ +#ifndef CRT0_STACKS_FILL_PATTERN +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + * @details Set to 0 to disable the function, 1 to enable + */ +#ifndef CRT0_INIT_STACKS +#define CRT0_INIT_STACKS 1 +#endif + +/** + * @brief Heap segment initialization value. + */ +#ifndef CRT0_HEAP_FILL_PATTERN +#define CRT0_HEAP_FILL_PATTERN 0xCCCCCCCC +#endif + +/** + * @brief Heap segment initialization switch. + * @details Set to 0 to disable the function, 1 to enable + */ +#ifndef CRT0_INIT_HEAP +#define CRT0_INIT_HEAP 1 +#endif + + + MODULE ?cstartup + +CONTROL_MODE_PRIVILEGED SET 0 +CONTROL_MODE_UNPRIVILEGED SET 1 +CONTROL_USE_MSP SET 0 +CONTROL_USE_PSP SET 2 + + AAPCS INTERWORK, VFP_COMPATIBLE, ROPI + PRESERVE8 + + SECTION HEAP:DATA:NOROOT(3) + PUBLIC __heap_base__ +__heap_base__: /* Note: heap section defines sysheap base */ + + SECTION SYSHEAP:DATA:NOROOT(3) + PUBLIC __heap_end__ +__heap_end__: /* Note: sysheap section defines sysheap end */ + + PUBLIC __iar_program_start + EXTWEAK __iar_init_core + EXTWEAK __iar_init_vfp + EXTERN __cmain + EXTERN __vector_table + EXTERN __main_stack_base__ + EXTERN __main_stack_end__ + EXTERN __process_stack_base__ + EXTERN __process_stack_end__ + + SECTION IRQSTACK:DATA:NOROOT(3) + SECTION CSTACK:DATA:NOROOT(3) + SECTION .text:CODE:REORDER(2) + THUMB + +__iar_program_start: + cpsid i + ldr r0, =SFE(IRQSTACK) + msr MSP, r0 + ldr r0, =SFE(CSTACK) + msr PSP, r0 + movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP + msr CONTROL, r0 + isb + +#if (CRT0_VTOR_INIT) + ldr r0, =__vector_table + movw r1, #SCB_VTOR & 0xFFFF + movt r1, #SCB_VTOR >> 16 + str r0, [r1] +#endif + +#if (CRT0_INIT_STACKS) + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the stack size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo msloop + + /* Process Stack initialization. Note, it assumes that the stack size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo psloop +#endif + +#if (CRT0_INIT_HEAP) + ldr r0, =CRT0_HEAP_FILL_PATTERN + /* Sys Heap initialization. Note, it assumes that the heap size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =__heap_base__ + ldr r2, =__heap_end__ +hloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo hloop +#endif + + bl __early_init + bl __iar_init_core + bl __iar_init_vfp + b __cmain + + SECTION .text:CODE:NOROOT:REORDER(2) + PUBWEAK __early_init +__early_init: + bx lr + + END + +#endif /* !defined(__DOXYGEN__) */ + +/**< @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/vectors.s b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/vectors.s new file mode 100644 index 0000000..ec0360e --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/IAR/vectors.s @@ -0,0 +1,1006 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/compilers/IAR/vectors.c + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_IAR_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +#define _FROM_ASM_ +#include "cmparams.h" + +#if !defined(__DOXYGEN__) + +#if (CORTEX_NUM_VECTORS & 7) != 0 +#error "the constant CORTEX_NUM_VECTORS must be a multiple of 8" +#endif + +#if (CORTEX_NUM_VECTORS < 8) || (CORTEX_NUM_VECTORS > 240) +#error "the constant CORTEX_NUM_VECTORS must be between 8 and 240 inclusive" +#endif + + MODULE ?vectors + + AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE + PRESERVE8 + + SECTION IRQSTACK:DATA:NOROOT(3) + SECTION .intvec:CODE:NOROOT(3) + + EXTERN __iar_program_start + PUBLIC __vector_table + + DATA + +__vector_table: + DCD SFE(IRQSTACK) + DCD __iar_program_start + DCD NMI_Handler + DCD HardFault_Handler + DCD MemManage_Handler + DCD BusFault_Handler + DCD UsageFault_Handler + DCD Vector1C + DCD Vector20 + DCD Vector24 + DCD Vector28 + DCD SVC_Handler + DCD DebugMon_Handler + DCD Vector34 + DCD PendSV_Handler + DCD SysTick_Handler + DCD Vector40 + DCD Vector44 + DCD Vector48 + DCD Vector4C + DCD Vector50 + DCD Vector54 + DCD Vector58 + DCD Vector5C +#if CORTEX_NUM_VECTORS > 8 + DCD Vector60 + DCD Vector64 + DCD Vector68 + DCD Vector6C + DCD Vector70 + DCD Vector74 + DCD Vector78 + DCD Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 + DCD Vector80 + DCD Vector84 + DCD Vector88 + DCD Vector8C + DCD Vector90 + DCD Vector94 + DCD Vector98 + DCD Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 + DCD VectorA0 + DCD VectorA4 + DCD VectorA8 + DCD VectorAC + DCD VectorB0 + DCD VectorB4 + DCD VectorB8 + DCD VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 + DCD VectorC0 + DCD VectorC4 + DCD VectorC8 + DCD VectorCC + DCD VectorD0 + DCD VectorD4 + DCD VectorD8 + DCD VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 + DCD VectorE0 + DCD VectorE4 + DCD VectorE8 + DCD VectorEC + DCD VectorF0 + DCD VectorF4 + DCD VectorF8 + DCD VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 + DCD Vector100 + DCD Vector104 + DCD Vector108 + DCD Vector10C + DCD Vector110 + DCD Vector114 + DCD Vector118 + DCD Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 + DCD Vector120 + DCD Vector124 + DCD Vector128 + DCD Vector12C + DCD Vector130 + DCD Vector134 + DCD Vector138 + DCD Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 + DCD Vector140 + DCD Vector144 + DCD Vector148 + DCD Vector14C + DCD Vector150 + DCD Vector154 + DCD Vector158 + DCD Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 + DCD Vector160 + DCD Vector164 + DCD Vector168 + DCD Vector16C + DCD Vector170 + DCD Vector174 + DCD Vector178 + DCD Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 + DCD Vector180 + DCD Vector184 + DCD Vector188 + DCD Vector18C + DCD Vector190 + DCD Vector194 + DCD Vector198 + DCD Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 + DCD Vector1A0 + DCD Vector1A4 + DCD Vector1A8 + DCD Vector1AC + DCD Vector1B0 + DCD Vector1B4 + DCD Vector1B8 + DCD Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 + DCD Vector1C0 + DCD Vector1C4 + DCD Vector1C8 + DCD Vector1CC + DCD Vector1D0 + DCD Vector1D4 + DCD Vector1D8 + DCD Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 + DCD Vector1E0 + DCD Vector1E4 + DCD Vector1E8 + DCD Vector1EC + DCD Vector1F0 + DCD Vector1F4 + DCD Vector1F8 + DCD Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 + DCD Vector200 + DCD Vector204 + DCD Vector208 + DCD Vector20C + DCD Vector210 + DCD Vector214 + DCD Vector218 + DCD Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 + DCD Vector220 + DCD Vector224 + DCD Vector228 + DCD Vector22C + DCD Vector230 + DCD Vector234 + DCD Vector238 + DCD Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 + DCD Vector240 + DCD Vector244 + DCD Vector248 + DCD Vector24C + DCD Vector250 + DCD Vector254 + DCD Vector258 + DCD Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 + DCD Vector260 + DCD Vector264 + DCD Vector268 + DCD Vector26C + DCD Vector270 + DCD Vector274 + DCD Vector278 + DCD Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 + DCD Vector280 + DCD Vector284 + DCD Vector288 + DCD Vector28C + DCD Vector290 + DCD Vector294 + DCD Vector298 + DCD Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 + DCD Vector2A0 + DCD Vector2A4 + DCD Vector2A8 + DCD Vector2AC + DCD Vector2B0 + DCD Vector2B4 + DCD Vector2B8 + DCD Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 + DCD Vector2C0 + DCD Vector2C4 + DCD Vector2C8 + DCD Vector2CC + DCD Vector2D0 + DCD Vector2D4 + DCD Vector2D8 + DCD Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 + DCD Vector2E0 + DCD Vector2E4 + DCD Vector2E8 + DCD Vector2EC + DCD Vector2F0 + DCD Vector2F4 + DCD Vector2F8 + DCD Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 + DCD Vector300 + DCD Vector304 + DCD Vector308 + DCD Vector30C + DCD Vector310 + DCD Vector314 + DCD Vector318 + DCD Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 + DCD Vector320 + DCD Vector324 + DCD Vector328 + DCD Vector32C + DCD Vector330 + DCD Vector334 + DCD Vector338 + DCD Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 + DCD Vector340 + DCD Vector344 + DCD Vector348 + DCD Vector34C + DCD Vector350 + DCD Vector354 + DCD Vector358 + DCD Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 + DCD Vector360 + DCD Vector364 + DCD Vector368 + DCD Vector36C + DCD Vector370 + DCD Vector374 + DCD Vector378 + DCD Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 + DCD Vector380 + DCD Vector384 + DCD Vector388 + DCD Vector38C + DCD Vector390 + DCD Vector394 + DCD Vector398 + DCD Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 + DCD Vector3A0 + DCD Vector3A4 + DCD Vector3A8 + DCD Vector3AC + DCD Vector3B0 + DCD Vector3B4 + DCD Vector3B8 + DCD Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 + DCD Vector3C0 + DCD Vector3C4 + DCD Vector3C8 + DCD Vector3CC + DCD Vector3D0 + DCD Vector3D4 + DCD Vector3D8 + DCD Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + DCD Vector3E0 + DCD Vector3E4 + DCD Vector3E8 + DCD Vector3EC + DCD Vector3F0 + DCD Vector3F4 + DCD Vector3F8 + DCD Vector3FC +#endif + +/* + * Default interrupt handlers. + */ + PUBWEAK NMI_Handler + PUBWEAK HardFault_Handler + PUBWEAK MemManage_Handler + PUBWEAK BusFault_Handler + PUBWEAK UsageFault_Handler + PUBWEAK Vector1C + PUBWEAK Vector20 + PUBWEAK Vector24 + PUBWEAK Vector28 + PUBWEAK SVC_Handler + PUBWEAK DebugMon_Handler + PUBWEAK Vector34 + PUBWEAK PendSV_Handler + PUBWEAK SysTick_Handler + PUBWEAK Vector40 + PUBWEAK Vector44 + PUBWEAK Vector48 + PUBWEAK Vector4C + PUBWEAK Vector50 + PUBWEAK Vector54 + PUBWEAK Vector58 + PUBWEAK Vector5C +#if CORTEX_NUM_VECTORS > 8 + PUBWEAK Vector60 + PUBWEAK Vector64 + PUBWEAK Vector68 + PUBWEAK Vector6C + PUBWEAK Vector70 + PUBWEAK Vector74 + PUBWEAK Vector78 + PUBWEAK Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 + PUBWEAK Vector80 + PUBWEAK Vector84 + PUBWEAK Vector88 + PUBWEAK Vector8C + PUBWEAK Vector90 + PUBWEAK Vector94 + PUBWEAK Vector98 + PUBWEAK Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 + PUBWEAK VectorA0 + PUBWEAK VectorA4 + PUBWEAK VectorA8 + PUBWEAK VectorAC + PUBWEAK VectorB0 + PUBWEAK VectorB4 + PUBWEAK VectorB8 + PUBWEAK VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 + PUBWEAK VectorC0 + PUBWEAK VectorC4 + PUBWEAK VectorC8 + PUBWEAK VectorCC + PUBWEAK VectorD0 + PUBWEAK VectorD4 + PUBWEAK VectorD8 + PUBWEAK VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 + PUBWEAK VectorE0 + PUBWEAK VectorE4 + PUBWEAK VectorE8 + PUBWEAK VectorEC + PUBWEAK VectorF0 + PUBWEAK VectorF4 + PUBWEAK VectorF8 + PUBWEAK VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 + PUBWEAK Vector100 + PUBWEAK Vector104 + PUBWEAK Vector108 + PUBWEAK Vector10C + PUBWEAK Vector110 + PUBWEAK Vector114 + PUBWEAK Vector118 + PUBWEAK Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 + PUBWEAK Vector120 + PUBWEAK Vector124 + PUBWEAK Vector128 + PUBWEAK Vector12C + PUBWEAK Vector130 + PUBWEAK Vector134 + PUBWEAK Vector138 + PUBWEAK Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 + PUBWEAK Vector140 + PUBWEAK Vector144 + PUBWEAK Vector148 + PUBWEAK Vector14C + PUBWEAK Vector150 + PUBWEAK Vector154 + PUBWEAK Vector158 + PUBWEAK Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 + PUBWEAK Vector160 + PUBWEAK Vector164 + PUBWEAK Vector168 + PUBWEAK Vector16C + PUBWEAK Vector170 + PUBWEAK Vector174 + PUBWEAK Vector178 + PUBWEAK Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 + PUBWEAK Vector180 + PUBWEAK Vector184 + PUBWEAK Vector188 + PUBWEAK Vector18C + PUBWEAK Vector190 + PUBWEAK Vector194 + PUBWEAK Vector198 + PUBWEAK Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 + PUBWEAK Vector1A0 + PUBWEAK Vector1A4 + PUBWEAK Vector1A8 + PUBWEAK Vector1AC + PUBWEAK Vector1B0 + PUBWEAK Vector1B4 + PUBWEAK Vector1B8 + PUBWEAK Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 + PUBWEAK Vector1C0 + PUBWEAK Vector1C4 + PUBWEAK Vector1C8 + PUBWEAK Vector1CC + PUBWEAK Vector1D0 + PUBWEAK Vector1D4 + PUBWEAK Vector1D8 + PUBWEAK Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 + PUBWEAK Vector1E0 + PUBWEAK Vector1E4 + PUBWEAK Vector1E8 + PUBWEAK Vector1EC + PUBWEAK Vector1F0 + PUBWEAK Vector1F4 + PUBWEAK Vector1F8 + PUBWEAK Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 + PUBWEAK Vector200 + PUBWEAK Vector204 + PUBWEAK Vector208 + PUBWEAK Vector20C + PUBWEAK Vector210 + PUBWEAK Vector214 + PUBWEAK Vector218 + PUBWEAK Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 + PUBWEAK Vector220 + PUBWEAK Vector224 + PUBWEAK Vector228 + PUBWEAK Vector22C + PUBWEAK Vector230 + PUBWEAK Vector234 + PUBWEAK Vector238 + PUBWEAK Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 + PUBWEAK Vector240 + PUBWEAK Vector244 + PUBWEAK Vector248 + PUBWEAK Vector24C + PUBWEAK Vector250 + PUBWEAK Vector254 + PUBWEAK Vector258 + PUBWEAK Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 + PUBWEAK Vector260 + PUBWEAK Vector264 + PUBWEAK Vector268 + PUBWEAK Vector26C + PUBWEAK Vector270 + PUBWEAK Vector274 + PUBWEAK Vector278 + PUBWEAK Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 + PUBWEAK Vector280 + PUBWEAK Vector284 + PUBWEAK Vector288 + PUBWEAK Vector28C + PUBWEAK Vector290 + PUBWEAK Vector294 + PUBWEAK Vector298 + PUBWEAK Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 + PUBWEAK Vector2A0 + PUBWEAK Vector2A4 + PUBWEAK Vector2A8 + PUBWEAK Vector2AC + PUBWEAK Vector2B0 + PUBWEAK Vector2B4 + PUBWEAK Vector2B8 + PUBWEAK Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 + PUBWEAK Vector2C0 + PUBWEAK Vector2C4 + PUBWEAK Vector2C8 + PUBWEAK Vector2CC + PUBWEAK Vector2D0 + PUBWEAK Vector2D4 + PUBWEAK Vector2D8 + PUBWEAK Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 + PUBWEAK Vector2E0 + PUBWEAK Vector2E4 + PUBWEAK Vector2E8 + PUBWEAK Vector2EC + PUBWEAK Vector2F0 + PUBWEAK Vector2F4 + PUBWEAK Vector2F8 + PUBWEAK Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 + PUBWEAK Vector300 + PUBWEAK Vector304 + PUBWEAK Vector308 + PUBWEAK Vector30C + PUBWEAK Vector310 + PUBWEAK Vector314 + PUBWEAK Vector318 + PUBWEAK Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 + PUBWEAK Vector320 + PUBWEAK Vector324 + PUBWEAK Vector328 + PUBWEAK Vector32C + PUBWEAK Vector330 + PUBWEAK Vector334 + PUBWEAK Vector338 + PUBWEAK Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 + PUBWEAK Vector340 + PUBWEAK Vector344 + PUBWEAK Vector348 + PUBWEAK Vector34C + PUBWEAK Vector350 + PUBWEAK Vector354 + PUBWEAK Vector358 + PUBWEAK Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 + PUBWEAK Vector360 + PUBWEAK Vector364 + PUBWEAK Vector368 + PUBWEAK Vector36C + PUBWEAK Vector370 + PUBWEAK Vector374 + PUBWEAK Vector378 + PUBWEAK Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 + PUBWEAK Vector380 + PUBWEAK Vector384 + PUBWEAK Vector388 + PUBWEAK Vector38C + PUBWEAK Vector390 + PUBWEAK Vector394 + PUBWEAK Vector398 + PUBWEAK Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 + PUBWEAK Vector3A0 + PUBWEAK Vector3A4 + PUBWEAK Vector3A8 + PUBWEAK Vector3AC + PUBWEAK Vector3B0 + PUBWEAK Vector3B4 + PUBWEAK Vector3B8 + PUBWEAK Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 + PUBWEAK Vector3C0 + PUBWEAK Vector3C4 + PUBWEAK Vector3C8 + PUBWEAK Vector3CC + PUBWEAK Vector3D0 + PUBWEAK Vector3D4 + PUBWEAK Vector3D8 + PUBWEAK Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + PUBWEAK Vector3E0 + PUBWEAK Vector3E4 + PUBWEAK Vector3E8 + PUBWEAK Vector3EC + PUBWEAK Vector3F0 + PUBWEAK Vector3F4 + PUBWEAK Vector3F8 + PUBWEAK Vector3FC +#endif + PUBLIC _unhandled_exception + + SECTION .text:CODE:NOROOT:REORDER(1) + THUMB + +NMI_Handler +HardFault_Handler +MemManage_Handler +BusFault_Handler +UsageFault_Handler +Vector1C +Vector20 +Vector24 +Vector28 +SVC_Handler +DebugMon_Handler +Vector34 +PendSV_Handler +SysTick_Handler +Vector40 +Vector44 +Vector48 +Vector4C +Vector50 +Vector54 +Vector58 +Vector5C +#if CORTEX_NUM_VECTORS > 8 +Vector60 +Vector64 +Vector68 +Vector6C +Vector70 +Vector74 +Vector78 +Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 +Vector80 +Vector84 +Vector88 +Vector8C +Vector90 +Vector94 +Vector98 +Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 +VectorA0 +VectorA4 +VectorA8 +VectorAC +VectorB0 +VectorB4 +VectorB8 +VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 +VectorC0 +VectorC4 +VectorC8 +VectorCC +VectorD0 +VectorD4 +VectorD8 +VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 +VectorE0 +VectorE4 +VectorE8 +VectorEC +VectorF0 +VectorF4 +VectorF8 +VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 +Vector100 +Vector104 +Vector108 +Vector10C +Vector110 +Vector114 +Vector118 +Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 +Vector120 +Vector124 +Vector128 +Vector12C +Vector130 +Vector134 +Vector138 +Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 +Vector140 +Vector144 +Vector148 +Vector14C +Vector150 +Vector154 +Vector158 +Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 +Vector160 +Vector164 +Vector168 +Vector16C +Vector170 +Vector174 +Vector178 +Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 +Vector180 +Vector184 +Vector188 +Vector18C +Vector190 +Vector194 +Vector198 +Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 +Vector1A0 +Vector1A4 +Vector1A8 +Vector1AC +Vector1B0 +Vector1B4 +Vector1B8 +Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 +Vector1C0 +Vector1C4 +Vector1C8 +Vector1CC +Vector1D0 +Vector1D4 +Vector1D8 +Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 +Vector1E0 +Vector1E4 +Vector1E8 +Vector1EC +Vector1F0 +Vector1F4 +Vector1F8 +Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 +Vector200 +Vector204 +Vector208 +Vector20C +Vector210 +Vector214 +Vector218 +Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 +Vector220 +Vector224 +Vector228 +Vector22C +Vector230 +Vector234 +Vector238 +Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 +Vector240 +Vector244 +Vector248 +Vector24C +Vector250 +Vector254 +Vector258 +Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 +Vector260 +Vector264 +Vector268 +Vector26C +Vector270 +Vector274 +Vector278 +Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 +Vector280 +Vector284 +Vector288 +Vector28C +Vector290 +Vector294 +Vector298 +Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 +Vector2A0 +Vector2A4 +Vector2A8 +Vector2AC +Vector2B0 +Vector2B4 +Vector2B8 +Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 +Vector2C0 +Vector2C4 +Vector2C8 +Vector2CC +Vector2D0 +Vector2D4 +Vector2D8 +Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 +Vector2E0 +Vector2E4 +Vector2E8 +Vector2EC +Vector2F0 +Vector2F4 +Vector2F8 +Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 +Vector300 +Vector304 +Vector308 +Vector30C +Vector310 +Vector314 +Vector318 +Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 +Vector320 +Vector324 +Vector328 +Vector32C +Vector330 +Vector334 +Vector338 +Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 +Vector340 +Vector344 +Vector348 +Vector34C +Vector350 +Vector354 +Vector358 +Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 +Vector360 +Vector364 +Vector368 +Vector36C +Vector370 +Vector374 +Vector378 +Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 +Vector380 +Vector384 +Vector388 +Vector38C +Vector390 +Vector394 +Vector398 +Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 +Vector3A0 +Vector3A4 +Vector3A8 +Vector3AC +Vector3B0 +Vector3B4 +Vector3B8 +Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 +Vector3C0 +Vector3C4 +Vector3C8 +Vector3CC +Vector3D0 +Vector3D4 +Vector3D8 +Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 +Vector3E0 +Vector3E4 +Vector3E8 +Vector3EC +Vector3F0 +Vector3F4 +Vector3F8 +Vector3FC +#endif +_unhandled_exception + b _unhandled_exception + + END + +#endif /* !defined(__DOXYGEN__) */ + +/**< @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/clang.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/clang.mk new file mode 100644 index 0000000..db0f1e4 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/clang.mk @@ -0,0 +1,19 @@ +############################################################################## +# Compiler settings +# + +TRGT = aarch32- +CC = clang +CPPC = clang++ +LD = clang +CP = $(TRGT)objcopy +AS = $(TRGT)as -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# +# Compiler settings +############################################################################## diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/rules.mk b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/rules.mk new file mode 100644 index 0000000..0d6af76 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/LLVM/mk/rules.mk @@ -0,0 +1,284 @@ +# ARM Cortex-Mx common makefile scripts and rules. + +############################################################################## +# Processing options coming from the upper Makefile. +# + +# Compiler options +OPT := $(USE_OPT) +COPT := $(USE_COPT) +CPPOPT := $(USE_CPPOPT) + +# Garbage collection +ifeq ($(USE_LINK_GC),yes) + OPT += -ffunction-sections -fdata-sections -fno-common + LDOPT := ,--gc-sections +else + LDOPT := +endif + +# Linker extra options +ifneq ($(USE_LDOPT),) + LDOPT := $(LDOPT),$(USE_LDOPT) +endif + +# Link time optimizations +ifeq ($(USE_LTO),yes) + OPT += -flto +endif + +# FPU options default (Cortex-M4 and Cortex-M7 single precision). +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16 +endif + +# FPU-related options +ifeq ($(USE_FPU),) + USE_FPU = no +endif +ifneq ($(USE_FPU),no) + OPT += $(USE_FPU_OPT) + DDEFS += -DCORTEX_USE_FPU=TRUE + DADEFS += -DCORTEX_USE_FPU=TRUE +else + OPT += -mfloat-abi=soft + DDEFS += -DCORTEX_USE_FPU=FALSE + DADEFS += -DCORTEX_USE_FPU=FALSE +endif + +# Process stack size +ifeq ($(USE_PROCESS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE) +endif + +# Exceptions stack size +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE) +endif + +# Output directory and files +ifeq ($(BUILDDIR),) + BUILDDIR = build +endif +ifeq ($(BUILDDIR),.) + BUILDDIR = build +endif + +# Dependencies directory +ifeq ($(DEPDIR),) + DEPDIR = .dep +endif +ifeq ($(DEPDIR),.) + DEPDIR = .dep +endif + +OUTFILES := $(BUILDDIR)/$(PROJECT).elf \ + $(BUILDDIR)/$(PROJECT).hex \ + $(BUILDDIR)/$(PROJECT).bin \ + $(BUILDDIR)/$(PROJECT).dmp \ + $(BUILDDIR)/$(PROJECT).list + +ifdef SREC + OUTFILES += $(BUILDDIR)/$(PROJECT).srec +endif + +# Source files groups and paths +TCSRC += $(CSRC) +TCPPSRC += $(CPPSRC) +TSRC := $(TCSRC) $(TCPPSRC) +SRCPATHS := $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(TSRC))) + +# Various directories +OBJDIR := $(BUILDDIR)/obj +LSTDIR := $(BUILDDIR)/lst + +# Object files groups +TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o))) +TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o))) +ASMOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) +ASMXOBJS := $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o))) +OBJS := $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) + +# Paths +IINCDIR := $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR)) +LLIBDIR := $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) + +# Macros +DEFS := $(DDEFS) $(UDEFS) +ADEFS := $(DADEFS) $(UADEFS) + +# Libs +LIBS := $(DLIBS) $(ULIBS) + +# Various settings +MCFLAGS := -mcpu=$(MCU) -mthumb +ODFLAGS = -x --syms +ASFLAGS = $(MCFLAGS) $(OPT) $(ADEFS) +ASXFLAGS = $(MCFLAGS) $(OPT) $(ADEFS) +CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) $(DEFS) +CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) $(DEFS) +#ASFLAGS = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS) +#ASXFLAGS = $(MCFLAGS) $(OPT) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS) +#CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS) +#CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) +LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(STARTUPLD),--script=$(LDSCRIPT)$(LDOPT) + +# Generate dependency information +ASFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +ASXFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +CFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d +CPPFLAGS += -MD -MP -MF $(DEPDIR)/$(@F).d + +# Paths where to search for sources +VPATH = $(SRCPATHS) + +# +# Makefile rules +# + +all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK + +PRE_MAKE_ALL_RULE_HOOK: + +POST_MAKE_ALL_RULE_HOOK: + +$(OBJS): | PRE_MAKE_ALL_RULE_HOOK $(BUILDDIR) $(OBJDIR) $(LSTDIR) $(DEPDIR) + +$(BUILDDIR): +ifneq ($(USE_VERBOSE_COMPILE),yes) + @echo Compiler Options + @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o + @echo +endif + @mkdir -p $(BUILDDIR) + +$(OBJDIR): + @mkdir -p $(OBJDIR) + +$(LSTDIR): + @mkdir -p $(LSTDIR) + +$(DEPDIR): + @mkdir -p $(DEPDIR) + +$(TCPPOBJS) : $(OBJDIR)/%.o : %.cpp $(MAKEFILE_LIST) +ifeq ($(USE_VERBOSE_COMPILE),yes) + @echo + $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@ +else + @echo Compiling $( $@ + $(SZ) $< +else + @echo Creating $@ + @$(OD) $(ODFLAGS) $< > $@ + @echo + @$(SZ) $< +endif + +%.list: %.elf +ifeq ($(USE_VERBOSE_COMPILE),yes) + $(OD) -S $< > $@ +else + @echo Creating $@ + @$(OD) -S $< > $@ + @echo + @echo Done +endif + +lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a + +$(BUILDDIR)/lib$(PROJECT).a: $(OBJS) + @$(AR) -r $@ $^ + @echo + @echo Done + +clean: CLEAN_RULE_HOOK + @echo Cleaning + @echo - $(DEPDIR) + @-rm -fR $(DEPDIR)/* $(BUILDDIR)/* 2>/dev/null + @-if [ -d "$(DEPDIR)" ]; then rmdir -p --ignore-fail-on-non-empty $(subst ./,,$(DEPDIR)) 2>/dev/null; fi + @echo - $(BUILDDIR) + @-if [ -d "$(BUILDDIR)" ]; then rmdir -p --ignore-fail-on-non-empty $(subst ./,,$(BUILDDIR)) 2>/dev/null; fi + @echo + @echo Done + +CLEAN_RULE_HOOK: + +# +# Include the dependency files, should be the last of the makefile +# +-include $(wildcard $(DEPDIR)/*) + +# *** EOF *** diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/cstartup.s b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/cstartup.s new file mode 100644 index 0000000..6a94d13 --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/cstartup.s @@ -0,0 +1,131 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/RVCT/cstartup.s + * @brief Generic RVCT Cortex-Mx startup file. + * + * @addtogroup ARMCMx_RVCT_STARTUP + * @{ + */ + +#if !defined(__DOXYGEN__) + +;/* <<< Use Configuration Wizard in Context Menu >>> */ + +;// Main Stack Configuration (IRQ Stack) +;// Main Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +;// +main_stack_size EQU 0x00000400 + +;// Process Stack Configuration +;// Process Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +;// +proc_stack_size EQU 0x00000400 + +;// C-runtime heap size +;// C-runtime heap size (in Bytes) <0x0-0xFFFFFFFF:8> +;// +heap_size EQU 0x00000400 + + AREA MSTACK, NOINIT, READWRITE, ALIGN=3 +main_stack_mem SPACE main_stack_size + EXPORT __initial_msp +__initial_msp + + AREA CSTACK, NOINIT, READWRITE, ALIGN=3 +__main_thread_stack_base__ + EXPORT __main_thread_stack_base__ +proc_stack_mem SPACE proc_stack_size + EXPORT __initial_sp +__initial_sp + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE heap_size +__heap_limit + +CONTROL_MODE_PRIVILEGED EQU 0 +CONTROL_MODE_UNPRIVILEGED EQU 1 +CONTROL_USE_MSP EQU 0 +CONTROL_USE_PSP EQU 2 + + PRESERVE8 + THUMB + + AREA |.text|, CODE, READONLY + +/* + * Reset handler. + */ + IMPORT __main + EXPORT Reset_Handler +Reset_Handler PROC + cpsid i + ldr r0, =__initial_sp + msr PSP, r0 + movs r0, #CONTROL_MODE_PRIVILEGED :OR: CONTROL_USE_PSP + msr CONTROL, r0 + isb + bl __early_init + + IF {CPU} = "Cortex-M4.fp.sp" + LDR R0, =0xE000ED88 ; Enable CP10,CP11 + LDR R1, [R0] + ORR R1, R1, #(0xF << 20) + STR R1, [R0] + ENDIF + + ldr r0, =__main + bx r0 + ENDP + +__early_init PROC + EXPORT __early_init [WEAK] + bx lr + ENDP + + ALIGN + +/* + * User Initial Stack & Heap. + */ + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap +__user_initial_stackheap + ldr r0, =Heap_Mem + ldr r1, =(proc_stack_mem + proc_stack_size) + ldr r2, =(Heap_Mem + heap_size) + ldr r3, =proc_stack_mem + bx lr + + ALIGN + + ENDIF + + END + +#endif /* !defined(__DOXYGEN__) */ + +/**< @} */ diff --git a/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/vectors.s b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/vectors.s new file mode 100644 index 0000000..13329ba --- /dev/null +++ b/ChibiOS_20.3.2/os/common/startup/ARMCMx/compilers/RVCT/vectors.s @@ -0,0 +1,1002 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file ARMCMx/RVCT/vectors.c + * @brief Interrupt vectors for Cortex-Mx devices. + * + * @defgroup ARMCMx_RVCT_VECTORS Cortex-Mx Interrupt Vectors + * @{ + */ + +#define _FROM_ASM_ +#include "cmparams.h" + +#if !defined(__DOXYGEN__) + +#if (CORTEX_NUM_VECTORS & 7) != 0 +#error "the constant CORTEX_NUM_VECTORS must be a multiple of 8" +#endif + +#if (CORTEX_NUM_VECTORS < 8) || (CORTEX_NUM_VECTORS > 240) +#error "the constant CORTEX_NUM_VECTORS must be between 8 and 240 inclusive" +#endif + + PRESERVE8 + + AREA RESET, DATA, READONLY + + IMPORT __initial_msp + IMPORT Reset_Handler + EXPORT __Vectors + +__Vectors + DCD __initial_msp + DCD Reset_Handler + DCD NMI_Handler + DCD HardFault_Handler + DCD MemManage_Handler + DCD BusFault_Handler + DCD UsageFault_Handler + DCD Vector1C + DCD Vector20 + DCD Vector24 + DCD Vector28 + DCD SVC_Handler + DCD DebugMon_Handler + DCD Vector34 + DCD PendSV_Handler + DCD SysTick_Handler + DCD Vector40 + DCD Vector44 + DCD Vector48 + DCD Vector4C + DCD Vector50 + DCD Vector54 + DCD Vector58 + DCD Vector5C +#if CORTEX_NUM_VECTORS > 8 + DCD Vector60 + DCD Vector64 + DCD Vector68 + DCD Vector6C + DCD Vector70 + DCD Vector74 + DCD Vector78 + DCD Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 + DCD Vector80 + DCD Vector84 + DCD Vector88 + DCD Vector8C + DCD Vector90 + DCD Vector94 + DCD Vector98 + DCD Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 + DCD VectorA0 + DCD VectorA4 + DCD VectorA8 + DCD VectorAC + DCD VectorB0 + DCD VectorB4 + DCD VectorB8 + DCD VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 + DCD VectorC0 + DCD VectorC4 + DCD VectorC8 + DCD VectorCC + DCD VectorD0 + DCD VectorD4 + DCD VectorD8 + DCD VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 + DCD VectorE0 + DCD VectorE4 + DCD VectorE8 + DCD VectorEC + DCD VectorF0 + DCD VectorF4 + DCD VectorF8 + DCD VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 + DCD Vector100 + DCD Vector104 + DCD Vector108 + DCD Vector10C + DCD Vector110 + DCD Vector114 + DCD Vector118 + DCD Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 + DCD Vector120 + DCD Vector124 + DCD Vector128 + DCD Vector12C + DCD Vector130 + DCD Vector134 + DCD Vector138 + DCD Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 + DCD Vector140 + DCD Vector144 + DCD Vector148 + DCD Vector14C + DCD Vector150 + DCD Vector154 + DCD Vector158 + DCD Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 + DCD Vector160 + DCD Vector164 + DCD Vector168 + DCD Vector16C + DCD Vector170 + DCD Vector174 + DCD Vector178 + DCD Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 + DCD Vector180 + DCD Vector184 + DCD Vector188 + DCD Vector18C + DCD Vector190 + DCD Vector194 + DCD Vector198 + DCD Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 + DCD Vector1A0 + DCD Vector1A4 + DCD Vector1A8 + DCD Vector1AC + DCD Vector1B0 + DCD Vector1B4 + DCD Vector1B8 + DCD Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 + DCD Vector1C0 + DCD Vector1C4 + DCD Vector1C8 + DCD Vector1CC + DCD Vector1D0 + DCD Vector1D4 + DCD Vector1D8 + DCD Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 + DCD Vector1E0 + DCD Vector1E4 + DCD Vector1E8 + DCD Vector1EC + DCD Vector1F0 + DCD Vector1F4 + DCD Vector1F8 + DCD Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 + DCD Vector200 + DCD Vector204 + DCD Vector208 + DCD Vector20C + DCD Vector210 + DCD Vector214 + DCD Vector218 + DCD Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 + DCD Vector220 + DCD Vector224 + DCD Vector228 + DCD Vector22C + DCD Vector230 + DCD Vector234 + DCD Vector238 + DCD Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 + DCD Vector240 + DCD Vector244 + DCD Vector248 + DCD Vector24C + DCD Vector250 + DCD Vector254 + DCD Vector258 + DCD Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 + DCD Vector260 + DCD Vector264 + DCD Vector268 + DCD Vector26C + DCD Vector270 + DCD Vector274 + DCD Vector278 + DCD Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 + DCD Vector280 + DCD Vector284 + DCD Vector288 + DCD Vector28C + DCD Vector290 + DCD Vector294 + DCD Vector298 + DCD Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 + DCD Vector2A0 + DCD Vector2A4 + DCD Vector2A8 + DCD Vector2AC + DCD Vector2B0 + DCD Vector2B4 + DCD Vector2B8 + DCD Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 + DCD Vector2C0 + DCD Vector2C4 + DCD Vector2C8 + DCD Vector2CC + DCD Vector2D0 + DCD Vector2D4 + DCD Vector2D8 + DCD Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 + DCD Vector2E0 + DCD Vector2E4 + DCD Vector2E8 + DCD Vector2EC + DCD Vector2F0 + DCD Vector2F4 + DCD Vector2F8 + DCD Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 + DCD Vector300 + DCD Vector304 + DCD Vector308 + DCD Vector30C + DCD Vector310 + DCD Vector314 + DCD Vector318 + DCD Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 + DCD Vector320 + DCD Vector324 + DCD Vector328 + DCD Vector32C + DCD Vector330 + DCD Vector334 + DCD Vector338 + DCD Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 + DCD Vector340 + DCD Vector344 + DCD Vector348 + DCD Vector34C + DCD Vector350 + DCD Vector354 + DCD Vector358 + DCD Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 + DCD Vector360 + DCD Vector364 + DCD Vector368 + DCD Vector36C + DCD Vector370 + DCD Vector374 + DCD Vector378 + DCD Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 + DCD Vector380 + DCD Vector384 + DCD Vector388 + DCD Vector38C + DCD Vector390 + DCD Vector394 + DCD Vector398 + DCD Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 + DCD Vector3A0 + DCD Vector3A4 + DCD Vector3A8 + DCD Vector3AC + DCD Vector3B0 + DCD Vector3B4 + DCD Vector3B8 + DCD Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 + DCD Vector3C0 + DCD Vector3C4 + DCD Vector3C8 + DCD Vector3CC + DCD Vector3D0 + DCD Vector3D4 + DCD Vector3D8 + DCD Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 + DCD Vector3E0 + DCD Vector3E4 + DCD Vector3E8 + DCD Vector3EC + DCD Vector3F0 + DCD Vector3F4 + DCD Vector3F8 + DCD Vector3FC +#endif + + AREA |.text|, CODE, READONLY + THUMB + +/* + * Default interrupt handlers. + */ + EXPORT _unhandled_exception +_unhandled_exception PROC + EXPORT NMI_Handler [WEAK] + EXPORT HardFault_Handler [WEAK] + EXPORT MemManage_Handler [WEAK] + EXPORT BusFault_Handler [WEAK] + EXPORT UsageFault_Handler [WEAK] + EXPORT Vector1C [WEAK] + EXPORT Vector20 [WEAK] + EXPORT Vector24 [WEAK] + EXPORT Vector28 [WEAK] + EXPORT SVC_Handler [WEAK] + EXPORT DebugMon_Handler [WEAK] + EXPORT Vector34 [WEAK] + EXPORT PendSV_Handler [WEAK] + EXPORT SysTick_Handler [WEAK] + EXPORT Vector40 [WEAK] + EXPORT Vector44 [WEAK] + EXPORT Vector48 [WEAK] + EXPORT Vector4C [WEAK] + EXPORT Vector50 [WEAK] + EXPORT Vector54 [WEAK] + EXPORT Vector58 [WEAK] + EXPORT Vector5C [WEAK] +#if CORTEX_NUM_VECTORS > 8 + EXPORT Vector60 [WEAK] + EXPORT Vector64 [WEAK] + EXPORT Vector68 [WEAK] + EXPORT Vector6C [WEAK] + EXPORT Vector70 [WEAK] + EXPORT Vector74 [WEAK] + EXPORT Vector78 [WEAK] + EXPORT Vector7C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 16 + EXPORT Vector80 [WEAK] + EXPORT Vector84 [WEAK] + EXPORT Vector88 [WEAK] + EXPORT Vector8C [WEAK] + EXPORT Vector90 [WEAK] + EXPORT Vector94 [WEAK] + EXPORT Vector98 [WEAK] + EXPORT Vector9C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 24 + EXPORT VectorA0 [WEAK] + EXPORT VectorA4 [WEAK] + EXPORT VectorA8 [WEAK] + EXPORT VectorAC [WEAK] + EXPORT VectorB0 [WEAK] + EXPORT VectorB4 [WEAK] + EXPORT VectorB8 [WEAK] + EXPORT VectorBC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 32 + EXPORT VectorC0 [WEAK] + EXPORT VectorC4 [WEAK] + EXPORT VectorC8 [WEAK] + EXPORT VectorCC [WEAK] + EXPORT VectorD0 [WEAK] + EXPORT VectorD4 [WEAK] + EXPORT VectorD8 [WEAK] + EXPORT VectorDC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 40 + EXPORT VectorE0 [WEAK] + EXPORT VectorE4 [WEAK] + EXPORT VectorE8 [WEAK] + EXPORT VectorEC [WEAK] + EXPORT VectorF0 [WEAK] + EXPORT VectorF4 [WEAK] + EXPORT VectorF8 [WEAK] + EXPORT VectorFC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 48 + EXPORT Vector100 [WEAK] + EXPORT Vector104 [WEAK] + EXPORT Vector108 [WEAK] + EXPORT Vector10C [WEAK] + EXPORT Vector110 [WEAK] + EXPORT Vector114 [WEAK] + EXPORT Vector118 [WEAK] + EXPORT Vector11C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 56 + EXPORT Vector120 [WEAK] + EXPORT Vector124 [WEAK] + EXPORT Vector128 [WEAK] + EXPORT Vector12C [WEAK] + EXPORT Vector130 [WEAK] + EXPORT Vector134 [WEAK] + EXPORT Vector138 [WEAK] + EXPORT Vector13C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 64 + EXPORT Vector140 [WEAK] + EXPORT Vector144 [WEAK] + EXPORT Vector148 [WEAK] + EXPORT Vector14C [WEAK] + EXPORT Vector150 [WEAK] + EXPORT Vector154 [WEAK] + EXPORT Vector158 [WEAK] + EXPORT Vector15C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 72 + EXPORT Vector160 [WEAK] + EXPORT Vector164 [WEAK] + EXPORT Vector168 [WEAK] + EXPORT Vector16C [WEAK] + EXPORT Vector170 [WEAK] + EXPORT Vector174 [WEAK] + EXPORT Vector178 [WEAK] + EXPORT Vector17C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 80 + EXPORT Vector180 [WEAK] + EXPORT Vector184 [WEAK] + EXPORT Vector188 [WEAK] + EXPORT Vector18C [WEAK] + EXPORT Vector190 [WEAK] + EXPORT Vector194 [WEAK] + EXPORT Vector198 [WEAK] + EXPORT Vector19C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 88 + EXPORT Vector1A0 [WEAK] + EXPORT Vector1A4 [WEAK] + EXPORT Vector1A8 [WEAK] + EXPORT Vector1AC [WEAK] + EXPORT Vector1B0 [WEAK] + EXPORT Vector1B4 [WEAK] + EXPORT Vector1B8 [WEAK] + EXPORT Vector1BC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 96 + EXPORT Vector1C0 [WEAK] + EXPORT Vector1C4 [WEAK] + EXPORT Vector1C8 [WEAK] + EXPORT Vector1CC [WEAK] + EXPORT Vector1D0 [WEAK] + EXPORT Vector1D4 [WEAK] + EXPORT Vector1D8 [WEAK] + EXPORT Vector1DC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 104 + EXPORT Vector1E0 [WEAK] + EXPORT Vector1E4 [WEAK] + EXPORT Vector1E8 [WEAK] + EXPORT Vector1EC [WEAK] + EXPORT Vector1F0 [WEAK] + EXPORT Vector1F4 [WEAK] + EXPORT Vector1F8 [WEAK] + EXPORT Vector1FC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 112 + EXPORT Vector200 [WEAK] + EXPORT Vector204 [WEAK] + EXPORT Vector208 [WEAK] + EXPORT Vector20C [WEAK] + EXPORT Vector210 [WEAK] + EXPORT Vector214 [WEAK] + EXPORT Vector218 [WEAK] + EXPORT Vector21C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 120 + EXPORT Vector220 [WEAK] + EXPORT Vector224 [WEAK] + EXPORT Vector228 [WEAK] + EXPORT Vector22C [WEAK] + EXPORT Vector230 [WEAK] + EXPORT Vector234 [WEAK] + EXPORT Vector238 [WEAK] + EXPORT Vector23C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 128 + EXPORT Vector240 [WEAK] + EXPORT Vector244 [WEAK] + EXPORT Vector248 [WEAK] + EXPORT Vector24C [WEAK] + EXPORT Vector250 [WEAK] + EXPORT Vector254 [WEAK] + EXPORT Vector258 [WEAK] + EXPORT Vector25C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 136 + EXPORT Vector260 [WEAK] + EXPORT Vector264 [WEAK] + EXPORT Vector268 [WEAK] + EXPORT Vector26C [WEAK] + EXPORT Vector270 [WEAK] + EXPORT Vector274 [WEAK] + EXPORT Vector278 [WEAK] + EXPORT Vector27C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 144 + EXPORT Vector280 [WEAK] + EXPORT Vector284 [WEAK] + EXPORT Vector288 [WEAK] + EXPORT Vector28C [WEAK] + EXPORT Vector290 [WEAK] + EXPORT Vector294 [WEAK] + EXPORT Vector298 [WEAK] + EXPORT Vector29C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 152 + EXPORT Vector2A0 [WEAK] + EXPORT Vector2A4 [WEAK] + EXPORT Vector2A8 [WEAK] + EXPORT Vector2AC [WEAK] + EXPORT Vector2B0 [WEAK] + EXPORT Vector2B4 [WEAK] + EXPORT Vector2B8 [WEAK] + EXPORT Vector2BC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 160 + EXPORT Vector2C0 [WEAK] + EXPORT Vector2C4 [WEAK] + EXPORT Vector2C8 [WEAK] + EXPORT Vector2CC [WEAK] + EXPORT Vector2D0 [WEAK] + EXPORT Vector2D4 [WEAK] + EXPORT Vector2D8 [WEAK] + EXPORT Vector2DC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 168 + EXPORT Vector2E0 [WEAK] + EXPORT Vector2E4 [WEAK] + EXPORT Vector2E8 [WEAK] + EXPORT Vector2EC [WEAK] + EXPORT Vector2F0 [WEAK] + EXPORT Vector2F4 [WEAK] + EXPORT Vector2F8 [WEAK] + EXPORT Vector2FC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 176 + EXPORT Vector300 [WEAK] + EXPORT Vector304 [WEAK] + EXPORT Vector308 [WEAK] + EXPORT Vector30C [WEAK] + EXPORT Vector310 [WEAK] + EXPORT Vector314 [WEAK] + EXPORT Vector318 [WEAK] + EXPORT Vector31C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 184 + EXPORT Vector320 [WEAK] + EXPORT Vector324 [WEAK] + EXPORT Vector328 [WEAK] + EXPORT Vector32C [WEAK] + EXPORT Vector330 [WEAK] + EXPORT Vector334 [WEAK] + EXPORT Vector338 [WEAK] + EXPORT Vector33C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 192 + EXPORT Vector340 [WEAK] + EXPORT Vector344 [WEAK] + EXPORT Vector348 [WEAK] + EXPORT Vector34C [WEAK] + EXPORT Vector350 [WEAK] + EXPORT Vector354 [WEAK] + EXPORT Vector358 [WEAK] + EXPORT Vector35C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 200 + EXPORT Vector360 [WEAK] + EXPORT Vector364 [WEAK] + EXPORT Vector368 [WEAK] + EXPORT Vector36C [WEAK] + EXPORT Vector370 [WEAK] + EXPORT Vector374 [WEAK] + EXPORT Vector378 [WEAK] + EXPORT Vector37C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 208 + EXPORT Vector380 [WEAK] + EXPORT Vector384 [WEAK] + EXPORT Vector388 [WEAK] + EXPORT Vector38C [WEAK] + EXPORT Vector390 [WEAK] + EXPORT Vector394 [WEAK] + EXPORT Vector398 [WEAK] + EXPORT Vector39C [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 216 + EXPORT Vector3A0 [WEAK] + EXPORT Vector3A4 [WEAK] + EXPORT Vector3A8 [WEAK] + EXPORT Vector3AC [WEAK] + EXPORT Vector3B0 [WEAK] + EXPORT Vector3B4 [WEAK] + EXPORT Vector3B8 [WEAK] + EXPORT Vector3BC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 224 + EXPORT Vector3C0 [WEAK] + EXPORT Vector3C4 [WEAK] + EXPORT Vector3C8 [WEAK] + EXPORT Vector3CC [WEAK] + EXPORT Vector3D0 [WEAK] + EXPORT Vector3D4 [WEAK] + EXPORT Vector3D8 [WEAK] + EXPORT Vector3DC [WEAK] +#endif +#if CORTEX_NUM_VECTORS > 232 + EXPORT Vector3E0 [WEAK] + EXPORT Vector3E4 [WEAK] + EXPORT Vector3E8 [WEAK] + EXPORT Vector3EC [WEAK] + EXPORT Vector3F0 [WEAK] + EXPORT Vector3F4 [WEAK] + EXPORT Vector3F8 [WEAK] + EXPORT Vector3FC [WEAK] +#endif + +NMI_Handler +HardFault_Handler +MemManage_Handler +BusFault_Handler +UsageFault_Handler +Vector1C +Vector20 +Vector24 +Vector28 +SVC_Handler +DebugMon_Handler +Vector34 +PendSV_Handler +SysTick_Handler +Vector40 +Vector44 +Vector48 +Vector4C +Vector50 +Vector54 +Vector58 +Vector5C +#if CORTEX_NUM_VECTORS > 8 +Vector60 +Vector64 +Vector68 +Vector6C +Vector70 +Vector74 +Vector78 +Vector7C +#endif +#if CORTEX_NUM_VECTORS > 16 +Vector80 +Vector84 +Vector88 +Vector8C +Vector90 +Vector94 +Vector98 +Vector9C +#endif +#if CORTEX_NUM_VECTORS > 24 +VectorA0 +VectorA4 +VectorA8 +VectorAC +VectorB0 +VectorB4 +VectorB8 +VectorBC +#endif +#if CORTEX_NUM_VECTORS > 32 +VectorC0 +VectorC4 +VectorC8 +VectorCC +VectorD0 +VectorD4 +VectorD8 +VectorDC +#endif +#if CORTEX_NUM_VECTORS > 40 +VectorE0 +VectorE4 +VectorE8 +VectorEC +VectorF0 +VectorF4 +VectorF8 +VectorFC +#endif +#if CORTEX_NUM_VECTORS > 48 +Vector100 +Vector104 +Vector108 +Vector10C +Vector110 +Vector114 +Vector118 +Vector11C +#endif +#if CORTEX_NUM_VECTORS > 56 +Vector120 +Vector124 +Vector128 +Vector12C +Vector130 +Vector134 +Vector138 +Vector13C +#endif +#if CORTEX_NUM_VECTORS > 64 +Vector140 +Vector144 +Vector148 +Vector14C +Vector150 +Vector154 +Vector158 +Vector15C +#endif +#if CORTEX_NUM_VECTORS > 72 +Vector160 +Vector164 +Vector168 +Vector16C +Vector170 +Vector174 +Vector178 +Vector17C +#endif +#if CORTEX_NUM_VECTORS > 80 +Vector180 +Vector184 +Vector188 +Vector18C +Vector190 +Vector194 +Vector198 +Vector19C +#endif +#if CORTEX_NUM_VECTORS > 88 +Vector1A0 +Vector1A4 +Vector1A8 +Vector1AC +Vector1B0 +Vector1B4 +Vector1B8 +Vector1BC +#endif +#if CORTEX_NUM_VECTORS > 96 +Vector1C0 +Vector1C4 +Vector1C8 +Vector1CC +Vector1D0 +Vector1D4 +Vector1D8 +Vector1DC +#endif +#if CORTEX_NUM_VECTORS > 104 +Vector1E0 +Vector1E4 +Vector1E8 +Vector1EC +Vector1F0 +Vector1F4 +Vector1F8 +Vector1FC +#endif +#if CORTEX_NUM_VECTORS > 112 +Vector200 +Vector204 +Vector208 +Vector20C +Vector210 +Vector214 +Vector218 +Vector21C +#endif +#if CORTEX_NUM_VECTORS > 120 +Vector220 +Vector224 +Vector228 +Vector22C +Vector230 +Vector234 +Vector238 +Vector23C +#endif +#if CORTEX_NUM_VECTORS > 128 +Vector240 +Vector244 +Vector248 +Vector24C +Vector250 +Vector254 +Vector258 +Vector25C +#endif +#if CORTEX_NUM_VECTORS > 136 +Vector260 +Vector264 +Vector268 +Vector26C +Vector270 +Vector274 +Vector278 +Vector27C +#endif +#if CORTEX_NUM_VECTORS > 144 +Vector280 +Vector284 +Vector288 +Vector28C +Vector290 +Vector294 +Vector298 +Vector29C +#endif +#if CORTEX_NUM_VECTORS > 152 +Vector2A0 +Vector2A4 +Vector2A8 +Vector2AC +Vector2B0 +Vector2B4 +Vector2B8 +Vector2BC +#endif +#if CORTEX_NUM_VECTORS > 160 +Vector2C0 +Vector2C4 +Vector2C8 +Vector2CC +Vector2D0 +Vector2D4 +Vector2D8 +Vector2DC +#endif +#if CORTEX_NUM_VECTORS > 168 +Vector2E0 +Vector2E4 +Vector2E8 +Vector2EC +Vector2F0 +Vector2F4 +Vector2F8 +Vector2FC +#endif +#if CORTEX_NUM_VECTORS > 176 +Vector300 +Vector304 +Vector308 +Vector30C +Vector310 +Vector314 +Vector318 +Vector31C +#endif +#if CORTEX_NUM_VECTORS > 184 +Vector320 +Vector324 +Vector328 +Vector32C +Vector330 +Vector334 +Vector338 +Vector33C +#endif +#if CORTEX_NUM_VECTORS > 192 +Vector340 +Vector344 +Vector348 +Vector34C +Vector350 +Vector354 +Vector358 +Vector35C +#endif +#if CORTEX_NUM_VECTORS > 200 +Vector360 +Vector364 +Vector368 +Vector36C +Vector370 +Vector374 +Vector378 +Vector37C +#endif +#if CORTEX_NUM_VECTORS > 208 +Vector380 +Vector384 +Vector388 +Vector38C +Vector390 +Vector394 +Vector398 +Vector39C +#endif +#if CORTEX_NUM_VECTORS > 216 +Vector3A0 +Vector3A4 +Vector3A8 +Vector3AC +Vector3B0 +Vector3B4 +Vector3B8 +Vector3BC +#endif +#if CORTEX_NUM_VECTORS > 224 +Vector3C0 +Vector3C4 +Vector3C8 +Vector3CC +Vector3D0 +Vector3D4 +Vector3D8 +Vector3DC +#endif +#if CORTEX_NUM_VECTORS > 232 +Vector3E0 +Vector3E4 +Vector3E8 +Vector3EC +Vector3F0 +Vector3F4 +Vector3F8 +Vector3FC +#endif + b _unhandled_exception + ENDP + + END + +#endif /* !defined(__DOXYGEN__) */ + +/**< @} */ -- cgit v1.2.3