From 716be4fc87412541fb1305c8592245a36104b584 Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Sat, 23 Jan 2021 10:43:40 -0500 Subject: boot at 32Ksps; fix 96Ksps --- ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'ChibiOS_20.3.2') diff --git a/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.h b/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.h index af36372..517ff16 100644 --- a/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.h +++ b/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.h @@ -377,6 +377,7 @@ #define STM32_ODEN_DISABLED 0U #define STM32_ODEN_ENABLED (SYSCFG_PWRCR_ODEN) +#define STM32_VOS_SCALE0 0U #define STM32_VOS_SCALE3 (PWR_D3CR_VOS_0) #define STM32_VOS_SCALE2 (PWR_D3CR_VOS_1) #define STM32_VOS_SCALE1 (PWR_D3CR_VOS_1 | PWR_D3CR_VOS_0) @@ -1404,7 +1405,7 @@ * @name Constants depending on VOS and ODEN setting * @{ */ -#if STM32_VOS == STM32_VOS_SCALE1 +#if STM32_VOS == STM32_VOS_SCALE1 || STM32_VOS == STM32_VOS_SCALE0 #define STM32_0WS_THRESHOLD 70000000U #define STM32_1WS_THRESHOLD 140000000U #define STM32_2WS_THRESHOLD 210000000U -- cgit v1.2.3