From ec2e1fd5c6271bdf45ce22b3bb5cd3b690d92d5b Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Sat, 23 Jan 2021 14:25:04 -0500 Subject: increase signal buffers; fix oversample --- ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'ChibiOS_20.3.2') diff --git a/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c b/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c index e9ffb25..20992be 100644 --- a/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c +++ b/ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c @@ -168,11 +168,14 @@ void hal_lld_init(void) { /* MPU initialization.*/ #if (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) || (STM32_NOCACHE_SRAM3 == TRUE) || \ - (STM32_NOCACHE_SRAM4 == TRUE) + (STM32_NOCACHE_ALLSRAM == TRUE) { uint32_t base, size; -#if (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == TRUE) +#if (STM32_NOCACHE_ALLSRAM == TRUE) + base = 0x30000000U; + size = MPU_RASR_SIZE_256M; +#elif (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == TRUE) base = 0x30000000U; size = MPU_RASR_SIZE_512K; #elif (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == FALSE) @@ -181,9 +184,6 @@ void hal_lld_init(void) { #elif (STM32_NOCACHE_SRAM1_SRAM2 == FALSE) && (STM32_NOCACHE_SRAM3 == TRUE) base = 0x30040000U; size = MPU_RASR_SIZE_16K; -#elif (STM32_NOCACHE_SRAM4 == TRUE) - base = 0x38000000U; - size = MPU_RASR_SIZE_16K; #else #error "invalid constants used in mcuconf.h" #endif -- cgit v1.2.3