From 123cc4c756cc8a22f66351ab65595c5a20e53e27 Mon Sep 17 00:00:00 2001
From: Clyne Sullivan <clyne@clyne-lp.lan>
Date: Sat, 31 Jul 2021 10:47:00 -0400
Subject: reorganized source, wip

---
 source/board/board_h7.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

(limited to 'source/board/board_h7.c')

diff --git a/source/board/board_h7.c b/source/board/board_h7.c
index 2868726..74285cf 100644
--- a/source/board/board_h7.c
+++ b/source/board/board_h7.c
@@ -262,5 +262,26 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
  * @note    You can add your board-specific code here.
  */
 void boardInit(void) {
+    // Enable the FPU (floating-point unit)
+    SCB->CPACR |= 0xF << 20;
 
+    // Setup the MPU (memory protection unit):
+    //     Region 2: Data for algorithm thread
+    //     Region 3: Code for algorithm thread
+    //     Region 4: User algorithm code
+    mpuConfigureRegion(MPU_REGION_2,
+                       0x20000000,
+                       MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+                       MPU_RASR_SIZE_64K |
+                       MPU_RASR_ENABLE);
+    mpuConfigureRegion(MPU_REGION_3,
+                       0x0807F800,
+                       MPU_RASR_ATTR_AP_RO_RO | MPU_RASR_ATTR_NON_CACHEABLE |
+                       MPU_RASR_SIZE_2K |
+                       MPU_RASR_ENABLE);
+    mpuConfigureRegion(MPU_REGION_4,
+                       0x00000000,
+                       MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+                       MPU_RASR_SIZE_64K |
+                       MPU_RASR_ENABLE);
 }
-- 
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