From 79da473bd0145afac4c2b395f39f1142444b7cdd Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Tue, 25 Sep 2018 16:22:47 -0400 Subject: initial commit --- src/main.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 src/main.c (limited to 'src/main.c') diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..8028f93 --- /dev/null +++ b/src/main.c @@ -0,0 +1,71 @@ +/** + * @file main.c + * Entry point for operating system + * + * Copyright (C) 2018 Clyne Sullivan + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include +#include +#include +#include +#include + +extern uint8_t __bss_end__; + +void kmain(void); + +int main(void) +{ + asm("cpsid i"); + // disable cached writes for precise debug info + //*((uint32_t *)0xE000E008) |= 2; + + // prepare flash latency for 80MHz operation + FLASH->ACR &= ~(FLASH_ACR_LATENCY); + FLASH->ACR |= FLASH_ACR_LATENCY_4WS; + + // init core components + clock_init(); + heap_init(&__bss_end__); + gpio_init(); + + // enable FPU + //SCB->CPACR |= (0xF << 20); + + task_init(kmain); + while (1); +} + +void task2(void); +void kmain(void) +{ + gpio_mode(GPIOA, 5, OUTPUT); + task_start(task2, 512); + + for (int i = 0; i < 8; i++) { + gpio_dout(GPIOA, 5, !(i & 1)); + delay(200); + } + + return; +} + +void task2(void) +{ + while (1) + delay(800); +} -- cgit v1.2.3