diff --git a/Core/Inc/stm32u0xx_it.h b/Core/Inc/stm32u0xx_it.h
index d134079..fe3b5f7 100644
--- a/Core/Inc/stm32u0xx_it.h
+++ b/Core/Inc/stm32u0xx_it.h
@@ -53,6 +53,7 @@ void PendSV_Handler(void);
 void SysTick_Handler(void);
 void DMA1_Channel1_IRQHandler(void);
 void DMA1_Channel2_3_IRQHandler(void);
+void DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */
diff --git a/Core/Src/main.c b/Core/Src/main.c
index 18c53ca..aa520a3 100644
--- a/Core/Src/main.c
+++ b/Core/Src/main.c
@@ -26,7 +26,9 @@
 
 /* Private typedef -----------------------------------------------------------*/
 /* USER CODE BEGIN PTD */
-
+typedef struct {
+    int32_t value : 18;
+} sample_t;
 /* USER CODE END PTD */
 
 /* Private define ------------------------------------------------------------*/
@@ -51,7 +53,7 @@ UART_HandleTypeDef huart2;
 static /*const*/ uint8_t I2S_Frame_Buffer[8] = {
   0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF
 };
-static uint8_t I2S_Receive_Buffer[2048];
+static uint8_t I2S_Receive_Buffer[4096];
 /* USER CODE END PV */
 
 /* Private function prototypes -----------------------------------------------*/
@@ -114,8 +116,6 @@ int main(void)
   MX_SPI1_Init();
   MX_USART2_UART_Init();
   /* USER CODE BEGIN 2 */
-  puts("Hello, world!");
-  
   __enable_irq();
   HAL_SPI_TransmitReceive_DMA_Mixed(&hspi1,
       I2S_Frame_Buffer,
@@ -129,7 +129,7 @@ int main(void)
   while (1)
   {
     /* USER CODE END WHILE */
-    //__WFI();
+    __WFI();
     /* USER CODE BEGIN 3 */
   }
   /* USER CODE END 3 */
@@ -204,7 +204,7 @@ static void MX_SPI1_Init(void)
   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
   hspi1.Init.CRCPolynomial = 7;
   hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
-  hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
+  hspi1.Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
   if (HAL_SPI_Init(&hspi1) != HAL_OK)
   {
     Error_Handler();
@@ -279,6 +279,9 @@ static void MX_DMA_Init(void)
   /* DMA1_Channel2_3_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0);
   HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
+  /* DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn, 0, 0);
+  HAL_NVIC_EnableIRQ(DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn);
 
 }
 
@@ -428,44 +431,15 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA_Mixed(
     uint16_t TxSize,
     uint16_t RxSize)
 {
-  uint32_t             tmp_mode;
-  HAL_SPI_StateTypeDef tmp_state;
   HAL_StatusTypeDef errorcode = HAL_OK;
 
-  /* Check rx & tx dma handles */
   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmarx));
   assert_param(IS_SPI_DMA_HANDLE(hspi->hdmatx));
-
-  /* Check Direction parameter */
   assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
 
-  /* Process locked */
   __HAL_LOCK(hspi);
 
-  /* Init temporary variables */
-  tmp_state           = hspi->State;
-  tmp_mode            = hspi->Init.Mode;
-
-  if (!((tmp_state == HAL_SPI_STATE_READY) ||
-        ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
-  {
-    errorcode = HAL_BUSY;
-    goto error;
-  }
-
-  if ((pTxData == NULL) || (pRxData == NULL) || (TxSize == 0U) || (RxSize == 0U))
-  {
-    errorcode = HAL_ERROR;
-    goto error;
-  }
-
-  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
-  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
-  {
-    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
-  }
-
-  /* Set the transaction information */
+  hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
   hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
   hspi->pTxBuffPtr  = (uint8_t *)pTxData;
   hspi->TxXferSize  = TxSize;
@@ -473,111 +447,47 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA_Mixed(
   hspi->pRxBuffPtr  = (uint8_t *)pRxData;
   hspi->RxXferSize  = RxSize;
   hspi->RxXferCount = RxSize;
-
-  /* Init field not used in handle to zero */
   hspi->RxISR       = NULL;
   hspi->TxISR       = NULL;
 
   /* Reset the threshold bit */
   CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX | SPI_CR2_LDMARX);
 
-  /* The packing mode management is enabled by the DMA settings according the spi data size */
-  if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
-  {
-    /* Set fiforxthreshold according the reception data length: 16bit */
-    CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-  }
-  else
-  {
-    /* Set RX Fifo threshold according the reception data length: 8bit */
-    SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-    if (hspi->hdmatx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
-    {
-      if ((hspi->TxXferSize & 0x1U) == 0x0U)
-      {
-        CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = hspi->TxXferCount >> 1U;
-      }
-      else
-      {
-        SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMATX);
-        hspi->TxXferCount = (hspi->TxXferCount >> 1U) + 1U;
-      }
-    }
-
-    if (hspi->hdmarx->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
-    {
-      /* Set RX Fifo threshold according the reception data length: 16bit */
-      CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
-
-      if ((hspi->RxXferCount & 0x1U) == 0x0U)
-      {
-        CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = hspi->RxXferCount >> 1U;
-      }
-      else
-      {
-        SET_BIT(hspi->Instance->CR2, SPI_CR2_LDMARX);
-        hspi->RxXferCount = (hspi->RxXferCount >> 1U) + 1U;
-      }
-    }
-  }
+  /* Set RX Fifo threshold according the reception data length: 8bit */
+  SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD);
 
-  /* Check if we are in Rx only or in Rx/Tx Mode and configure the DMA transfer complete callback */
-  if (hspi->State == HAL_SPI_STATE_BUSY_RX)
-  {
-    while (1); // TODO confirm if can remove
-  }
-  else
-  {
-    /* Set the SPI Tx/Rx DMA Half transfer complete callback */
-    hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
-    hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
-  }
-
-  /* Set the DMA error callback */
-  hspi->hdmarx->XferErrorCallback = NULL;//SPI_DMAError;
-
-  /* Set the DMA AbortCpltCallback */
-  hspi->hdmarx->XferAbortCallback = NULL;
+  hspi->hdmarx->XferHalfCpltCallback = SPI_DMAHalfTransmitReceiveCplt;
+  hspi->hdmarx->XferCpltCallback     = SPI_DMATransmitReceiveCplt;
+  hspi->hdmarx->XferErrorCallback    = NULL;
+  hspi->hdmarx->XferAbortCallback    = NULL;
+  hspi->hdmatx->XferHalfCpltCallback = NULL;
+  hspi->hdmatx->XferCpltCallback     = NULL;
+  hspi->hdmatx->XferErrorCallback    = NULL;
+  hspi->hdmatx->XferAbortCallback    = NULL;
 
   /* Enable the Rx DMA Stream/Channel  */
-  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,
-                                 hspi->RxXferCount))
-  {
+  errorcode = HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR,
+      (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
+  if (HAL_OK != errorcode) {
     /* Update SPI error code */
     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
-    errorcode = HAL_ERROR;
-
     goto error;
   }
 
   /* Enable Rx DMA Request */
   SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 
-  /* Set the SPI Tx DMA transfer complete callback as NULL because the communication closing
-  is performed in DMA reception complete callback  */
-  hspi->hdmatx->XferHalfCpltCallback = NULL;
-  hspi->hdmatx->XferCpltCallback     = NULL;
-  hspi->hdmatx->XferErrorCallback    = NULL;
-  hspi->hdmatx->XferAbortCallback    = NULL;
-
   /* Enable the Tx DMA Stream/Channel  */
-  if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,
-                                 hspi->TxXferCount))
-  {
+  errorcode = HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr,
+      (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
+  if (HAL_OK != errorcode) {
     /* Update SPI error code */
     SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_DMA);
-    errorcode = HAL_ERROR;
-
     goto error;
   }
 
   /* Check if the SPI is already enabled */
-  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
-  {
-    /* Enable SPI peripheral */
+  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE) {
     __HAL_SPI_ENABLE(hspi);
   }
   /* Enable the SPI Error Interrupt Bit */
@@ -587,23 +497,23 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA_Mixed(
   SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
 
 error :
-  /* Process Unlocked */
   __HAL_UNLOCK(hspi);
   return errorcode;
 }
 
 void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)hdma->Parent;
   (void)hspi;
-
-  puts("hey!\r\n");
 }
 
 void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma)
 {
-  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent);
+  SPI_HandleTypeDef *hspi = (SPI_HandleTypeDef *)hdma->Parent;
   (void)hspi;
+
+  sample_t sample = *(sample_t *)I2S_Receive_Buffer;
+  printf("%d\r\n", sample.value);
 }
 /* USER CODE END 4 */
 
@@ -616,6 +526,7 @@ void Error_Handler(void)
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
   __disable_irq();
+  printf("Unhandled error, halting!\r\n");
   while (1)
   {
   }
@@ -635,6 +546,7 @@ void assert_failed(uint8_t *file, uint32_t line)
   /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
      ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  printf("Wrong parameters value: file %s on line %d\r\n", file, line);
   /* USER CODE END 6 */
 }
 #endif /* USE_FULL_ASSERT */
diff --git a/Core/Src/stm32u0xx_hal_msp.c b/Core/Src/stm32u0xx_hal_msp.c
index 4eb7deb..204294d 100644
--- a/Core/Src/stm32u0xx_hal_msp.c
+++ b/Core/Src/stm32u0xx_hal_msp.c
@@ -120,7 +120,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
     hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
     hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
     hdma_spi1_rx.Init.Mode = DMA_CIRCULAR;
-    hdma_spi1_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
+    hdma_spi1_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
     if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
     {
       Error_Handler();
@@ -137,7 +137,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
     hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
     hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
     hdma_spi1_tx.Init.Mode = DMA_CIRCULAR;
-    hdma_spi1_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
+    hdma_spi1_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
     if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
     {
       Error_Handler();
diff --git a/Core/Src/stm32u0xx_it.c b/Core/Src/stm32u0xx_it.c
index 78ec492..2539ba0 100644
--- a/Core/Src/stm32u0xx_it.c
+++ b/Core/Src/stm32u0xx_it.c
@@ -169,6 +169,19 @@ void DMA1_Channel2_3_IRQHandler(void)
   /* USER CODE END DMA1_Channel2_3_IRQn 1 */
 }
 
+/**
+  * @brief This function handles DMAMUX_OVR_IT + DMA1 channel 4 to 7 + DMA2 channel 1 to 5.
+  */
+void DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn 0 */
+
+  /* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn 0 */
+  /* USER CODE BEGIN DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn 1 */
+
+  /* USER CODE END DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQn 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
diff --git a/Makefile b/Makefile
index 3407a51..c27f09e 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 ##########################################################################################################################
-# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Wed Jan 29 20:12:35 EST 2025]
+# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Wed Jan 29 21:38:04 EST 2025] 
 ##########################################################################################################################
 
 # ------------------------------------------------
@@ -35,32 +35,32 @@ BUILD_DIR = build
 # source
 ######################################
 # C sources
-C_SOURCES =  \
-Core/Src/main.c \
-Core/Src/stm32u0xx_it.c \
-Core/Src/stm32u0xx_hal_msp.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_cortex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_rcc.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_rcc_ex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_flash.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_flash_ex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_gpio.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_dma.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_dma_ex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_pwr.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_pwr_ex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_exti.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_spi.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_spi_ex.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_uart.c \
-Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_uart_ex.c \
-Core/Src/system_stm32u0xx.c \
-Core/Src/sysmem.c \
-Core/Src/syscalls.c  
+C_SOURCES =  \
+Core/Src/main.c \
+Core/Src/stm32u0xx_it.c \
+Core/Src/stm32u0xx_hal_msp.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_cortex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_rcc.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_rcc_ex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_flash.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_flash_ex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_gpio.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_dma.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_dma_ex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_pwr.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_pwr_ex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_exti.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_spi.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_spi_ex.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_uart.c \
+Drivers/STM32U0xx_HAL_Driver/Src/stm32u0xx_hal_uart_ex.c \
+Core/Src/system_stm32u0xx.c \
+Core/Src/sysmem.c \
+Core/Src/syscalls.c
 
 # ASM sources
-ASM_SOURCES =  \
+ASM_SOURCES =  \
 startup_stm32u083xx.s
 
 # ASM sources
@@ -107,8 +107,8 @@ MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)
 AS_DEFS = 
 
 # C defines
-C_DEFS =  \
--DUSE_HAL_DRIVER \
+C_DEFS =  \
+-DUSE_HAL_DRIVER \
 -DSTM32U083xx
 
 
@@ -116,11 +116,11 @@ C_DEFS =  \
 AS_INCLUDES = 
 
 # C includes
-C_INCLUDES =  \
--ICore/Inc \
--IDrivers/STM32U0xx_HAL_Driver/Inc \
--IDrivers/STM32U0xx_HAL_Driver/Inc/Legacy \
--IDrivers/CMSIS/Device/ST/STM32U0xx/Include \
+C_INCLUDES =  \
+-ICore/Inc \
+-IDrivers/STM32U0xx_HAL_Driver/Inc \
+-IDrivers/STM32U0xx_HAL_Driver/Inc/Legacy \
+-IDrivers/CMSIS/Device/ST/STM32U0xx/Include \
 -IDrivers/CMSIS/Include
 
 
@@ -197,4 +197,4 @@ clean:
 #######################################
 -include $(wildcard $(BUILD_DIR)/*.d)
 
-# *** EOF ***
\ No newline at end of file
+# *** EOF ***
diff --git a/microphone.ioc b/microphone.ioc
index d9f4f3d..66d062a 100644
--- a/microphone.ioc
+++ b/microphone.ioc
@@ -403,8 +403,9 @@ SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
 SPI1.CalculateBaudRate=3.0 MBits/s
 SPI1.DataSize=SPI_DATASIZE_8BIT
 SPI1.Direction=SPI_DIRECTION_2LINES
-SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler
+SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,DataSize,BaudRatePrescaler,NSSPMode
 SPI1.Mode=SPI_MODE_MASTER
+SPI1.NSSPMode=SPI_NSS_PULSE_DISABLE
 SPI1.VirtualType=VM_MASTER
 USART2.IPParameters=VirtualMode-Asynchronous
 USART2.VirtualMode-Asynchronous=VM_ASYNC
diff --git a/stm32u0x.cfg b/stm32u0x.cfg
index dfa60f0..075fbe9 100644
--- a/stm32u0x.cfg
+++ b/stm32u0x.cfg
@@ -56,3 +56,5 @@ $_TARGETNAME configure -event examine-end {
 	# DBGMCU_APB1_FZR |= DBG_IWDG_STOP | DBG_WWDG_STOP
 	mmw 0x40015808 0x00001800 0
 }
+
+program build/microphone.hex verify reset exit