From d09f4289b5788d6a8b34e424841292e2b8529e56 Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Sat, 1 Feb 2025 13:31:20 -0500 Subject: exec from ram; process all samples --- Core/Src/main.c | 78 ++++++++++++++++++------ Drivers/qfplib-m0-full-20240105/qfplib-m0-full.h | 32 +++++----- Drivers/qfplib-m0-full-20240105/qfplib-m0-full.s | 2 + Drivers/qfplib-m0-full-20240105/qfplib-port.h | 2 + Makefile | 2 +- STM32U083xx_RAM.ld | 4 +- microphone.ioc | 26 ++++---- 7 files changed, 99 insertions(+), 47 deletions(-) diff --git a/Core/Src/main.c b/Core/Src/main.c index 45d16a6..ed49703 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -32,7 +32,7 @@ typedef uint32_t sample_t; /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ -#define SAMPLE_COUNT (256) // (Stereo!) Sample count per half-transfer +#define SAMPLE_COUNT (1024) // (Stereo!) Sample count per half-transfer #define SAMPLES_PER_REPORT (48000) // Report every second given our 48 kHz rate #define MIC_OFFSET_DB ( 0.f) // Linear offset #define MIC_SENSITIVITY (-26.f) // dBFS value expected at MIC_REF_DB @@ -79,7 +79,9 @@ static HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA_Mixed( uint8_t *pRxData, uint16_t TxSize, uint16_t RxSize); +__RAM_FUNC static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma); +__RAM_FUNC static void SPI_DMAHalfTransmitReceiveCplt(DMA_HandleTypeDef *hdma); /* USER CODE END PFP */ @@ -91,6 +93,14 @@ int __io_putchar(int ch) HAL_UART_Transmit(&huart2, &buf, sizeof(buf), HAL_TIMEOUT); return buf; } + +__RAM_FUNC +void fvar_init(void) +{ + ln10 = qfp_fln(10.f); + MIC_REF_AMPL = qfp_fmul(qfp_int2float((1u << (MIC_BITS - 2)) - 1), + qfp_fpow(10.f, MIC_SENSITIVITY / 20.f)); +} /* USER CODE END 0 */ /** @@ -101,9 +111,7 @@ int main(void) { /* USER CODE BEGIN 1 */ - ln10 = qfp_fln(10.f); - MIC_REF_AMPL = qfp_fmul(qfp_int2float((1u << (MIC_BITS - 1)) - 1), - qfp_fpow(10.f, MIC_SENSITIVITY / 20.f)); + fvar_init(); /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ @@ -160,7 +168,7 @@ void SystemClock_Config(void) /** Configure the main internal regulator output voltage */ - HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2); + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. @@ -180,10 +188,10 @@ void SystemClock_Config(void) RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) { Error_Handler(); } @@ -323,7 +331,7 @@ static void MX_GPIO_Init(void) HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_SET); /*Configure GPIO pin : LED_GREEN_Pin */ GPIO_InitStruct.Pin = LED_GREEN_Pin; @@ -443,6 +451,43 @@ error : #define BITO (10) +__RAM_FUNC +__attribute__((naked)) +int64_t lmul(int64_t a, int64_t b) +{ + asm( +" push {r4, lr}\n" +" mul r1, r2\n" +" mul r3, r0\n" +" add r1, r3\n" + +" lsr r3, r0, #16\n" +" lsr r4, r2, #16\n" +" mul r3, r4\n" +" add r1, r3\n" + +" lsr r3, r0, #16\n" +" uxth r0, r0\n" +" uxth r2, r2\n" +" mul r3, r2\n" +" mul r4, r0\n" +" mul r0, r2\n" + +" mov r2, #0\n" +" add r3, r4\n" +" adc r2, r2\n" +" lsl r2, #16\n" +" add r1, r2\n" + +" lsl r2, r3, #16\n" +" lsr r3, #16\n" +" add r0, r2\n" +" adc r1, r3\n" +" pop {r4, pc}\n" + ); +} + +__RAM_FUNC static inline void process(int64_t in_div4) { static int64_t z[4] = {0, 0, 0, 0}; @@ -458,25 +503,24 @@ static inline void process(int64_t in_div4) int64_t out3 = (out2 + z[3]); z[3] = ((out3 * 0x3f1 /*0.985f*/) >> BITO) - out2; - DB_Sum_Squares += (out3 * out3) >> BITO; + DB_Sum_Squares += lmul(out3, out3) >> BITO; } +__RAM_FUNC static void processSampleBlock(sample_t *sample) { - HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_RESET); - -#define STRIDE 2 + IDLE_GPIO_Port->ODR ^= IDLE_Pin; - for (int i = 0; i < SAMPLE_COUNT; i += 2 * STRIDE) { + for (int i = 0; i < SAMPLE_COUNT; i += 2) { // 18-bit sample comes in as big-endian with right padding. // Use REVSH to extract 18-bit reading divided by four for process(). int samp; asm("revsh %0, %1" : "=l" (samp) : "l" (sample[i])); process(samp); } - DB_Count += SAMPLE_COUNT / (2 * STRIDE); + DB_Count += SAMPLE_COUNT / 2; - if (DB_Count >= SAMPLES_PER_REPORT / STRIDE) { + if (DB_Count >= SAMPLES_PER_REPORT) { float rms = qfp_fsqrt(qfp_int2float((DB_Sum_Squares >> BITO) / DB_Count)); float db = qfp_fadd(qfp_fmul(qfp_flog10(qfp_fdiv(rms, MIC_REF_AMPL)), 20.f), MIC_OFFSET_DB + MIC_REF_DB); @@ -486,7 +530,7 @@ static void processSampleBlock(sample_t *sample) printf("%d dB\r\n", qfp_float2int(db)); } - HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_SET); + IDLE_GPIO_Port->ODR ^= IDLE_Pin; } void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) diff --git a/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.h b/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.h index 0b1f6eb..b3c3a50 100644 --- a/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.h +++ b/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.h @@ -24,21 +24,21 @@ Fifth Floor, Boston, MA 02110-1301, USA. typedef unsigned int ui32; typedef int i32; -extern float qfp_fadd (float x,float y); -extern float qfp_fsub (float x,float y); -extern float qfp_fmul (float x,float y); -extern float qfp_fdiv (float x,float y); -extern int qfp_fcmp (float x,float y); -extern float qfp_fsqrt (float x); -extern i32 qfp_float2int (float x); -extern i32 qfp_float2fix (float x,int f); -extern ui32 qfp_float2uint (float x); -extern ui32 qfp_float2ufix (float x,int f); -extern float qfp_int2float (i32 x); -extern float qfp_fix2float (i32 x,int f); -extern float qfp_uint2float (ui32 x); -extern float qfp_ufix2float (ui32 x,int f); -extern float qfp_fexp (float x); -extern float qfp_fln (float x); +__RAM_FUNC extern float qfp_fadd (float x,float y); +__RAM_FUNC extern float qfp_fsub (float x,float y); +__RAM_FUNC extern float qfp_fmul (float x,float y); +__RAM_FUNC extern float qfp_fdiv (float x,float y); +__RAM_FUNC extern int qfp_fcmp (float x,float y); +__RAM_FUNC extern float qfp_fsqrt (float x); +__RAM_FUNC extern i32 qfp_float2int (float x); +__RAM_FUNC extern i32 qfp_float2fix (float x,int f); +__RAM_FUNC extern ui32 qfp_float2uint (float x); +__RAM_FUNC extern ui32 qfp_float2ufix (float x,int f); +__RAM_FUNC extern float qfp_int2float (i32 x); +__RAM_FUNC extern float qfp_fix2float (i32 x,int f); +__RAM_FUNC extern float qfp_uint2float (ui32 x); +__RAM_FUNC extern float qfp_ufix2float (ui32 x,int f); +__RAM_FUNC extern float qfp_fexp (float x); +__RAM_FUNC extern float qfp_fln (float x); #endif diff --git a/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.s b/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.s index 2ded28d..b08b5c3 100644 --- a/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.s +++ b/Drivers/qfplib-m0-full-20240105/qfplib-m0-full.s @@ -16,6 +16,8 @@ @ write to the Free Software Foundation, Inc., 51 Franklin Street, @ Fifth Floor, Boston, MA 02110-1301, USA. +.section .RamFunc + .syntax unified .cpu cortex-m0plus .thumb diff --git a/Drivers/qfplib-m0-full-20240105/qfplib-port.h b/Drivers/qfplib-m0-full-20240105/qfplib-port.h index 4d57810..c411dee 100644 --- a/Drivers/qfplib-m0-full-20240105/qfplib-port.h +++ b/Drivers/qfplib-m0-full-20240105/qfplib-port.h @@ -1,10 +1,12 @@ #include "qfplib-m0-full.h" +__RAM_FUNC float qfp_fpow(float b, float e) { return qfp_fexp(qfp_fmul(e, qfp_fln(b))); } +__RAM_FUNC float qfp_flog10(float x) { extern float ln10; diff --git a/Makefile b/Makefile index b26e4da..9fe97c8 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Fri Jan 31 17:56:51 EST 2025] +# File automatically-generated by tool: [projectgenerator] version: [4.5.0-RC5] date: [Sat Feb 01 13:11:42 EST 2025] ########################################################################################################################## # ------------------------------------------------ diff --git a/STM32U083xx_RAM.ld b/STM32U083xx_RAM.ld index dd76c0f..4eb873b 100644 --- a/STM32U083xx_RAM.ld +++ b/STM32U083xx_RAM.ld @@ -44,6 +44,7 @@ _Min_Stack_Size = 0x400; /* required amount of stack */ MEMORY { RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K } /* Sections */ @@ -55,7 +56,8 @@ SECTIONS . = ALIGN(4); KEEP(*(.isr_vector)) /* Startup code */ . = ALIGN(4); - } >RAM + *(.text.Reset_Handler) + } >FLASH /* The program code and other data into "RAM" Ram type memory */ .text : diff --git a/microphone.ioc b/microphone.ioc index 49dc5db..3385881 100644 --- a/microphone.ioc +++ b/microphone.ioc @@ -128,10 +128,11 @@ PC2.GPIOParameters=GPIO_Label PC2.GPIO_Label=Joystick PC2.Locked=true PC2.Signal=ADC1_IN2 -PD9.GPIOParameters=GPIO_Speed,GPIO_Label +PD9.GPIOParameters=GPIO_Speed,PinState,GPIO_Label PD9.GPIO_Label=IDLE PD9.GPIO_Speed=GPIO_SPEED_FREQ_MEDIUM PD9.Locked=true +PD9.PinState=GPIO_PIN_SET PD9.Signal=GPIO_Output PinOutPanel.RotationAngle=0 ProjectManager.AskForMigrate=true @@ -166,24 +167,23 @@ ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=false ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_SPI1_Init-SPI1-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true,0-MX_CORTEX_M0+_Init-CORTEX_M0+-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true RCC.ADCFreq_Value=24000000 -RCC.AHBCLKDivider=RCC_SYSCLK_DIV2 -RCC.AHBFreq_Value=12000000 -RCC.APB1CLKDivider=RCC_HCLK_DIV2 +RCC.AHBFreq_Value=24000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV4 RCC.APBFreq_Value=6000000 RCC.APBTimFreq_Value=12000000 -RCC.CortexFreq_Value=1500000 +RCC.CortexFreq_Value=3000000 RCC.Cortex_Div=SYSTICK_CLKSOURCE_HCLK_DIV8 RCC.DATA_CACHE_ENABLE=1 -RCC.FCLKCortexFreq_Value=12000000 +RCC.FCLKCortexFreq_Value=24000000 RCC.FamilyName=M -RCC.HCLKFreq_Value=12000000 +RCC.HCLKFreq_Value=24000000 RCC.HSE_VALUE=4000000 RCC.HSI48_VALUE=48000000 RCC.HSI_VALUE=16000000 RCC.I2C1Freq_Value=6000000 RCC.I2C3Freq_Value=6000000 RCC.INSTRUCTION_CACHE_ENABLE=1 -RCC.IPParameters=ADCFreq_Value,AHBCLKDivider,AHBFreq_Value,APB1CLKDivider,APBFreq_Value,APBTimFreq_Value,CortexFreq_Value,Cortex_Div,DATA_CACHE_ENABLE,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,INSTRUCTION_CACHE_ENABLE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LPUART3Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MSIClockRangeVal,MSI_VALUE,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VDD_VALUE +RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1CLKDivider,APBFreq_Value,APBTimFreq_Value,CortexFreq_Value,Cortex_Div,DATA_CACHE_ENABLE,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,INSTRUCTION_CACHE_ENABLE,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LPUART3Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MSIClockRangeVal,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLR,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VDD_VALUE RCC.LPTIM1Freq_Value=6000000 RCC.LPTIM2Freq_Value=6000000 RCC.LPTIM3Freq_Value=6000000 @@ -197,9 +197,11 @@ RCC.MCO1PinFreq_Value=24000000 RCC.MCO2PinFreq_Value=24000000 RCC.MSIClockRangeVal=RCC_MSIRANGE_9 RCC.MSI_VALUE=24000000 -RCC.PLLPoutputFreq_Value=48000000 -RCC.PLLQoutputFreq_Value=48000000 -RCC.PLLRCLKFreq_Value=48000000 +RCC.PLLN=24 +RCC.PLLPoutputFreq_Value=288000000 +RCC.PLLQoutputFreq_Value=288000000 +RCC.PLLR=RCC_PLLR_DIV8 +RCC.PLLRCLKFreq_Value=72000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_MSI RCC.PWRFreq_Value=24000000 RCC.RNGFreq_Value=24000000 @@ -211,7 +213,7 @@ RCC.USART1Freq_Value=6000000 RCC.USART2Freq_Value=6000000 RCC.USBFreq_Value=24000000 RCC.VCOInputFreq_Value=24000000 -RCC.VCOOutputFreq_Value=96000000 +RCC.VCOOutputFreq_Value=576000000 RCC.VDD_VALUE=1.71 SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2 SPI1.CalculateBaudRate=3.0 MBits/s -- cgit v1.2.3