From e9f471c4e0a4047bb960b28e4de1447b84a22e4f Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Thu, 30 Jan 2025 21:10:20 -0500 Subject: reduce clocks --- Core/Inc/stm32u0xx_hal_conf.h | 2 +- Core/Src/main.c | 15 ++++++++------- Core/Src/stm32u0xx_hal_msp.c | 4 ++-- 3 files changed, 11 insertions(+), 10 deletions(-) (limited to 'Core') diff --git a/Core/Inc/stm32u0xx_hal_conf.h b/Core/Inc/stm32u0xx_hal_conf.h index d8e250f..66cfc34 100644 --- a/Core/Inc/stm32u0xx_hal_conf.h +++ b/Core/Inc/stm32u0xx_hal_conf.h @@ -144,7 +144,7 @@ * @brief This is the HAL system configuration section */ -#define VDD_VALUE 3300U /*!< Value of VDD in mv */ +#define VDD_VALUE 1710U /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY (3U) /*!< tick interrupt priority (lowest by default) */ #define USE_RTOS 0U #define PREFETCH_ENABLE 0U diff --git a/Core/Src/main.c b/Core/Src/main.c index 29fe9cf..67e6ab8 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -142,9 +142,10 @@ int main(void) /* USER CODE BEGIN WHILE */ while (1) { - /* USER CODE END WHILE */ HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_SET); __WFI(); + /* USER CODE END WHILE */ + /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ @@ -161,7 +162,7 @@ void SystemClock_Config(void) /** Configure the main internal regulator output voltage */ - HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2); /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. @@ -181,10 +182,10 @@ void SystemClock_Config(void) RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { Error_Handler(); } @@ -213,7 +214,7 @@ static void MX_SPI1_Init(void) hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; hspi1.Init.NSS = SPI_NSS_SOFT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; hspi1.Init.TIMode = SPI_TIMODE_DISABLE; hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; @@ -252,7 +253,7 @@ static void MX_USART2_UART_Init(void) huart2.Init.Parity = UART_PARITY_NONE; huart2.Init.Mode = UART_MODE_TX_RX; huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart2.Init.OverSampling = UART_OVERSAMPLING_16; + huart2.Init.OverSampling = UART_OVERSAMPLING_8; huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1; huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; diff --git a/Core/Src/stm32u0xx_hal_msp.c b/Core/Src/stm32u0xx_hal_msp.c index 204294d..4eb7deb 100644 --- a/Core/Src/stm32u0xx_hal_msp.c +++ b/Core/Src/stm32u0xx_hal_msp.c @@ -120,7 +120,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_spi1_rx.Init.Mode = DMA_CIRCULAR; - hdma_spi1_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH; + hdma_spi1_rx.Init.Priority = DMA_PRIORITY_MEDIUM; if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK) { Error_Handler(); @@ -137,7 +137,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_spi1_tx.Init.Mode = DMA_CIRCULAR; - hdma_spi1_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH; + hdma_spi1_tx.Init.Priority = DMA_PRIORITY_MEDIUM; if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK) { Error_Handler(); -- cgit v1.2.3