diff options
Diffstat (limited to 'ChibiOS_16.1.5/community/os/hal/boards')
48 files changed, 0 insertions, 7006 deletions
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.c b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.c deleted file mode 100644 index ac48ba0..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.c +++ /dev/null @@ -1,46 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-const PALConfig pal_default_config =
-{
- {VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
- {VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
- {VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
-}; /* Set UART TX pin correctly */
-#endif /* HAL_USE_PAL */
-
-/**
- * Board-specific initialization code.
- */
-void boardInit(void) {
-
- /*
- * External interrupts setup, all disabled initially.
- */
- _disable_interrupts();
-
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.h b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.h deleted file mode 100644 index 97103d3..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.h +++ /dev/null @@ -1,129 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for the EXP430FR5969 LaunchPad board
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_EXP430FR5959
-#define BOARD_NAME "MSP430FR5969 LaunchPad"
-
-/*
- * IO lines assignments.
- */
-#define LINE_LED_G PAL_LINE(IOPORT1, 0U)
-#define LINE_LED_R PAL_LINE(IOPORT2, 14U)
-#define LINE_SW_S1 PAL_LINE(IOPORT2, 13U)
-#define LINE_SW_S2 PAL_LINE(IOPORT1, 1U)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the MSP430X Family Users Guide for details.
- */
-/*
- * Port A setup:
- *
- * P1.0 - Green LED (output low)
- * P1.1 - Switch S2 (input pullup)
- * P1.2 - BoosterPack BP19 (input pullup)
- * P1.3 - BoosterPack BP11 (input pullup)
- * P1.4 - BoosterPack BP12 (input pullup)
- * P1.5 - BoosterPack BP13 (input pullup)
- * P1.6 - BoosterPack BP15 (input pullup)
- * P1.7 - BoosterPack BP14 (input pullup)
- * P2.0 - Application UART TX (alternate 2)
- * P2.1 - Application UART RX (alternate 2)
- * P2.2 - BoosterPack BP7 (input pullup)
- * P2.3 - N/C (input pullup)
- * P2.4 - BoosterPack BP6 (input pullup)
- * P2.5 - BoosterPack BP4 (input pullup)
- * P2.6 - BoosterPack BP3 (input pullup)
- * P2.7 - N/C (input pullup)
- */
-#define VAL_IOPORT1_OUT 0xFCFE
-#define VAL_IOPORT1_DIR 0x0001
-#define VAL_IOPORT1_REN 0xFCFE
-#define VAL_IOPORT1_SEL0 0x0000
-#define VAL_IOPORT1_SEL1 0x0300
-#define VAL_IOPORT1_IES 0x0000
-#define VAL_IOPORT1_IE 0x0000
-
-/*
- * Port B setup:
- *
- * P3.0 - BoosterPack BP18 (input pullup)
- * P3.1 - N/C (input pullup)
- * P3.2 - N/C (input pullup)
- * P3.3 - N/C (input pullup)
- * P3.4 - BoosterPack BP8 (input pullup)
- * P3.5 - BoosterPack BP9 (input pullup)
- * P3.6 - BoosterPack BP10 (input pullup)
- * P3.7 - N/C (input pullup)
- * P4.0 - Application UART CTS (input pullup)
- * P4.1 - Application UART RTS (output high)
- * P4.2 - BoosterPack BP2 (input pullup)
- * P4.3 - BoosterPack BP5 (input pullup)
- * P4.4 - N/C (input pullup)
- * P4.5 - Switch S1 (input pullup)
- * P4.6 - Red LED (output low)
- * P4.7 - N/C (input pullup)
- */
-#define VAL_IOPORT2_OUT 0xBFFF
-#define VAL_IOPORT2_DIR 0x4200
-#define VAL_IOPORT2_REN 0xBDFF
-#define VAL_IOPORT2_SEL0 0x0000
-#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
-
-/*
- * Port J setup:
- *
- * PJ.0 - TDO (input pullup)
- * PJ.1 - TDI (input pullup)
- * PJ.2 - TMS (input pullup)
- * PJ.3 - TCK (input pullup)
- * PJ.4 - LFXIN (alternate 1)
- * PJ.5 - LFXOUT (alternate 1)
- * PJ.6 - HFXIN (N/C) (input pullup)
- * PJ.7 - HFXOUT (N/C) (input pullup)
- */
-#define VAL_IOPORT0_OUT 0x00FF
-#define VAL_IOPORT0_DIR 0x0000
-#define VAL_IOPORT0_REN 0x00CF
-#define VAL_IOPORT0_SEL0 0x0030
-#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.mk deleted file mode 100644 index c629257..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR5969/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR5969/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR5969
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.c b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.c deleted file mode 100644 index a6836cf..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.c +++ /dev/null @@ -1,52 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-const PALConfig pal_default_config =
-{
- {VAL_IOPORT1_OUT, VAL_IOPORT1_DIR, VAL_IOPORT1_REN, VAL_IOPORT1_SEL0,
- VAL_IOPORT1_SEL1, VAL_IOPORT1_IES, VAL_IOPORT1_IE},
- {VAL_IOPORT2_OUT, VAL_IOPORT2_DIR, VAL_IOPORT2_REN, VAL_IOPORT2_SEL0,
- VAL_IOPORT2_SEL1, VAL_IOPORT2_IES, VAL_IOPORT2_IE},
- {VAL_IOPORT3_OUT, VAL_IOPORT3_DIR, VAL_IOPORT3_REN, VAL_IOPORT3_SEL0,
- VAL_IOPORT3_SEL1, VAL_IOPORT3_IES, VAL_IOPORT3_IE},
- {VAL_IOPORT4_OUT, VAL_IOPORT4_DIR, VAL_IOPORT4_REN, VAL_IOPORT4_SEL0,
- VAL_IOPORT4_SEL1, VAL_IOPORT4_IES, VAL_IOPORT4_IE},
- {VAL_IOPORT5_OUT, VAL_IOPORT5_DIR, VAL_IOPORT5_REN, VAL_IOPORT5_SEL0,
- VAL_IOPORT5_SEL1, VAL_IOPORT5_IES, VAL_IOPORT5_IE},
- {VAL_IOPORT0_OUT, VAL_IOPORT0_DIR, VAL_IOPORT0_REN, VAL_IOPORT0_SEL0,
- VAL_IOPORT0_SEL1, VAL_IOPORT0_IES, VAL_IOPORT0_IE}
-}; /* Set UART TX pin correctly */
-#endif /* HAL_USE_PAL */
-
-/**
- * Board-specific initialization code.
- */
-void boardInit(void) {
-
- /*
- * External interrupts setup, all disabled initially.
- */
- _disable_interrupts();
-
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.h b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.h deleted file mode 100644 index 83b8fbb..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.h +++ /dev/null @@ -1,217 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 Andrew Wygle aka awygle
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for the EXP430FR6989 LaunchPad board
- */
-
-/* NOTE: LCD segment pins configured as unused - controlled by LCD driver if
- * present
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_EXP430FR6989
-#define BOARD_NAME "MSP430FR6989 LaunchPad"
-
-/*
- * IO lines assignments.
- */
-#define LINE_LED_R PAL_LINE(IOPORT1, 0U)
-#define LINE_LED_G PAL_LINE(IOPORT5, 7U)
-#define LINE_SW_S1 PAL_LINE(IOPORT1, 1U)
-#define LINE_SW_S2 PAL_LINE(IOPORT1, 2U)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the MSP430X Family Users Guide for details.
- */
-/*
- * Port A setup:
- *
- * P1.0 - Red LED (output low)
- * P1.1 - Switch S1 (input pullup falling-edge interrupt)
- * P1.2 - Switch S2 (input pullup falling-edge interrupt)
- * P1.3 - BoosterPack BP34 (input pullup)
- * P1.4 - BoosterPack BP7 (input pullup)
- * P1.5 - BoosterPack BP18 (input pullup)
- * P1.6 - BoosterPack BP15 (input pullup)
- * P1.7 - BoosterPack BP14 (input pullup)
- * P2.0 - BoosterPack BP8 (input pullup)
- * P2.1 - BoosterPack BP19 (input pullup)
- * P2.2 - BoosterPack BP35 (input pullup)
- * P2.3 - BoosterPack BP31 (input pullup)
- * P2.4 - BoosterPack BP12 (input pullup)
- * P2.5 - BoosterPack BP13 (input pullup)
- * P2.6 - BoosterPack BP39 (input pullup)
- * P2.7 - BoosterPack BP40 (input pullup)
- */
-#define VAL_IOPORT1_OUT 0xFFFE
-#define VAL_IOPORT1_DIR 0x0001
-#define VAL_IOPORT1_REN 0xFFFE
-#define VAL_IOPORT1_SEL0 0x0000
-#define VAL_IOPORT1_SEL1 0x0000
-#define VAL_IOPORT1_IES 0x0006
-#define VAL_IOPORT1_IE 0x0006
-
-/*
- * Port B setup:
- *
- * P3.0 - BoosterPack BP33 (input pullup)
- * P3.1 - BoosterPack BP32 (input pullup)
- * P3.2 - BoosterPack BP5 (input pullup)
- * P3.3 - BoosterPack BP38 (input pullup)
- * P3.4 - Application UART TX (alternate 1)
- * P3.5 - Application UART RX (alternate 1)
- * P3.6 - BoosterPack BP37 (input pullup)
- * P3.7 - BoosterPack BP36 (input pullup)
- * P4.0 - BoosterPack BP10 (input pullup)
- * P4.1 - BoosterPack BP9 (input pullup)
- * P4.2 - BoosterPack BP4 (input pullup)
- * P4.3 - BoosterPack BP3 (input pullup)
- * P4.4 - LCD S8 (input pullup)
- * P4.5 - LCD S7 (input pullup)
- * P4.6 - LCD S6 (input pullup)
- * P4.7 - BoosterPack BP11 (input pullup)
- */
-#define VAL_IOPORT2_OUT 0xFFCF
-#define VAL_IOPORT2_DIR 0x0000
-#define VAL_IOPORT2_REN 0xFFCF
-#define VAL_IOPORT2_SEL0 0x0030
-#define VAL_IOPORT2_SEL1 0x0000
-#define VAL_IOPORT2_IES 0x0000
-#define VAL_IOPORT2_IE 0x0000
-
-/*
- * Port C setup:
- *
- * P5.0 - LCD S38 (input pullup)
- * P5.1 - LCD S37 (input pullup)
- * P5.2 - LCD S36 (input pullup)
- * P5.3 - LCD S35 (input pullup)
- * P5.4 - LCD S12 (input pullup)
- * P5.5 - LCD S11 (input pullup)
- * P5.6 - LCD S10 (input pullup)
- * P5.7 - LCD S9 (input pullup)
- * P6.0 - LCD R23 (input pullup)
- * P6.1 - LCD R13 (input pullup)
- * P6.2 - LCD R03 (input pullup)
- * P6.3 - LCD COM0 (input pullup)
- * P6.4 - LCD COM1 (input pullup)
- * P6.5 - LCD COM2 (input pullup)
- * P6.6 - LCD COM3 (input pullup)
- * P6.7 - LCD S31 (input pullup)
- */
-#define VAL_IOPORT3_OUT 0xFFFF
-#define VAL_IOPORT3_DIR 0x0000
-#define VAL_IOPORT3_REN 0xFFFF
-#define VAL_IOPORT3_SEL0 0x0000
-#define VAL_IOPORT3_SEL1 0x0000
-#define VAL_IOPORT3_IES 0x0000
-#define VAL_IOPORT3_IE 0x0000
-
-/*
- * Port D setup:
- *
- * P7.0 - LCD S17 (input pullup)
- * P7.1 - LCD S16 (input pullup)
- * P7.2 - LCD S15 (input pullup)
- * P7.3 - LCD S14 (input pullup)
- * P7.4 - LCD S13 (input pullup)
- * P7.5 - LCD S30 (input pullup)
- * P7.6 - LCD S29 (input pullup)
- * P7.7 - LCD S27 (input pullup)
- * P8.0 - LCD S21 (input pullup)
- * P8.1 - LCD S20 (input pullup)
- * P8.2 - LCD S19 (input pullup)
- * P8.3 - LCD S18 (input pullup)
- * P8.4 - BoosterPack BP23 (input pullup)
- * P8.5 - BoosterPack BP24 (input pullup)
- * P8.6 - BoosterPack BP25 (input pullup)
- * P8.7 - BoosterPack BP26 (input pullup)
- */
-#define VAL_IOPORT4_OUT 0xFFFF
-#define VAL_IOPORT4_DIR 0x0000
-#define VAL_IOPORT4_REN 0xFFFF
-#define VAL_IOPORT4_SEL0 0x0000
-#define VAL_IOPORT4_SEL1 0x0000
-#define VAL_IOPORT4_IES 0x0000
-#define VAL_IOPORT4_IE 0x0000
-
-/*
- * Port D setup:
- *
- * P9.0 - BoosterPack BP27 (input pullup)
- * P9.1 - BoosterPack BP28 (input pullup)
- * P9.2 - BoosterPack BP2 (input pullup)
- * P9.3 - BoosterPack BP6 (input pullup)
- * P9.4 - BoosterPack BP17 (input pullup)
- * P9.5 - BoosterPack BP29 (input pullup)
- * P9.6 - BoosterPack BP30 (input pullup)
- * P9.7 - Green LED (output low)
- * P10.0 - LCD S4 (input pullup)
- * P10.1 - LCD S28 (input pullup)
- * P10.2 - LCD S39 (input pullup)
- * P10.3 - N/C Internally (input pullup)
- * P10.4 - N/C Internally (input pullup)
- * P10.5 - N/C Internally (input pullup)
- * P10.6 - N/C Internally (input pullup)
- * P10.7 - N/C Internally (input pullup)
- */
-#define VAL_IOPORT5_OUT 0xFF7F
-#define VAL_IOPORT5_DIR 0x0080
-#define VAL_IOPORT5_REN 0xFF7F
-#define VAL_IOPORT5_SEL0 0x0000
-#define VAL_IOPORT5_SEL1 0x0000
-#define VAL_IOPORT5_IES 0x0000
-#define VAL_IOPORT5_IE 0x0000
-
-/*
- * Port J setup:
- *
- * PJ.0 - TDO (input pullup)
- * PJ.1 - TDI (input pullup)
- * PJ.2 - TMS (input pullup)
- * PJ.3 - TCK (input pullup)
- * PJ.4 - LFXIN (alternate 1)
- * PJ.5 - LFXOUT (alternate 1)
- * PJ.6 - HFXIN (N/C) (input pullup)
- * PJ.7 - HFXOUT (N/C) (input pullup)
- */
-#define VAL_IOPORT0_OUT 0x00FF
-#define VAL_IOPORT0_DIR 0x0000
-#define VAL_IOPORT0_REN 0x00CF
-#define VAL_IOPORT0_SEL0 0x0030
-#define VAL_IOPORT0_SEL1 0x0000
-#define VAL_IOPORT0_IES 0x0000
-#define VAL_IOPORT0_IE 0x0000
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.mk deleted file mode 100644 index ea1c237..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/EXP430FR6989/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/EXP430FR6989
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c deleted file mode 100644 index ee86d96..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c +++ /dev/null @@ -1,127 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- .port = IOPORT1, // PORTA
- .pads = {
- /* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_UNCONNECTED, /* PTA2*/ PAL_MODE_OUTPUT_PUSHPULL,
- /* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_UNCONNECTED, /* PTA5*/ PAL_MODE_UNCONNECTED,
- /* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
- /* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
- /*PTA12*/ PAL_MODE_UNCONNECTED, /*PTA13*/ PAL_MODE_UNCONNECTED, /*PTA14*/ PAL_MODE_UNCONNECTED,
- /*PTA15*/ PAL_MODE_UNCONNECTED, /*PTA16*/ PAL_MODE_UNCONNECTED, /*PTA17*/ PAL_MODE_UNCONNECTED,
- /*PTA18*/ PAL_MODE_INPUT_ANALOG, /*PTA19*/ PAL_MODE_INPUT_ANALOG, /*PTA20*/ PAL_MODE_UNCONNECTED,
- /*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
- /*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
- /*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
- /*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT2, // PORTB
- .pads = {
- /* PTB0*/ PAL_MODE_ALTERNATIVE_2, /* PTB1*/ PAL_MODE_ALTERNATIVE_2, /* PTB2*/ PAL_MODE_UNCONNECTED,
- /* PTB3*/ PAL_MODE_UNCONNECTED, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
- /* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_UNCONNECTED,
- /* PTB9*/ PAL_MODE_UNCONNECTED, /*PTB10*/ PAL_MODE_UNCONNECTED, /*PTB11*/ PAL_MODE_UNCONNECTED,
- /*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
- /*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_ALTERNATIVE_3, /*PTB17*/ PAL_MODE_ALTERNATIVE_3,
- /*PTB18*/ PAL_MODE_UNCONNECTED, /*PTB19*/ PAL_MODE_UNCONNECTED, /*PTB20*/ PAL_MODE_UNCONNECTED,
- /*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
- /*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
- /*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
- /*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT3, // PORTC
- .pads = {
- /* PTC0*/ PAL_MODE_UNCONNECTED, /* PTC1*/ PAL_MODE_UNCONNECTED, /* PTC2*/ PAL_MODE_UNCONNECTED,
- /* PTC3*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTC4*/ PAL_MODE_UNCONNECTED, /* PTC5*/ PAL_MODE_UNCONNECTED,
- /* PTC6*/ PAL_MODE_UNCONNECTED, /* PTC7*/ PAL_MODE_UNCONNECTED, /* PTC8*/ PAL_MODE_UNCONNECTED,
- /* PTC9*/ PAL_MODE_UNCONNECTED, /*PTC10*/ PAL_MODE_UNCONNECTED, /*PTC11*/ PAL_MODE_UNCONNECTED,
- /*PTC12*/ PAL_MODE_UNCONNECTED, /*PTC13*/ PAL_MODE_UNCONNECTED, /*PTC14*/ PAL_MODE_UNCONNECTED,
- /*PTC15*/ PAL_MODE_UNCONNECTED, /*PTC16*/ PAL_MODE_UNCONNECTED, /*PTC17*/ PAL_MODE_UNCONNECTED,
- /*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
- /*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
- /*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
- /*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
- /*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT4, // PORTD
- .pads = {
- /* PTD0*/ PAL_MODE_UNCONNECTED, /* PTD1*/ PAL_MODE_UNCONNECTED, /* PTD2*/ PAL_MODE_UNCONNECTED,
- /* PTD3*/ PAL_MODE_UNCONNECTED, /* PTD4*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTD5*/ PAL_MODE_UNCONNECTED,
- /* PTD6*/ PAL_MODE_UNCONNECTED, /* PTD7*/ PAL_MODE_UNCONNECTED, /* PTD8*/ PAL_MODE_UNCONNECTED,
- /* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
- /*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
- /*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
- /*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
- /*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
- /*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
- /*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
- /*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT5, // PORTE
- .pads = {
- /* PTE0*/ PAL_MODE_UNCONNECTED, /* PTE1*/ PAL_MODE_UNCONNECTED, /* PTE2*/ PAL_MODE_UNCONNECTED,
- /* PTE3*/ PAL_MODE_UNCONNECTED, /* PTE4*/ PAL_MODE_UNCONNECTED, /* PTE5*/ PAL_MODE_UNCONNECTED,
- /* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
- /* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
- /*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
- /*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
- /*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_UNCONNECTED,
- /*PTE21*/ PAL_MODE_UNCONNECTED, /*PTE22*/ PAL_MODE_UNCONNECTED, /*PTE23*/ PAL_MODE_UNCONNECTED,
- /*PTE24*/ PAL_MODE_UNCONNECTED, /*PTE25*/ PAL_MODE_UNCONNECTED, /*PTE26*/ PAL_MODE_UNCONNECTED,
- /*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_UNCONNECTED,
- /*PTE30*/ PAL_MODE_UNCONNECTED, /*PTE31*/ PAL_MODE_UNCONNECTED,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- k20x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h deleted file mode 100644 index 8f8605c..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.h +++ /dev/null @@ -1,70 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for Freescale Freedom K20D50M board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_FREESCALE_FREEDOM_K20D50M
-#define BOARD_NAME "Freescale Freedom K20D50M"
-
-/* External 8 MHz crystal. */
-#define KINETIS_XTAL_FREQUENCY 8000000UL
-
-/*
- * MCU type
- */
-#define K20x5
-
-/*
- * Onboard features.
- */
-#define GPIO_LED_RED IOPORT3
-#define PIN_LED_RED 3
-#define GPIO_LED_GREEN IOPORT4
-#define PIN_LED_GREEN 4
-#define GPIO_LED_BLUE IOPORT1
-#define PIN_LED_BLUE 2
-
-/* Inertial sensor: MMA8451Q */
-/* Default I2C address 0x1D */
-#define I2C_GYRO I2C0
-
-#define LINE_LED_RED PAL_LINE(GPIO_LED_RED, PIN_LED_RED)
-#define LINE_LED_GREEN PAL_LINE(GPIO_LED_GREEN, PIN_LED_GREEN)
-#define LINE_LED_BLUE PAL_LINE(GPIO_LED_BLUE, PIN_LED_BLUE)
-#define LINE_GYRO_SCL PAL_LINE(GPIOB, 0U)
-#define LINE_GYRO_SDA PAL_LINE(GPIOB, 1U)
-#define LINE_GYRO_INT1 PAL_LINE(GPIOC, 11U)
-#define LINE_GYRO_INT2 PAL_LINE(GPIOC, 6U)
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk deleted file mode 100644 index f74d306..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_K20D50M
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c deleted file mode 100644 index f5bd3ac..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c +++ /dev/null @@ -1,127 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- .port = IOPORT1, // PORTA
- .pads = {
- /* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_ALTERNATIVE_2, /* PTA2*/ PAL_MODE_ALTERNATIVE_2,
- /* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_INPUT_ANALOG, /* PTA5*/ PAL_MODE_INPUT_ANALOG,
- /* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
- /* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
- /*PTA12*/ PAL_MODE_INPUT_ANALOG, /*PTA13*/ PAL_MODE_INPUT_ANALOG, /*PTA14*/ PAL_MODE_INPUT_ANALOG,
- /*PTA15*/ PAL_MODE_INPUT_ANALOG, /*PTA16*/ PAL_MODE_INPUT_ANALOG, /*PTA17*/ PAL_MODE_INPUT_ANALOG,
- /*PTA18*/ PAL_MODE_INPUT_ANALOG, /*PTA19*/ PAL_MODE_INPUT_ANALOG, /*PTA20*/ PAL_MODE_ALTERNATIVE_7,
- /*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
- /*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
- /*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
- /*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT2, // PORTB
- .pads = {
- /* PTB0*/ PAL_MODE_INPUT_ANALOG, /* PTB1*/ PAL_MODE_INPUT_ANALOG, /* PTB2*/ PAL_MODE_INPUT_ANALOG,
- /* PTB3*/ PAL_MODE_INPUT_ANALOG, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
- /* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_INPUT_ANALOG,
- /* PTB9*/ PAL_MODE_INPUT_ANALOG, /*PTB10*/ PAL_MODE_INPUT_ANALOG, /*PTB11*/ PAL_MODE_INPUT_ANALOG,
- /*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
- /*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_INPUT_ANALOG, /*PTB17*/ PAL_MODE_INPUT_ANALOG,
- /*PTB18*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB19*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB20*/ PAL_MODE_UNCONNECTED,
- /*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
- /*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
- /*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
- /*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT3, // PORTC
- .pads = {
- /* PTC0*/ PAL_MODE_INPUT_ANALOG, /* PTC1*/ PAL_MODE_INPUT_ANALOG, /* PTC2*/ PAL_MODE_INPUT_ANALOG,
- /* PTC3*/ PAL_MODE_INPUT_ANALOG, /* PTC4*/ PAL_MODE_INPUT_ANALOG, /* PTC5*/ PAL_MODE_INPUT_ANALOG,
- /* PTC6*/ PAL_MODE_INPUT_ANALOG, /* PTC7*/ PAL_MODE_INPUT_ANALOG, /* PTC8*/ PAL_MODE_INPUT_ANALOG,
- /* PTC9*/ PAL_MODE_INPUT_ANALOG, /*PTC10*/ PAL_MODE_INPUT_ANALOG, /*PTC11*/ PAL_MODE_INPUT_ANALOG,
- /*PTC12*/ PAL_MODE_INPUT_ANALOG, /*PTC13*/ PAL_MODE_INPUT_ANALOG, /*PTC14*/ PAL_MODE_INPUT_ANALOG,
- /*PTC15*/ PAL_MODE_INPUT_ANALOG, /*PTC16*/ PAL_MODE_INPUT_ANALOG, /*PTC17*/ PAL_MODE_INPUT_ANALOG,
- /*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
- /*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
- /*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
- /*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
- /*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT4, // PORTD
- .pads = {
- /* PTD0*/ PAL_MODE_INPUT_ANALOG, /* PTD1*/ PAL_MODE_OUTPUT_PUSHPULL, /* PTD2*/ PAL_MODE_INPUT_ANALOG,
- /* PTD3*/ PAL_MODE_INPUT_ANALOG, /* PTD4*/ PAL_MODE_INPUT_ANALOG, /* PTD5*/ PAL_MODE_INPUT_ANALOG,
- /* PTD6*/ PAL_MODE_INPUT_ANALOG, /* PTD7*/ PAL_MODE_INPUT_ANALOG, /* PTD8*/ PAL_MODE_INPUT_ANALOG,
- /* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
- /*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
- /*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
- /*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
- /*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
- /*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
- /*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
- /*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT5, // PORTE
- .pads = {
- /* PTE0*/ PAL_MODE_INPUT_ANALOG, /* PTE1*/ PAL_MODE_INPUT_ANALOG, /* PTE2*/ PAL_MODE_INPUT_ANALOG,
- /* PTE3*/ PAL_MODE_INPUT_ANALOG, /* PTE4*/ PAL_MODE_INPUT_ANALOG, /* PTE5*/ PAL_MODE_INPUT_ANALOG,
- /* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
- /* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
- /*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
- /*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
- /*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_INPUT_ANALOG,
- /*PTE21*/ PAL_MODE_INPUT_ANALOG, /*PTE22*/ PAL_MODE_INPUT_ANALOG, /*PTE23*/ PAL_MODE_INPUT_ANALOG,
- /*PTE24*/ PAL_MODE_ALTERNATIVE_5, /*PTE25*/ PAL_MODE_ALTERNATIVE_5, /*PTE26*/ PAL_MODE_UNCONNECTED,
- /*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_INPUT_ANALOG,
- /*PTE30*/ PAL_MODE_INPUT_ANALOG, /*PTE31*/ PAL_MODE_INPUT_ANALOG,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- kl2x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.h b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.h deleted file mode 100644 index 289ee91..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.h +++ /dev/null @@ -1,79 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for Freescale Freedom KL25Z board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_FREESCALE_FREEDOM_KL25Z
-#define BOARD_NAME "Freescale Freedom KL25Z"
-
-/* External 8 MHz crystal. */
-#define KINETIS_XTAL_FREQUENCY 8000000UL
-
-/*
- * MCU type
- */
-#define KL25
-
-/*
- * Onboard features.
- */
-#define GPIO_LED_RED IOPORT2
-#define PIN_LED_RED 18
-#define GPIO_LED_GREEN IOPORT2
-#define PIN_LED_GREEN 19
-#define GPIO_LED_BLUE IOPORT4
-#define PIN_LED_BLUE 1
-
-/* Inertial sensor: MMA8451Q */
-/* Default I2C address 0x1D */
-/* Note: the pins PTE24/25 are assigned to I2C0 by default;
- * if I2C0 is wanted on other pins, these need to be
- * assigned another function explicitly!
- */
-#define I2C_GYRO I2C0
-
-#define LINE_LED_RED PAL_LINE(GPIO_LED_RED, PIN_LED_RED)
-#define LINE_LED_GREEN PAL_LINE(GPIO_LED_GREEN, PIN_LED_GREEN)
-#define LINE_LED_BLUE PAL_LINE(GPIO_LED_BLUE, PIN_LED_BLUE)
-#define LINE_GYRO_SCL PAL_LINE(GPIOE, 24U)
-#define LINE_GYRO_SDA PAL_LINE(GPIOE, 25U)
-#define LINE_GYRO_INT1 PAL_LINE(GPIOA, 14U)
-#define LINE_GYRO_INT2 PAL_LINE(GPIOA, 15U)
-
-/*
- * Not configured:
- * - TSI Slider on PTB16/TSI0_CH9 and PTB17/TSI_CH10
- */
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk deleted file mode 100644 index 3097a90..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL25Z
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.c b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.c deleted file mode 100644 index 7c68f66..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.c +++ /dev/null @@ -1,127 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 flabbergast <s3+flabbergast@sdfeu.org>
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- .port = IOPORT1, // PORTA
- .pads = {
- /* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_ALTERNATIVE_2, /* PTA2*/ PAL_MODE_ALTERNATIVE_2,
- /* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_INPUT_ANALOG, /* PTA5*/ PAL_MODE_INPUT_ANALOG,
- /* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
- /* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
- /*PTA12*/ PAL_MODE_INPUT_ANALOG, /*PTA13*/ PAL_MODE_INPUT_ANALOG, /*PTA14*/ PAL_MODE_UNCONNECTED,
- /*PTA15*/ PAL_MODE_UNCONNECTED, /*PTA16*/ PAL_MODE_UNCONNECTED, /*PTA17*/ PAL_MODE_UNCONNECTED,
- /*PTA18*/ PAL_MODE_INPUT_ANALOG, /*PTA19*/ PAL_MODE_INPUT_ANALOG, /*PTA20*/ PAL_MODE_ALTERNATIVE_7,
- /*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
- /*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
- /*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
- /*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT2, // PORTB
- .pads = {
- /* PTB0*/ PAL_MODE_INPUT_ANALOG, /* PTB1*/ PAL_MODE_INPUT_ANALOG, /* PTB2*/ PAL_MODE_INPUT_ANALOG,
- /* PTB3*/ PAL_MODE_INPUT_ANALOG, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
- /* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_INPUT_ANALOG,
- /* PTB9*/ PAL_MODE_UNCONNECTED, /*PTB10*/ PAL_MODE_UNCONNECTED, /*PTB11*/ PAL_MODE_UNCONNECTED,
- /*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
- /*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_INPUT_ANALOG, /*PTB17*/ PAL_MODE_INPUT_ANALOG,
- /*PTB18*/ PAL_MODE_INPUT_ANALOG, /*PTB19*/ PAL_MODE_INPUT_ANALOG, /*PTB20*/ PAL_MODE_UNCONNECTED,
- /*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
- /*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
- /*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
- /*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT3, // PORTC
- .pads = {
- /* PTC0*/ PAL_MODE_INPUT_ANALOG, /* PTC1*/ PAL_MODE_INPUT_ANALOG, /* PTC2*/ PAL_MODE_INPUT_ANALOG,
- /* PTC3*/ PAL_MODE_INPUT, /* PTC4*/ PAL_MODE_INPUT_ANALOG, /* PTC5*/ PAL_MODE_INPUT_ANALOG,
- /* PTC6*/ PAL_MODE_INPUT_ANALOG, /* PTC7*/ PAL_MODE_INPUT_ANALOG, /* PTC8*/ PAL_MODE_INPUT_ANALOG,
- /* PTC9*/ PAL_MODE_INPUT_ANALOG, /*PTC10*/ PAL_MODE_INPUT_ANALOG, /*PTC11*/ PAL_MODE_INPUT_ANALOG,
- /*PTC12*/ PAL_MODE_UNCONNECTED, /*PTC13*/ PAL_MODE_UNCONNECTED, /*PTC14*/ PAL_MODE_UNCONNECTED,
- /*PTC15*/ PAL_MODE_UNCONNECTED, /*PTC16*/ PAL_MODE_UNCONNECTED, /*PTC17*/ PAL_MODE_UNCONNECTED,
- /*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
- /*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
- /*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
- /*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
- /*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT4, // PORTD
- .pads = {
- /* PTD0*/ PAL_MODE_INPUT_PULLUP, /* PTD1*/ PAL_MODE_INPUT_ANALOG, /* PTD2*/ PAL_MODE_INPUT_ANALOG,
- /* PTD3*/ PAL_MODE_INPUT_ANALOG, /* PTD4*/ PAL_MODE_INPUT_ANALOG, /* PTD5*/ PAL_MODE_OUTPUT_PUSHPULL,
- /* PTD6*/ PAL_MODE_INPUT_ANALOG, /* PTD7*/ PAL_MODE_INPUT_ANALOG, /* PTD8*/ PAL_MODE_UNCONNECTED,
- /* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
- /*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
- /*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
- /*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
- /*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
- /*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
- /*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
- /*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT5, // PORTE
- .pads = {
- /* PTE0*/ PAL_MODE_INPUT_ANALOG, /* PTE1*/ PAL_MODE_INPUT_ANALOG, /* PTE2*/ PAL_MODE_UNCONNECTED,
- /* PTE3*/ PAL_MODE_UNCONNECTED, /* PTE4*/ PAL_MODE_UNCONNECTED, /* PTE5*/ PAL_MODE_UNCONNECTED,
- /* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
- /* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
- /*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
- /*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
- /*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_INPUT_ANALOG,
- /*PTE21*/ PAL_MODE_INPUT_ANALOG, /*PTE22*/ PAL_MODE_INPUT, /*PTE23*/ PAL_MODE_INPUT_ANALOG,
- /*PTE24*/ PAL_MODE_ALTERNATIVE_5, /*PTE25*/ PAL_MODE_ALTERNATIVE_5, /*PTE26*/ PAL_MODE_UNCONNECTED,
- /*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_OUTPUT_PUSHPULL,
- /*PTE30*/ PAL_MODE_INPUT_ANALOG, /*PTE31*/ PAL_MODE_OUTPUT_PUSHPULL,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- kl2x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.h b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.h deleted file mode 100644 index 1db7947..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.h +++ /dev/null @@ -1,89 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for Freescale Freedom KL26Z board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_FREESCALE_FREEDOM_KL26Z
-#define BOARD_NAME "Freescale Freedom KL26Z"
-
-/* External 8 MHz crystal. */
-#define KINETIS_XTAL_FREQUENCY 8000000UL
-
-/*
- * MCU type
- */
-#define KL26
-
-/*
- * Onboard features.
- */
-#define GPIO_LED_RED IOPORT5
-#define PIN_LED_RED 29
-#define GPIO_LED_GREEN IOPORT5
-#define PIN_LED_GREEN 31
-#define GPIO_LED_BLUE IOPORT4
-#define PIN_LED_BLUE 5
-#define GPIO_BUTTON IOPORT4
-#define PIN_BUTTON 0
-#define GPIO_LIGHT_SENSOR IOPORT5
-#define PIN_LIGHT_SENSOR 22
-
-/* Inertial sensor: FXOS8700CQ */
-/* Default I2C address 0x1D */
-/* Note: the pins PTE24/25 are assigned to I2C0 by default;
- * if I2C0 is wanted on other pins, these need to be
- * assigned another function explicitly!
- */
-#define I2C_GYRO I2C0
-
-#define LINE_LED_RED PAL_LINE(GPIO_LED_RED, PIN_LED_RED)
-#define LINE_LED_GREEN PAL_LINE(GPIO_LED_GREEN, PIN_LED_GREEN)
-#define LINE_LED_BLUE PAL_LINE(GPIO_LED_BLUE, PIN_LED_BLUE)
-#define LINE_BUTTON PAL_LINE(GPIO_BUTTON, PIN_BUTTON)
-#define LINE_LIGHT_SENSOR PAL_LINE(GPIO_LIGHT_SENSOR, PIN_LIGHT_SENSOR)
-#define LINE_GYRO_SCL PAL_LINE(GPIOE, 24U)
-#define LINE_GYRO_SDA PAL_LINE(GPIOE, 25U)
-#define LINE_GYRO_INT1 PAL_LINE(GPIOD, 0U)
-#define LINE_GYRO_INT2 PAL_LINE(GPIOD, 1U)
-
-/*
- * Not configured:
- * - TSI Slider on PTB16/TSI0_CH9 and PTB17/TSI_CH10
- * - I2C inertial sensor on I2C0, routed to PTE25 and PTE25
- * Note: these pins are assigned to I2C0 by default;
- * if I2C0 is wanted on other pins, these need to be
- * assigned another function explicitly!
- */
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk deleted file mode 100644 index c352346..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL26Z/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/FREESCALE_FREEDOM_KL26Z
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.c b/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.c deleted file mode 100644 index d67e6ce..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.c +++ /dev/null @@ -1,127 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- .port = IOPORT1, // PORTA
- .pads = {
- /* PTA0*/ PAL_MODE_ALTERNATIVE_7, /* PTA1*/ PAL_MODE_UNCONNECTED, /* PTA2*/ PAL_MODE_UNCONNECTED,
- /* PTA3*/ PAL_MODE_ALTERNATIVE_7, /* PTA4*/ PAL_MODE_UNCONNECTED, /* PTA5*/ PAL_MODE_UNCONNECTED,
- /* PTA6*/ PAL_MODE_UNCONNECTED, /* PTA7*/ PAL_MODE_UNCONNECTED, /* PTA8*/ PAL_MODE_UNCONNECTED,
- /* PTA9*/ PAL_MODE_UNCONNECTED, /*PTA10*/ PAL_MODE_UNCONNECTED, /*PTA11*/ PAL_MODE_UNCONNECTED,
- /*PTA12*/ PAL_MODE_UNCONNECTED, /*PTA13*/ PAL_MODE_UNCONNECTED, /*PTA14*/ PAL_MODE_UNCONNECTED,
- /*PTA15*/ PAL_MODE_UNCONNECTED, /*PTA16*/ PAL_MODE_UNCONNECTED, /*PTA17*/ PAL_MODE_UNCONNECTED,
- /*PTA18*/ PAL_MODE_UNCONNECTED, /*PTA19*/ PAL_MODE_UNCONNECTED, /*PTA20*/ PAL_MODE_UNCONNECTED,
- /*PTA21*/ PAL_MODE_UNCONNECTED, /*PTA22*/ PAL_MODE_UNCONNECTED, /*PTA23*/ PAL_MODE_UNCONNECTED,
- /*PTA24*/ PAL_MODE_UNCONNECTED, /*PTA25*/ PAL_MODE_UNCONNECTED, /*PTA26*/ PAL_MODE_UNCONNECTED,
- /*PTA27*/ PAL_MODE_UNCONNECTED, /*PTA28*/ PAL_MODE_UNCONNECTED, /*PTA29*/ PAL_MODE_UNCONNECTED,
- /*PTA30*/ PAL_MODE_UNCONNECTED, /*PTA31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT2, // PORTB
- .pads = {
- /* PTB0*/ PAL_MODE_UNCONNECTED, /* PTB1*/ PAL_MODE_UNCONNECTED, /* PTB2*/ PAL_MODE_UNCONNECTED,
- /* PTB3*/ PAL_MODE_UNCONNECTED, /* PTB4*/ PAL_MODE_UNCONNECTED, /* PTB5*/ PAL_MODE_UNCONNECTED,
- /* PTB6*/ PAL_MODE_UNCONNECTED, /* PTB7*/ PAL_MODE_UNCONNECTED, /* PTB8*/ PAL_MODE_UNCONNECTED,
- /* PTB9*/ PAL_MODE_UNCONNECTED, /*PTB10*/ PAL_MODE_UNCONNECTED, /*PTB11*/ PAL_MODE_UNCONNECTED,
- /*PTB12*/ PAL_MODE_UNCONNECTED, /*PTB13*/ PAL_MODE_UNCONNECTED, /*PTB14*/ PAL_MODE_UNCONNECTED,
- /*PTB15*/ PAL_MODE_UNCONNECTED, /*PTB16*/ PAL_MODE_OUTPUT_PUSHPULL, /*PTB17*/ PAL_MODE_UNCONNECTED,
- /*PTB18*/ PAL_MODE_UNCONNECTED, /*PTB19*/ PAL_MODE_UNCONNECTED, /*PTB20*/ PAL_MODE_UNCONNECTED,
- /*PTB21*/ PAL_MODE_UNCONNECTED, /*PTB22*/ PAL_MODE_UNCONNECTED, /*PTB23*/ PAL_MODE_UNCONNECTED,
- /*PTB24*/ PAL_MODE_UNCONNECTED, /*PTB25*/ PAL_MODE_UNCONNECTED, /*PTB26*/ PAL_MODE_UNCONNECTED,
- /*PTB27*/ PAL_MODE_UNCONNECTED, /*PTB28*/ PAL_MODE_UNCONNECTED, /*PTB29*/ PAL_MODE_UNCONNECTED,
- /*PTB30*/ PAL_MODE_UNCONNECTED, /*PTB31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT3, // PORTC
- .pads = {
- /* PTC0*/ PAL_MODE_UNCONNECTED, /* PTC1*/ PAL_MODE_UNCONNECTED, /* PTC2*/ PAL_MODE_UNCONNECTED,
- /* PTC3*/ PAL_MODE_UNCONNECTED, /* PTC4*/ PAL_MODE_UNCONNECTED, /* PTC5*/ PAL_MODE_UNCONNECTED,
- /* PTC6*/ PAL_MODE_UNCONNECTED, /* PTC7*/ PAL_MODE_UNCONNECTED, /* PTC8*/ PAL_MODE_UNCONNECTED,
- /* PTC9*/ PAL_MODE_UNCONNECTED, /*PTC10*/ PAL_MODE_UNCONNECTED, /*PTC11*/ PAL_MODE_UNCONNECTED,
- /*PTC12*/ PAL_MODE_UNCONNECTED, /*PTC13*/ PAL_MODE_UNCONNECTED, /*PTC14*/ PAL_MODE_UNCONNECTED,
- /*PTC15*/ PAL_MODE_UNCONNECTED, /*PTC16*/ PAL_MODE_UNCONNECTED, /*PTC17*/ PAL_MODE_UNCONNECTED,
- /*PTC18*/ PAL_MODE_UNCONNECTED, /*PTC19*/ PAL_MODE_UNCONNECTED, /*PTC20*/ PAL_MODE_UNCONNECTED,
- /*PTC21*/ PAL_MODE_UNCONNECTED, /*PTC22*/ PAL_MODE_UNCONNECTED, /*PTC23*/ PAL_MODE_UNCONNECTED,
- /*PTC24*/ PAL_MODE_UNCONNECTED, /*PTC25*/ PAL_MODE_UNCONNECTED, /*PTC26*/ PAL_MODE_UNCONNECTED,
- /*PTC27*/ PAL_MODE_UNCONNECTED, /*PTC28*/ PAL_MODE_UNCONNECTED, /*PTC29*/ PAL_MODE_UNCONNECTED,
- /*PTC30*/ PAL_MODE_UNCONNECTED, /*PTC31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT4, // PORTD
- .pads = {
- /* PTD0*/ PAL_MODE_UNCONNECTED, /* PTD1*/ PAL_MODE_UNCONNECTED, /* PTD2*/ PAL_MODE_UNCONNECTED,
- /* PTD3*/ PAL_MODE_UNCONNECTED, /* PTD4*/ PAL_MODE_UNCONNECTED, /* PTD5*/ PAL_MODE_UNCONNECTED,
- /* PTD6*/ PAL_MODE_UNCONNECTED, /* PTD7*/ PAL_MODE_UNCONNECTED, /* PTD8*/ PAL_MODE_UNCONNECTED,
- /* PTD9*/ PAL_MODE_UNCONNECTED, /*PTD10*/ PAL_MODE_UNCONNECTED, /*PTD11*/ PAL_MODE_UNCONNECTED,
- /*PTD12*/ PAL_MODE_UNCONNECTED, /*PTD13*/ PAL_MODE_UNCONNECTED, /*PTD14*/ PAL_MODE_UNCONNECTED,
- /*PTD15*/ PAL_MODE_UNCONNECTED, /*PTD16*/ PAL_MODE_UNCONNECTED, /*PTD17*/ PAL_MODE_UNCONNECTED,
- /*PTD18*/ PAL_MODE_UNCONNECTED, /*PTD19*/ PAL_MODE_UNCONNECTED, /*PTD20*/ PAL_MODE_UNCONNECTED,
- /*PTD21*/ PAL_MODE_UNCONNECTED, /*PTD22*/ PAL_MODE_UNCONNECTED, /*PTD23*/ PAL_MODE_UNCONNECTED,
- /*PTD24*/ PAL_MODE_UNCONNECTED, /*PTD25*/ PAL_MODE_UNCONNECTED, /*PTD26*/ PAL_MODE_UNCONNECTED,
- /*PTD27*/ PAL_MODE_UNCONNECTED, /*PTD28*/ PAL_MODE_UNCONNECTED, /*PTD29*/ PAL_MODE_UNCONNECTED,
- /*PTD30*/ PAL_MODE_UNCONNECTED, /*PTD31*/ PAL_MODE_UNCONNECTED,
- },
- },
- {
- .port = IOPORT5, // PORTE
- .pads = {
- /* PTE0*/ PAL_MODE_UNCONNECTED, /* PTE1*/ PAL_MODE_UNCONNECTED, /* PTE2*/ PAL_MODE_UNCONNECTED,
- /* PTE3*/ PAL_MODE_UNCONNECTED, /* PTE4*/ PAL_MODE_UNCONNECTED, /* PTE5*/ PAL_MODE_UNCONNECTED,
- /* PTE6*/ PAL_MODE_UNCONNECTED, /* PTE7*/ PAL_MODE_UNCONNECTED, /* PTE8*/ PAL_MODE_UNCONNECTED,
- /* PTE9*/ PAL_MODE_UNCONNECTED, /*PTE10*/ PAL_MODE_UNCONNECTED, /*PTE11*/ PAL_MODE_UNCONNECTED,
- /*PTE12*/ PAL_MODE_UNCONNECTED, /*PTE13*/ PAL_MODE_UNCONNECTED, /*PTE14*/ PAL_MODE_UNCONNECTED,
- /*PTE15*/ PAL_MODE_UNCONNECTED, /*PTE16*/ PAL_MODE_UNCONNECTED, /*PTE17*/ PAL_MODE_UNCONNECTED,
- /*PTE18*/ PAL_MODE_UNCONNECTED, /*PTE19*/ PAL_MODE_UNCONNECTED, /*PTE20*/ PAL_MODE_UNCONNECTED,
- /*PTE21*/ PAL_MODE_UNCONNECTED, /*PTE22*/ PAL_MODE_UNCONNECTED, /*PTE23*/ PAL_MODE_UNCONNECTED,
- /*PTE24*/ PAL_MODE_UNCONNECTED, /*PTE25*/ PAL_MODE_UNCONNECTED, /*PTE26*/ PAL_MODE_UNCONNECTED,
- /*PTE27*/ PAL_MODE_UNCONNECTED, /*PTE28*/ PAL_MODE_UNCONNECTED, /*PTE29*/ PAL_MODE_UNCONNECTED,
- /*PTE30*/ PAL_MODE_UNCONNECTED, /*PTE31*/ PAL_MODE_UNCONNECTED,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- k20x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.h b/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.h deleted file mode 100644 index aad3e27..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.h +++ /dev/null @@ -1,49 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for MCHCL K20 board with MX20DX128 processor.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_MCHCK_K20_MX20DX128
-#define BOARD_NAME "MCHCK K20 MX20DX128"
-
-/*
- * MCU type
- */
-#define K20x5
-
-#define GPIOB_LED 16
-
-#define LINE_LED PAL_LINE(GPIOB, GPIOB_LED)
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.mk deleted file mode 100644 index 22406ac..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/MCHCK_K20/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/MCHCK_K20/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/MCHCK_K20
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c b/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c deleted file mode 100644 index e6c6080..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = -{ - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return TRUE; -} - -/** - * @brief SDC card write protection detection. - */ -bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return FALSE; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return TRUE; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return FALSE; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h b/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h deleted file mode 100644 index 05aeceb..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.h +++ /dev/null @@ -1,1160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for STMicroelectronics STM32F4-Discovery board. - */ - -/* - * Board identifier. - */ -#define BOARD_NAME "NAND and SRAM test board (codename Buod)" - -/* - * Board oscillators-related settings. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 32768 -#endif - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 12000000 -#endif - -/* - * Board voltages. - * Required for performance limits calculation. - */ -#define STM32_VDD 300 - -/* - * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. - */ -#define STM32F407xx - -/* - * IO pins assignments. - */ -#define GPIOA_PIN0 0 -#define GPIOA_PIN1 1 -#define GPIOA_PIN2 2 -#define GPIOA_PIN3 3 -#define GPIOA_SPI1_NSS 4 -#define GPIOA_PIN5 5 -#define GPIOA_PIN6 6 -#define GPIOA_PIN7 7 -#define GPIOA_PIN8 8 -#define GPIOA_USB_PRESENT 9 -#define GPIOA_PIN10 10 -#define GPIOA_OTG_FS_DM 11 -#define GPIOA_OTG_FS_DP 12 -#define GPIOA_JTMS 13 -#define GPIOA_JTCK 14 -#define GPIOA_JTDI 15 - - - -#define GPIOA_USB_PRESENT 9 -#define GPIOA_PIN10 10 -#define GPIOA_OTG_FS_DM 11 -#define GPIOA_OTG_FS_DP 12 - - -#define GPIOB_PIN0 0 -#define GPIOB_NAND_WP 1 -#define GPIOB_PIN2 2 -#define GPIOB_JTDO 3 -#define GPIOB_JTRST 4 -#define GPIOB_NVRAM_PWR 5 -#define GPIOB_PIN6 6 -#define GPIOB_PIN7 7 -#define GPIOB_PIN8 8 -#define GPIOB_PIN9 9 -#define GPIOB_PIN10 10 -#define GPIOB_PIN11 11 -#define GPIOB_PIN12 12 -#define GPIOB_PIN13 13 -#define GPIOB_PIN14 14 -#define GPIOB_PIN15 15 - -#define GPIOC_PIN0 0 -#define GPIOC_PIN1 1 -#define GPIOC_PIN2 2 -#define GPIOC_PIN3 3 -#define GPIOC_PIN4 4 -#define GPIOC_PIN5 5 -#define GPIOC_PIN6 6 -#define GPIOC_PIN7 7 -#define GPIOC_PIN8 8 -#define GPIOC_PIN9 9 -#define GPIOC_PIN10 10 -#define GPIOC_PIN11 11 -#define GPIOC_PIN12 12 -#define GPIOC_PIN13 13 -#define GPIOC_PIN14 14 -#define GPIOC_PIN15 15 - -#define GPIOD_MEM_D2 0 -#define GPIOD_MEM_D3 1 -#define GPIOD_PIN2 2 -#define GPIOD_PIN3 3 -#define GPIOD_MEM_OE 4 -#define GPIOD_MEM_WE 5 -#define GPIOD_NAND_RB_NWAIT 6 -#define GPIOD_NAND_CE1 7 -#define GPIOD_MEM_D13 8 -#define GPIOD_MEM_D14 9 -#define GPIOD_MEM_D15 10 -#define GPIOD_MEM_A16 11 -#define GPIOD_MEM_A17 12 -#define GPIOD_PIN13 13 -#define GPIOD_MEM_D0 14 -#define GPIOD_MEM_D1 15 - -#define GPIOE_SRAM_LB 0 -#define GPIOE_SRAM_UB 1 -#define GPIOE_PIN2 2 -#define GPIOE_PIN3 3 -#define GPIOE_PIN4 4 -#define GPIOE_PIN5 5 -#define GPIOE_PIN6 6 -#define GPIOE_MEM_D4 7 -#define GPIOE_MEM_D5 8 -#define GPIOE_MEM_D6 9 -#define GPIOE_MEM_D7 10 -#define GPIOE_MEM_D8 11 -#define GPIOE_MEM_D9 12 -#define GPIOE_MEM_D10 13 -#define GPIOE_MEM_D11 14 -#define GPIOE_MEM_D12 15 - -#define GPIOF_MEM_A0 0 -#define GPIOF_MEM_A1 1 -#define GPIOF_MEM_A2 2 -#define GPIOF_MEM_A3 3 -#define GPIOF_MEM_A4 4 -#define GPIOF_MEM_A5 5 -#define GPIOF_PIN6 6 -#define GPIOF_PIN7 7 -#define GPIOF_PIN8 8 -#define GPIOF_PIN9 9 -#define GPIOF_PIN10 10 -#define GPIOF_PIN11 11 -#define GPIOF_MEM_A6 12 -#define GPIOF_MEM_A7 13 -#define GPIOF_MEM_A8 14 -#define GPIOF_MEM_A9 15 - -#define GPIOG_MEM_A10 0 -#define GPIOG_MEM_A11 1 -#define GPIOG_MEM_A12 2 -#define GPIOG_MEM_A13 3 -#define GPIOG_MEM_A14 4 -#define GPIOG_MEM_A15 5 -#define GPIOG_NAND_RB1 6 -#define GPIOG_NAND_RB2 7 -#define GPIOG_PIN8 8 -#define GPIOG_NAND_CE2 9 -#define GPIOG_PIN10 10 -#define GPIOG_PIN11 11 -#define GPIOG_SRAM_CS1 12 -#define GPIOG_PIN13 13 -#define GPIOG_PIN14 14 -#define GPIOG_PIN15 15 - -#define GPIOH_OSC_IN 0 -#define GPIOH_OSC_OUT 1 -#define GPIOH_PIN2 2 -#define GPIOH_PIN3 3 -#define GPIOH_PIN4 4 -#define GPIOH_PIN5 5 -#define GPIOH_PIN6 6 -#define GPIOH_I2C3_SCL 7 -#define GPIOH_I2C3_SDA 8 -#define GPIOH_PIN9 9 -#define GPIOH_PIN10 10 -#define GPIOH_PIN11 11 -#define GPIOH_PIN12 12 -#define GPIOH_PIN13 13 -#define GPIOH_PIN14 14 -#define GPIOH_PIN15 15 - -#define GPIOI_PIN0 0 -#define GPIOI_PIN1 1 -#define GPIOI_PIN2 2 -#define GPIOI_PIN3 3 -#define GPIOI_PIN4 4 -#define GPIOI_PIN5 5 -#define GPIOI_PIN6 6 -#define GPIOI_PIN7 7 -#define GPIOI_PIN8 8 -#define GPIOI_PIN9 9 -#define GPIOI_LED_R 10 -#define GPIOI_LED_G 11 -#define GPIOI_PIN12 12 -#define GPIOI_PIN13 13 -#define GPIOI_PIN14 14 -#define GPIOI_PIN15 15 - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) -#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) -#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) -#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) - -/* - * GPIOA setup: - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \ - PIN_MODE_INPUT(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_ALTERNATE(GPIOA_SPI1_NSS) | \ - PIN_MODE_INPUT(GPIOA_PIN5) | \ - PIN_MODE_INPUT(GPIOA_PIN6) | \ - PIN_MODE_INPUT(GPIOA_PIN7) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_USB_PRESENT) | \ - PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_JTMS) | \ - PIN_MODE_ALTERNATE(GPIOA_JTCK) | \ - PIN_MODE_ALTERNATE(GPIOA_JTDI)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SPI1_NSS) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_USB_PRESENT) |\ - PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_JTMS) | \ - PIN_OTYPE_PUSHPULL(GPIOA_JTCK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_JTDI)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_PIN0) | \ - PIN_OSPEED_100M(GPIOA_PIN1) | \ - PIN_OSPEED_100M(GPIOA_PIN2) | \ - PIN_OSPEED_100M(GPIOA_PIN3) | \ - PIN_OSPEED_100M(GPIOA_SPI1_NSS) | \ - PIN_OSPEED_100M(GPIOA_PIN5) | \ - PIN_OSPEED_100M(GPIOA_PIN6) | \ - PIN_OSPEED_100M(GPIOA_PIN7) | \ - PIN_OSPEED_100M(GPIOA_PIN8) | \ - PIN_OSPEED_100M(GPIOA_USB_PRESENT) | \ - PIN_OSPEED_100M(GPIOA_PIN10) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \ - PIN_OSPEED_100M(GPIOA_JTMS) | \ - PIN_OSPEED_100M(GPIOA_JTCK) | \ - PIN_OSPEED_100M(GPIOA_JTDI)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOA_SPI1_NSS) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOA_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOA_USB_PRESENT) |\ - PIN_PUPDR_FLOATING(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ - PIN_PUPDR_FLOATING(GPIOA_JTMS) | \ - PIN_PUPDR_FLOATING(GPIOA_JTCK) | \ - PIN_PUPDR_FLOATING(GPIOA_JTDI)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_SPI1_NSS) | \ - PIN_ODR_HIGH(GPIOA_PIN5) | \ - PIN_ODR_HIGH(GPIOA_PIN6) | \ - PIN_ODR_HIGH(GPIOA_PIN7) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_USB_PRESENT) | \ - PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ - PIN_ODR_HIGH(GPIOA_JTMS) | \ - PIN_ODR_HIGH(GPIOA_JTCK) | \ - PIN_ODR_HIGH(GPIOA_JTDI)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 0) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_SPI1_NSS, 5) | \ - PIN_AFIO_AF(GPIOA_PIN5, 0) | \ - PIN_AFIO_AF(GPIOA_PIN6, 0) | \ - PIN_AFIO_AF(GPIOA_PIN7, 0)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_USB_PRESENT, 0) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ - PIN_AFIO_AF(GPIOA_JTMS, 0) | \ - PIN_AFIO_AF(GPIOA_JTCK, 0) | \ - PIN_AFIO_AF(GPIOA_JTDI, 0)) - -/* - * GPIOB setup: - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_OUTPUT(GPIOB_NAND_WP) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_ALTERNATE(GPIOB_JTDO) | \ - PIN_MODE_ALTERNATE(GPIOB_JTRST) | \ - PIN_MODE_OUTPUT(GPIOB_NVRAM_PWR) | \ - PIN_MODE_INPUT(GPIOB_PIN6) | \ - PIN_MODE_INPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_INPUT(GPIOB_PIN9) | \ - PIN_MODE_INPUT(GPIOB_PIN10) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) - -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_NAND_WP) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_JTDO) | \ - PIN_OTYPE_PUSHPULL(GPIOB_JTRST) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_NVRAM_PWR) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \ - PIN_OSPEED_100M(GPIOB_NAND_WP) | \ - PIN_OSPEED_100M(GPIOB_PIN2) | \ - PIN_OSPEED_100M(GPIOB_JTDO) | \ - PIN_OSPEED_100M(GPIOB_JTRST) | \ - PIN_OSPEED_2M(GPIOB_NVRAM_PWR) | \ - PIN_OSPEED_100M(GPIOB_PIN6) | \ - PIN_OSPEED_100M(GPIOB_PIN7) | \ - PIN_OSPEED_100M(GPIOB_PIN8) | \ - PIN_OSPEED_100M(GPIOB_PIN9) | \ - PIN_OSPEED_100M(GPIOB_PIN10) | \ - PIN_OSPEED_100M(GPIOB_PIN11) | \ - PIN_OSPEED_100M(GPIOB_PIN12) | \ - PIN_OSPEED_100M(GPIOB_PIN13) | \ - PIN_OSPEED_100M(GPIOB_PIN14) | \ - PIN_OSPEED_100M(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \ - PIN_PUPDR_PULLDOWN(GPIOB_NAND_WP) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_JTDO) | \ - PIN_PUPDR_FLOATING(GPIOB_JTRST) | \ - PIN_PUPDR_FLOATING(GPIOB_NVRAM_PWR) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_LOW(GPIOB_NAND_WP) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_JTDO) | \ - PIN_ODR_HIGH(GPIOB_JTRST) | \ - PIN_ODR_LOW(GPIOB_NVRAM_PWR) | \ - PIN_ODR_HIGH(GPIOB_PIN6) | \ - PIN_ODR_HIGH(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_PIN9) | \ - PIN_ODR_HIGH(GPIOB_PIN10) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_NAND_WP, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_JTDO, 0) | \ - PIN_AFIO_AF(GPIOB_JTRST, 0) | \ - PIN_AFIO_AF(GPIOB_NVRAM_PWR, 0) | \ - PIN_AFIO_AF(GPIOB_PIN6, 0) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - */ -#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PIN3) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_INPUT(GPIOC_PIN7) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_INPUT(GPIOC_PIN10) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_INPUT(GPIOC_PIN12) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_PIN0) |\ - PIN_OSPEED_100M(GPIOC_PIN1) | \ - PIN_OSPEED_100M(GPIOC_PIN2) | \ - PIN_OSPEED_100M(GPIOC_PIN3) | \ - PIN_OSPEED_100M(GPIOC_PIN4) | \ - PIN_OSPEED_100M(GPIOC_PIN5) | \ - PIN_OSPEED_100M(GPIOC_PIN6) | \ - PIN_OSPEED_100M(GPIOC_PIN7) | \ - PIN_OSPEED_100M(GPIOC_PIN8) | \ - PIN_OSPEED_100M(GPIOC_PIN9) | \ - PIN_OSPEED_100M(GPIOC_PIN10) | \ - PIN_OSPEED_100M(GPIOC_PIN11) | \ - PIN_OSPEED_100M(GPIOC_PIN12) | \ - PIN_OSPEED_100M(GPIOC_PIN13) | \ - PIN_OSPEED_100M(GPIOC_PIN14) | \ - PIN_OSPEED_100M(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PIN3) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_PIN7) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_PIN10) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_PIN12) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - */ -#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(GPIOD_MEM_D2) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D3) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_OE) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_WE) | \ - PIN_MODE_INPUT(GPIOD_NAND_RB_NWAIT) | \ - PIN_MODE_ALTERNATE(GPIOD_NAND_CE1) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D13) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D14) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D15) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_A16) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_A17) | \ - PIN_MODE_INPUT(GPIOD_PIN13) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D0) | \ - PIN_MODE_ALTERNATE(GPIOD_MEM_D1)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_MEM_D2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_OE) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_WE) | \ - PIN_OTYPE_PUSHPULL(GPIOD_NAND_RB_NWAIT) |\ - PIN_OTYPE_PUSHPULL(GPIOD_NAND_CE1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D14) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D15) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_A16) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_A17) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_MEM_D1)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_MEM_D2) | \ - PIN_OSPEED_100M(GPIOD_MEM_D3) | \ - PIN_OSPEED_100M(GPIOD_PIN2) | \ - PIN_OSPEED_100M(GPIOD_PIN3) | \ - PIN_OSPEED_100M(GPIOD_MEM_OE) | \ - PIN_OSPEED_100M(GPIOD_MEM_WE) | \ - PIN_OSPEED_100M(GPIOD_NAND_RB_NWAIT) | \ - PIN_OSPEED_100M(GPIOD_NAND_CE1) | \ - PIN_OSPEED_100M(GPIOD_MEM_D13) | \ - PIN_OSPEED_100M(GPIOD_MEM_D14) | \ - PIN_OSPEED_100M(GPIOD_MEM_D15) | \ - PIN_OSPEED_100M(GPIOD_MEM_A16) | \ - PIN_OSPEED_100M(GPIOD_MEM_A17) | \ - PIN_OSPEED_100M(GPIOD_PIN13) | \ - PIN_OSPEED_100M(GPIOD_MEM_D0) | \ - PIN_OSPEED_100M(GPIOD_MEM_D1)) - -#if STM32_NAND_USE_EXT_INT -#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_PULLUP(pin)) -#else -#define NAND_RB_NWAIT_PUPDR(pin) (PIN_PUPDR_FLOATING(pin)) -#endif -#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_MEM_D2) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D3) | \ - PIN_PUPDR_FLOATING(GPIOD_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOD_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_OE) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_WE) | \ - NAND_RB_NWAIT_PUPDR(GPIOD_NAND_RB_NWAIT) | \ - PIN_PUPDR_PULLUP(GPIOD_NAND_CE1) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D13) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D14) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D15) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_A16) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_A17) | \ - PIN_PUPDR_FLOATING(GPIOD_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D0) | \ - PIN_PUPDR_FLOATING(GPIOD_MEM_D1)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_MEM_D2) | \ - PIN_ODR_HIGH(GPIOD_MEM_D3) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_MEM_OE) | \ - PIN_ODR_HIGH(GPIOD_MEM_WE) | \ - PIN_ODR_HIGH(GPIOD_NAND_RB_NWAIT) | \ - PIN_ODR_HIGH(GPIOD_NAND_CE1) | \ - PIN_ODR_HIGH(GPIOD_MEM_D13) | \ - PIN_ODR_HIGH(GPIOD_MEM_D14) | \ - PIN_ODR_HIGH(GPIOD_MEM_D15) | \ - PIN_ODR_HIGH(GPIOD_MEM_A16) | \ - PIN_ODR_HIGH(GPIOD_MEM_A17) | \ - PIN_ODR_HIGH(GPIOD_PIN13) | \ - PIN_ODR_HIGH(GPIOD_MEM_D0) | \ - PIN_ODR_HIGH(GPIOD_MEM_D1)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_MEM_D2, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_D3, 12) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_MEM_OE, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_WE, 12) | \ - PIN_AFIO_AF(GPIOD_NAND_RB_NWAIT, 0) | \ - PIN_AFIO_AF(GPIOD_NAND_CE1, 12)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_MEM_D13, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_D14, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_D15, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_A16, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_A17, 12) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0) | \ - PIN_AFIO_AF(GPIOD_MEM_D0, 12) | \ - PIN_AFIO_AF(GPIOD_MEM_D1, 12)) - -/* - * GPIOE setup: - */ -#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(GPIOE_SRAM_LB) | \ - PIN_MODE_ALTERNATE(GPIOE_SRAM_UB) | \ - PIN_MODE_INPUT(GPIOE_PIN2) | \ - PIN_MODE_INPUT(GPIOE_PIN3) | \ - PIN_MODE_INPUT(GPIOE_PIN4) | \ - PIN_MODE_INPUT(GPIOE_PIN5) | \ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D4) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D5) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D6) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D7) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D8) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D9) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D10) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D11) | \ - PIN_MODE_ALTERNATE(GPIOE_MEM_D12)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_SRAM_LB) | \ - PIN_OTYPE_PUSHPULL(GPIOE_SRAM_UB) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D4) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D5) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D10) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_MEM_D12)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_SRAM_LB) | \ - PIN_OSPEED_100M(GPIOE_SRAM_UB) | \ - PIN_OSPEED_100M(GPIOE_PIN2) | \ - PIN_OSPEED_100M(GPIOE_PIN3) | \ - PIN_OSPEED_100M(GPIOE_PIN4) | \ - PIN_OSPEED_100M(GPIOE_PIN5) | \ - PIN_OSPEED_100M(GPIOE_PIN6) | \ - PIN_OSPEED_100M(GPIOE_MEM_D4) | \ - PIN_OSPEED_100M(GPIOE_MEM_D5) | \ - PIN_OSPEED_100M(GPIOE_MEM_D6) | \ - PIN_OSPEED_100M(GPIOE_MEM_D7) | \ - PIN_OSPEED_100M(GPIOE_MEM_D8) | \ - PIN_OSPEED_100M(GPIOE_MEM_D9) | \ - PIN_OSPEED_100M(GPIOE_MEM_D10) | \ - PIN_OSPEED_100M(GPIOE_MEM_D11) | \ - PIN_OSPEED_100M(GPIOE_MEM_D12)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_SRAM_LB) | \ - PIN_PUPDR_FLOATING(GPIOE_SRAM_UB) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D4) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D5) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D6) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D7) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D8) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D9) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D10) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D11) | \ - PIN_PUPDR_FLOATING(GPIOE_MEM_D12)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_SRAM_LB) | \ - PIN_ODR_HIGH(GPIOE_SRAM_UB) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_PIN3) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_MEM_D4) | \ - PIN_ODR_HIGH(GPIOE_MEM_D5) | \ - PIN_ODR_HIGH(GPIOE_MEM_D6) | \ - PIN_ODR_HIGH(GPIOE_MEM_D7) | \ - PIN_ODR_HIGH(GPIOE_MEM_D8) | \ - PIN_ODR_HIGH(GPIOE_MEM_D9) | \ - PIN_ODR_HIGH(GPIOE_MEM_D10) | \ - PIN_ODR_HIGH(GPIOE_MEM_D11) | \ - PIN_ODR_HIGH(GPIOE_MEM_D12)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_SRAM_LB, 12) | \ - PIN_AFIO_AF(GPIOE_SRAM_UB, 12) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0) | \ - PIN_AFIO_AF(GPIOE_PIN3, 0) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0) | \ - PIN_AFIO_AF(GPIOE_PIN5, 0) | \ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_MEM_D4, 12)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_MEM_D5, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D6, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D7, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D8, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D9, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D10, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D11, 12) | \ - PIN_AFIO_AF(GPIOE_MEM_D12, 12)) - -/* - * GPIOF setup: - */ -#define VAL_GPIOF_MODER (PIN_MODE_ALTERNATE(GPIOF_MEM_A0) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A1) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A2) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A3) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A4) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A6) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A7) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A8) | \ - PIN_MODE_ALTERNATE(GPIOF_MEM_A9)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_MEM_A0) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A1) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_MEM_A9)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_MEM_A0) | \ - PIN_OSPEED_100M(GPIOF_MEM_A1) | \ - PIN_OSPEED_100M(GPIOF_MEM_A2) | \ - PIN_OSPEED_100M(GPIOF_MEM_A3) | \ - PIN_OSPEED_100M(GPIOF_MEM_A4) | \ - PIN_OSPEED_100M(GPIOF_MEM_A5) | \ - PIN_OSPEED_100M(GPIOF_PIN6) | \ - PIN_OSPEED_100M(GPIOF_PIN7) | \ - PIN_OSPEED_100M(GPIOF_PIN8) | \ - PIN_OSPEED_100M(GPIOF_PIN9) | \ - PIN_OSPEED_100M(GPIOF_PIN10) | \ - PIN_OSPEED_100M(GPIOF_PIN11) | \ - PIN_OSPEED_100M(GPIOF_MEM_A6) | \ - PIN_OSPEED_100M(GPIOF_MEM_A7) | \ - PIN_OSPEED_100M(GPIOF_MEM_A8) | \ - PIN_OSPEED_100M(GPIOF_MEM_A9)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_MEM_A0) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A1) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A2) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A3) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A4) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A5) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A6) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A7) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A8) | \ - PIN_PUPDR_FLOATING(GPIOF_MEM_A9)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_MEM_A0) | \ - PIN_ODR_HIGH(GPIOF_MEM_A1) | \ - PIN_ODR_HIGH(GPIOF_MEM_A2) | \ - PIN_ODR_HIGH(GPIOF_MEM_A3) | \ - PIN_ODR_HIGH(GPIOF_MEM_A4) | \ - PIN_ODR_HIGH(GPIOF_MEM_A5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_MEM_A6) | \ - PIN_ODR_HIGH(GPIOF_MEM_A7) | \ - PIN_ODR_HIGH(GPIOF_MEM_A8) | \ - PIN_ODR_HIGH(GPIOF_MEM_A9)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_MEM_A0, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A1, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A2, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A3, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A4, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A5, 12) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_MEM_A6, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A7, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A8, 12) | \ - PIN_AFIO_AF(GPIOF_MEM_A9, 12)) - -/* - * GPIOG setup: - */ -#define VAL_GPIOG_MODER (PIN_MODE_ALTERNATE(GPIOG_MEM_A10) | \ - PIN_MODE_ALTERNATE(GPIOG_MEM_A11) | \ - PIN_MODE_ALTERNATE(GPIOG_MEM_A12) | \ - PIN_MODE_ALTERNATE(GPIOG_MEM_A13) | \ - PIN_MODE_ALTERNATE(GPIOG_MEM_A14) | \ - PIN_MODE_ALTERNATE(GPIOG_MEM_A15) | \ - PIN_MODE_ALTERNATE(GPIOG_NAND_RB1) | \ - PIN_MODE_ALTERNATE(GPIOG_NAND_RB2) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_ALTERNATE(GPIOG_NAND_CE2) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_ALTERNATE(GPIOG_SRAM_CS1) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_MEM_A10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_MEM_A11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_MEM_A12) | \ - PIN_OTYPE_PUSHPULL(GPIOG_MEM_A13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_MEM_A14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_MEM_A15) | \ - PIN_OTYPE_PUSHPULL(GPIOG_NAND_RB1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_NAND_RB2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOG_NAND_CE2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_SRAM_CS1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_MEM_A10) | \ - PIN_OSPEED_100M(GPIOG_MEM_A11) | \ - PIN_OSPEED_100M(GPIOG_MEM_A12) | \ - PIN_OSPEED_100M(GPIOG_MEM_A13) | \ - PIN_OSPEED_100M(GPIOG_MEM_A14) | \ - PIN_OSPEED_100M(GPIOG_MEM_A15) | \ - PIN_OSPEED_100M(GPIOG_NAND_RB1) | \ - PIN_OSPEED_100M(GPIOG_NAND_RB2) | \ - PIN_OSPEED_100M(GPIOG_PIN8) | \ - PIN_OSPEED_100M(GPIOG_NAND_CE2) | \ - PIN_OSPEED_100M(GPIOG_PIN10) | \ - PIN_OSPEED_100M(GPIOG_PIN11) | \ - PIN_OSPEED_100M(GPIOG_SRAM_CS1) | \ - PIN_OSPEED_100M(GPIOG_PIN13) | \ - PIN_OSPEED_100M(GPIOG_PIN14) | \ - PIN_OSPEED_100M(GPIOG_PIN15)) - -#if STM32_NAND_USE_EXT_INT -#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_FLOATING(pin)) -#else -#define NAND_RB1_PUPDR(pin) (PIN_PUPDR_PULLUP(pin)) -#endif -#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_MEM_A10) | \ - PIN_PUPDR_FLOATING(GPIOG_MEM_A11) | \ - PIN_PUPDR_FLOATING(GPIOG_MEM_A12) | \ - PIN_PUPDR_FLOATING(GPIOG_MEM_A13) | \ - PIN_PUPDR_FLOATING(GPIOG_MEM_A14) | \ - PIN_PUPDR_FLOATING(GPIOG_MEM_A15) | \ - NAND_RB1_PUPDR(GPIOG_NAND_RB1) | \ - PIN_PUPDR_FLOATING(GPIOG_NAND_RB2) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOG_NAND_CE2) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOG_SRAM_CS1) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_MEM_A10) | \ - PIN_ODR_HIGH(GPIOG_MEM_A11) | \ - PIN_ODR_HIGH(GPIOG_MEM_A12) | \ - PIN_ODR_HIGH(GPIOG_MEM_A13) | \ - PIN_ODR_HIGH(GPIOG_MEM_A14) | \ - PIN_ODR_HIGH(GPIOG_MEM_A15) | \ - PIN_ODR_HIGH(GPIOG_NAND_RB1) | \ - PIN_ODR_HIGH(GPIOG_NAND_RB2) | \ - PIN_ODR_HIGH(GPIOG_PIN8) | \ - PIN_ODR_HIGH(GPIOG_NAND_CE2) | \ - PIN_ODR_HIGH(GPIOG_PIN10) | \ - PIN_ODR_HIGH(GPIOG_PIN11) | \ - PIN_ODR_HIGH(GPIOG_SRAM_CS1) | \ - PIN_ODR_HIGH(GPIOG_PIN13) | \ - PIN_ODR_HIGH(GPIOG_PIN14) | \ - PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_MEM_A10, 12) | \ - PIN_AFIO_AF(GPIOG_MEM_A11, 12) | \ - PIN_AFIO_AF(GPIOG_MEM_A12, 12) | \ - PIN_AFIO_AF(GPIOG_MEM_A13, 12) | \ - PIN_AFIO_AF(GPIOG_MEM_A14, 12) | \ - PIN_AFIO_AF(GPIOG_MEM_A15, 12) | \ - PIN_AFIO_AF(GPIOG_NAND_RB1, 12) | \ - PIN_AFIO_AF(GPIOG_NAND_RB2, 12)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_NAND_CE2, 12) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_SRAM_CS1, 12) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ - PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_ALTERNATE(GPIOH_I2C3_SCL) | \ - PIN_MODE_ALTERNATE(GPIOH_I2C3_SDA) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ - PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ - PIN_OTYPE_OPENDRAIN(GPIOH_I2C3_SCL) | \ - PIN_OTYPE_OPENDRAIN(GPIOH_I2C3_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ - PIN_OSPEED_100M(GPIOH_OSC_OUT) | \ - PIN_OSPEED_100M(GPIOH_PIN2) | \ - PIN_OSPEED_100M(GPIOH_PIN3) | \ - PIN_OSPEED_100M(GPIOH_PIN4) | \ - PIN_OSPEED_100M(GPIOH_PIN5) | \ - PIN_OSPEED_100M(GPIOH_PIN6) | \ - PIN_OSPEED_2M(GPIOH_I2C3_SCL) | \ - PIN_OSPEED_2M(GPIOH_I2C3_SDA) | \ - PIN_OSPEED_100M(GPIOH_PIN9) | \ - PIN_OSPEED_100M(GPIOH_PIN10) | \ - PIN_OSPEED_100M(GPIOH_PIN11) | \ - PIN_OSPEED_100M(GPIOH_PIN12) | \ - PIN_OSPEED_100M(GPIOH_PIN13) | \ - PIN_OSPEED_100M(GPIOH_PIN14) | \ - PIN_OSPEED_100M(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ - PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOH_I2C3_SCL) | \ - PIN_PUPDR_FLOATING(GPIOH_I2C3_SDA) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ - PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ - PIN_ODR_HIGH(GPIOH_PIN2) | \ - PIN_ODR_HIGH(GPIOH_PIN3) | \ - PIN_ODR_HIGH(GPIOH_PIN4) | \ - PIN_ODR_HIGH(GPIOH_PIN5) | \ - PIN_ODR_HIGH(GPIOH_PIN6) | \ - PIN_ODR_HIGH(GPIOH_I2C3_SCL) | \ - PIN_ODR_HIGH(GPIOH_I2C3_SDA) | \ - PIN_ODR_HIGH(GPIOH_PIN9) | \ - PIN_ODR_HIGH(GPIOH_PIN10) | \ - PIN_ODR_HIGH(GPIOH_PIN11) | \ - PIN_ODR_HIGH(GPIOH_PIN12) | \ - PIN_ODR_HIGH(GPIOH_PIN13) | \ - PIN_ODR_HIGH(GPIOH_PIN14) | \ - PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ - PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_I2C3_SCL, 4)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_I2C3_SDA, 4) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) - -/* - * GPIOI setup: - */ -#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ - PIN_MODE_INPUT(GPIOI_PIN1) | \ - PIN_MODE_INPUT(GPIOI_PIN2) | \ - PIN_MODE_INPUT(GPIOI_PIN3) | \ - PIN_MODE_INPUT(GPIOI_PIN4) | \ - PIN_MODE_INPUT(GPIOI_PIN5) | \ - PIN_MODE_INPUT(GPIOI_PIN6) | \ - PIN_MODE_INPUT(GPIOI_PIN7) | \ - PIN_MODE_INPUT(GPIOI_PIN8) | \ - PIN_MODE_INPUT(GPIOI_PIN9) | \ - PIN_MODE_OUTPUT(GPIOI_LED_R) | \ - PIN_MODE_OUTPUT(GPIOI_LED_G) | \ - PIN_MODE_INPUT(GPIOI_PIN12) | \ - PIN_MODE_INPUT(GPIOI_PIN13) | \ - PIN_MODE_INPUT(GPIOI_PIN14) | \ - PIN_MODE_INPUT(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOI_LED_R) | \ - PIN_OTYPE_PUSHPULL(GPIOI_LED_G) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \ - PIN_OSPEED_100M(GPIOI_PIN1) | \ - PIN_OSPEED_100M(GPIOI_PIN2) | \ - PIN_OSPEED_100M(GPIOI_PIN3) | \ - PIN_OSPEED_100M(GPIOI_PIN4) | \ - PIN_OSPEED_100M(GPIOI_PIN5) | \ - PIN_OSPEED_100M(GPIOI_PIN6) | \ - PIN_OSPEED_100M(GPIOI_PIN7) | \ - PIN_OSPEED_100M(GPIOI_PIN8) | \ - PIN_OSPEED_100M(GPIOI_PIN9) | \ - PIN_OSPEED_100M(GPIOI_LED_R) | \ - PIN_OSPEED_100M(GPIOI_LED_G) | \ - PIN_OSPEED_100M(GPIOI_PIN12) | \ - PIN_OSPEED_100M(GPIOI_PIN13) | \ - PIN_OSPEED_100M(GPIOI_PIN14) | \ - PIN_OSPEED_100M(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOI_LED_R) | \ - PIN_PUPDR_FLOATING(GPIOI_LED_G) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ - PIN_ODR_HIGH(GPIOI_PIN1) | \ - PIN_ODR_HIGH(GPIOI_PIN2) | \ - PIN_ODR_HIGH(GPIOI_PIN3) | \ - PIN_ODR_HIGH(GPIOI_PIN4) | \ - PIN_ODR_HIGH(GPIOI_PIN5) | \ - PIN_ODR_HIGH(GPIOI_PIN6) | \ - PIN_ODR_HIGH(GPIOI_PIN7) | \ - PIN_ODR_HIGH(GPIOI_PIN8) | \ - PIN_ODR_HIGH(GPIOI_PIN9) | \ - PIN_ODR_LOW(GPIOI_LED_R) | \ - PIN_ODR_LOW(GPIOI_LED_G) | \ - PIN_ODR_HIGH(GPIOI_PIN12) | \ - PIN_ODR_HIGH(GPIOI_PIN13) | \ - PIN_ODR_HIGH(GPIOI_PIN14) | \ - PIN_ODR_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ - PIN_AFIO_AF(GPIOI_PIN1, 0) | \ - PIN_AFIO_AF(GPIOI_PIN2, 0) | \ - PIN_AFIO_AF(GPIOI_PIN3, 0) | \ - PIN_AFIO_AF(GPIOI_PIN4, 0) | \ - PIN_AFIO_AF(GPIOI_PIN5, 0) | \ - PIN_AFIO_AF(GPIOI_PIN6, 0) | \ - PIN_AFIO_AF(GPIOI_PIN7, 0)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ - PIN_AFIO_AF(GPIOI_PIN9, 0) | \ - PIN_AFIO_AF(GPIOI_LED_R, 0) | \ - PIN_AFIO_AF(GPIOI_LED_G, 0) | \ - PIN_AFIO_AF(GPIOI_PIN12, 0) | \ - PIN_AFIO_AF(GPIOI_PIN13, 0) | \ - PIN_AFIO_AF(GPIOI_PIN14, 0) | \ - PIN_AFIO_AF(GPIOI_PIN15, 0)) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk deleted file mode 100644 index 8c28257..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = $(CHIBIOS_CONTRIB)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c - -# Required include directories -BOARDINC = $(CHIBIOS_CONTRIB)/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2 diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.c b/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.c deleted file mode 100644 index c5237d7..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - 2016 Stéphane D'Alu / Bruno Remond - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) - -/* RAM Banks - * (Values are defined in Nordic gcc_startup_nrf51.s) - */ -#define NRF_POWER_RAMON_ADDRESS 0x40000524 -#define NRF_POWER_RAMONB_ADDRESS 0x40000554 -#define NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 0x3 - -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = -{ - .pads = { - PAL_MODE_UNCONNECTED, /* P0.0 */ - PAL_MODE_UNCONNECTED, /* P0.1 */ - PAL_MODE_UNCONNECTED, /* P0.2 */ - PAL_MODE_UNCONNECTED, /* P0.3 */ - PAL_MODE_UNCONNECTED, /* P0.4 */ - PAL_MODE_UNCONNECTED, /* P0.5 */ - PAL_MODE_UNCONNECTED, /* P0.6 */ - PAL_MODE_OUTPUT_OPENDRAIN, /* P0.7 : SCL */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.8 : UART_RTS */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.9 : UART_TX */ - PAL_MODE_INPUT_PULLUP, /* P0.10: UART_CTS */ - PAL_MODE_INPUT_PULLUP, /* P0.11: UART_RX */ - PAL_MODE_UNCONNECTED, /* P0.12 */ - PAL_MODE_UNCONNECTED, /* P0.13 */ - PAL_MODE_UNCONNECTED, /* P0.14 */ - PAL_MODE_UNCONNECTED, /* P0.15 */ - PAL_MODE_UNCONNECTED, /* P0.16 */ - PAL_MODE_INPUT_PULLUP, /* P0.17: BTN1 */ - PAL_MODE_INPUT_PULLUP, /* P0.18: BTN2 */ - PAL_MODE_INPUT_PULLUP, /* P0.19: BTN3 */ - PAL_MODE_INPUT_PULLUP, /* P0.20: BTN4 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.21: LED1 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: LED2 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.23: LED3 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: LED4 | SPI_SEL */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_MOSI */ - PAL_MODE_UNCONNECTED, /* P0.26: XTAL (32MHz) */ - PAL_MODE_UNCONNECTED, /* P0.27: XTAL (32MHz) */ - PAL_MODE_INPUT_PULLUP, /* P0.28: SPI_MISO */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.29: SPI_SCK */ - PAL_MODE_OUTPUT_OPENDRAIN, /* P0.30: SDA */ - PAL_MODE_UNCONNECTED, /* P0.31 */ - }, -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization is performed just after reset before BSS and - * DATA segments initialization. - */ -void __early_init(void) -{ - /* Make sure ALL RAM banks are powered on */ - *(uint32_t *)NRF_POWER_RAMON_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk; - *(uint32_t *)NRF_POWER_RAMONB_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk; -} - -/** - * @brief Late initialization code. - * @note This initialization is performed after BSS and DATA segments - * initialization and before invoking the main() function. - */ -void boardInit(void) -{ -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.h b/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.h deleted file mode 100644 index 67e1724..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* Board identifier. */ -#define BOARD_NRF51_DK -#define BOARD_NAME "nRF51 DK" - -/* Board oscillators-related settings. */ -#define NRF51_XTAL_VALUE 16000000 -#define NRF51_LFCLK_SOURCE 1 - -/* GPIO pins. */ -#define BTN1 17 -#define BTN2 18 -#define BTN3 19 -#define BTN4 20 -#define LED1 21 -#define LED2 22 -#define LED3 23 -#define LED4 24 -#define UART_RTS 8 -#define UART_TX 9 -#define UART_CTS 10 -#define UART_RX 11 -#define SPI_SCK 29 -#define SPI_MOSI 25 -#define SPI_MISO 28 -#define SPI_SS 24 -#define I2C_SCL 7 -#define I2C_SDA 30 -#define AIN0 26 -#define AIN1 27 -#define AIN2 1 -#define AIN3 2 -#define AIN4 3 -#define AIN5 4 -#define AIN6 5 -#define AIN7 6 -#define AREF0 0 -#define AREF1 6 - -/* - * IO pins assignments. - */ -#define IOPORT1_BTN1 17U -#define IOPORT1_BTN2 18U -#define IOPORT1_BTN3 19U -#define IOPORT1_BTN4 20U -#define IOPORT1_LED1 21U -#define IOPORT1_LED2 22U -#define IOPORT1_LED3 23U -#define IOPORT1_LED4 24U -#define IOPORT1_UART_RTS 8U -#define IOPORT1_UART_TX 9U -#define IOPORT1_UART_CTS 10U -#define IOPORT1_UART_RX 11U -#define IOPORT1_SPI_SCK 29U -#define IOPORT1_SPI_MOSI 25U -#define IOPORT1_SPI_MISO 28U -#define IOPORT1_SPI_SS 24U -#define IOPORT1_I2C_SCL 7U -#define IOPORT1_I2C_SDA 30U -#define IOPORT1_A0 1U -#define IOPORT1_A1 2U -#define IOPORT1_A2 3U -#define IOPORT1_A3 4U -#define IOPORT1_A4 5U -#define IOPORT1_A5 6U -#define IOPORT1_AIN0 26U -#define IOPORT1_AIN1 27U -#define IOPORT1_AIN2 1U -#define IOPORT1_AIN3 2U -#define IOPORT1_AIN4 3U -#define IOPORT1_AIN5 4U -#define IOPORT1_AIN6 5U -#define IOPORT1_AIN7 6U -#define IOPORT1_AREF0 0U -#define IOPORT1_AREF1 6U - -/* - * IO lines assignments. - */ -#define LINE_BTN1 PAL_LINE(IOPORT1, IOPORT1_BTN1) -#define LINE_BTN2 PAL_LINE(IOPORT1, IOPORT1_BTN2) -#define LINE_BTN3 PAL_LINE(IOPORT1, IOPORT1_BTN3) -#define LINE_BTN4 PAL_LINE(IOPORT1, IOPORT1_BTN4) -#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1) -#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2) -#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3) -#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4) -#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS) -#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX) -#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS) -#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX) -#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK) -#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI) -#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO) -#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS) -#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL) -#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA) -#define LINE_A0 PAL_LINE(IOPORT1, IOPORT1_A0) -#define LINE_A1 PAL_LINE(IOPORT1, IOPORT1_A1) -#define LINE_A2 PAL_LINE(IOPORT1, IOPORT1_A2) -#define LINE_A3 PAL_LINE(IOPORT1, IOPORT1_A3) -#define LINE_A4 PAL_LINE(IOPORT1, IOPORT1_A4) -#define LINE_A5 PAL_LINE(IOPORT1, IOPORT1_A5) -#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) -#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) -#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) -#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) -#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) -#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) -#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) -#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) -#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) -#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) - - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.mk deleted file mode 100644 index 9619bd4..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/NRF51-DK/board.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK/board.c - -# Required include directories -BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK - -# Flash -JLINK_DEVICE = nrf51422 -JLINK_PRE_FLASH = w4 4001e504 1 -JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100 - diff --git a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.c b/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.c deleted file mode 100644 index 85e4486..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - Copyright (C) 2016 flabbergast - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = -{ - .pads = { - PAL_MODE_OUTPUT_PUSHPULL, /* P0.0: PIN11 (AREF0) */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.1: PIN9 (AIN2) */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.2: PIN10 (AIN3) */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.3: LED_BLUE */ - PAL_MODE_UNCONNECTED, /* P0.4 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.5: LED_GREEN */ - PAL_MODE_UNCONNECTED, /* P0.6 */ - PAL_MODE_UNCONNECTED, /* P0.7 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.8: LED_RED */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.9: PIN7 */ - PAL_MODE_UNCONNECTED, /* P0.10 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.11: PIN6 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.12: PIN5 */ - PAL_MODE_UNCONNECTED, /* P0.13 */ - PAL_MODE_UNCONNECTED, /* P0.14 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.15: PIN4 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.16: PIN3 */ - PAL_MODE_UNCONNECTED, /* P0.17 */ - PAL_MODE_INPUT_PULLUP, /* P0.18: PIN2 (RX) */ - PAL_MODE_UNCONNECTED, /* P0.19 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.20: PIN1 (TX) */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.21: PIN15 */ - PAL_MODE_UNCONNECTED, /* P0.22 */ - PAL_MODE_UNCONNECTED, /* P0.23 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: PIN14 */ - PAL_MODE_UNCONNECTED, /* P0.25 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.26: PIN13 (LFXTL) (AIN0) */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.27: PIN12 (LFXTL) (AIN1) */ - PAL_MODE_UNCONNECTED, /* P0.28 */ - PAL_MODE_UNCONNECTED, /* P0.29 */ - PAL_MODE_UNCONNECTED, /* P0.30 */ - PAL_MODE_UNCONNECTED, /* P0.31 */ - }, -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization is performed just after reset before BSS and - * DATA segments initialization. - */ -void __early_init(void) -{ -} - -/** - * @brief Late initialization code. - * @note This initialization is performed after BSS and DATA segments - * initialization and before invoking the main() function. - */ -void boardInit(void) -{ -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.h b/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.h deleted file mode 100644 index e3bbb0b..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - Copyright (C) 2016 flabbergast - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* Board identifier. */ -#define BOARD_OSHCHIP_V10 -#define BOARD_NAME "OSHChip_V1.0" - -/* Board oscillators-related settings. */ -#define NRF51_XTAL_VALUE 16000000 - -/* Non-header GPIO pins. */ -#define LED_RED 8 -#define LED_GREEN 5 -#define LED_BLUE 3 - -/* Common peripheral GPIO pins. */ -#define UART_TX 20 -#define UART_RX 18 - -/* GPIO on DIP pins. */ -#define OSHCHIP_PIN1 20 -#define OSHCHIP_PIN2 18 -#define OSHCHIP_PIN3 16 -#define OSHCHIP_PIN4 15 -#define OSHCHIP_PIN5 12 -#define OSHCHIP_PIN6 11 -#define OSHCHIP_PIN7 9 -/* Pin 8 is GND */ -#define OSHCHIP_PIN9 1 -#define OSHCHIP_PIN10 2 -#define OSHCHIP_PIN11 0 -#define OSHCHIP_PIN12 27 -#define OSHCHIP_PIN13 26 -#define OSHCHIP_PIN14 24 -#define OSHCHIP_PIN15 21 -/* Pin 16 is VCC */ - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.mk deleted file mode 100644 index 08afdbd..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/OSHCHIP_V1.0/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/OSHCHIP_V1.0/board.c - -# Required include directories -BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/OSHCHIP_V1.0 diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.c b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.c deleted file mode 100644 index f89c7e5..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.c +++ /dev/null @@ -1,183 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- /*
- * PORTA setup.
- *
- * PTA4 - PIN33
- * PTA5 - PIN24
- * PTA12 - PIN3
- * PTA13 - PIN4
- *
- * PTA18/19 crystal
- * PTA0/3 SWD
- */
- .port = IOPORT1,
- .pads = {
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_INPUT_ANALOG, PAL_MODE_INPUT_ANALOG, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTB setup.
- *
- * PTB0 - PIN16
- * PTB1 - PIN17
- * PTB2 - PIN19
- * PTB3 - PIN18
- * PTB16 - PIN0 - UART0_TX
- * PTB17 - PIN1 - UART0_RX
- * PTB18 - PIN32
- * PTB19 - PIN25
- */
- .port = IOPORT2,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTC setup.
- *
- * PTC0 - PIN15
- * PTC1 - PIN22
- * PTC2 - PIN23
- * PTC3 - PIN9
- * PTC4 - PIN10
- * PTC5 - PIN13
- * PTC6 - PIN11
- * PTC7 - PIN12
- * PTC8 - PIN28
- * PTC9 - PIN27
- * PTC10 - PIN29
- * PTC11 - PIN30
- */
- .port = IOPORT3,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTD setup.
- *
- * PTD0 - PIN2
- * PTD1 - PIN14
- * PTD2 - PIN7
- * PTD3 - PIN8
- * PTD4 - PIN6
- * PTD5 - PIN20
- * PTD6 - PIN21
- * PTD7 - PIN5
- */
- .port = IOPORT4,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTE setup.
- *
- * PTE0 - PIN31
- * PTE1 - PIN26
- */
- .port = IOPORT5,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- k20x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.h b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.h deleted file mode 100644 index f3e7383..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.h +++ /dev/null @@ -1,295 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for the PJRC Teensy 3.0 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_PJRC_TEENSY_3
-#define BOARD_NAME "PJRC Teensy 3.0"
-
-/* External 16 MHz crystal */
-#define KINETIS_XTAL_FREQUENCY 16000000UL
-
-/* Use internal capacitors for the crystal */
-#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P|OSC_CR_SC2P
-
-/*
- * MCU type
- */
-#define K20x5
-
-/*
- * IO pins assignments.
- */
-#define PORTA_PIN0 0
-#define PORTA_PIN1 1
-#define PORTA_PIN2 2
-#define PORTA_PIN3 3
-#define TEENSY_PIN33 4
-#define TEENSY_PIN24 5
-#define PORTA_PIN6 6
-#define PORTA_PIN7 7
-#define PORTA_PIN8 8
-#define PORTA_PIN9 9
-#define PORTA_PIN10 10
-#define PORTA_PIN11 11
-#define TEENSY_PIN3 12
-#define TEENSY_PIN4 13
-#define PORTA_PIN14 14
-#define PORTA_PIN15 15
-#define PORTA_PIN16 16
-#define PORTA_PIN17 17
-#define PORTA_PIN18 18
-#define PORTA_PIN19 19
-#define PORTA_PIN20 20
-#define PORTA_PIN21 21
-#define PORTA_PIN22 22
-#define PORTA_PIN23 23
-#define PORTA_PIN24 24
-#define PORTA_PIN25 25
-#define PORTA_PIN26 26
-#define PORTA_PIN27 27
-#define PORTA_PIN28 28
-#define PORTA_PIN29 29
-#define PORTA_PIN30 30
-#define PORTA_PIN31 31
-
-#define TEENSY_PIN3_IOPORT IOPORT1
-#define TEENSY_PIN4_IOPORT IOPORT1
-#define TEENSY_PIN24_IOPORT IOPORT1
-#define TEENSY_PIN33_IOPORT IOPORT1
-
-#define TEENSY_PIN16 0
-#define TEENSY_PIN17 1
-#define TEENSY_PIN19 2
-#define TEENSY_PIN18 3
-#define PORTB_PIN4 4
-#define PORTB_PIN5 5
-#define PORTB_PIN6 6
-#define PORTB_PIN7 7
-#define PORTB_PIN8 8
-#define PORTB_PIN9 9
-#define PORTB_PIN10 10
-#define PORTB_PIN11 11
-#define PORTB_PIN12 12
-#define PORTB_PIN13 13
-#define PORTB_PIN14 14
-#define PORTB_PIN15 15
-#define TEENSY_PIN0 16
-#define TEENSY_PIN1 17
-#define TEENSY_PIN32 18
-#define TEENSY_PIN25 19
-#define PORTB_PIN20 20
-#define PORTB_PIN21 21
-#define PORTB_PIN22 22
-#define PORTB_PIN23 23
-#define PORTB_PIN24 24
-#define PORTB_PIN25 25
-#define PORTB_PIN26 26
-#define PORTB_PIN27 27
-#define PORTB_PIN28 28
-#define PORTB_PIN29 29
-#define PORTB_PIN30 30
-#define PORTB_PIN31 31
-
-#define TEENSY_PIN0_IOPORT IOPORT2
-#define TEENSY_PIN1_IOPORT IOPORT2
-#define TEENSY_PIN16_IOPORT IOPORT2
-#define TEENSY_PIN17_IOPORT IOPORT2
-#define TEENSY_PIN18_IOPORT IOPORT2
-#define TEENSY_PIN19_IOPORT IOPORT2
-#define TEENSY_PIN25_IOPORT IOPORT2
-#define TEENSY_PIN32_IOPORT IOPORT2
-
-#define TEENSY_PIN15 0
-#define TEENSY_PIN22 1
-#define TEENSY_PIN23 2
-#define TEENSY_PIN9 3
-#define TEENSY_PIN10 4
-#define TEENSY_PIN13 5
-#define TEENSY_PIN11 6
-#define TEENSY_PIN12 7
-#define TEENSY_PIN28 8
-#define TEENSY_PIN27 9
-#define TEENSY_PIN29 10
-#define TEENSY_PIN30 11
-#define PORTC_PIN12 12
-#define PORTC_PIN13 13
-#define PORTC_PIN14 14
-#define PORTC_PIN15 15
-#define PORTC_PIN16 16
-#define PORTC_PIN17 17
-#define PORTC_PIN18 18
-#define PORTC_PIN19 19
-#define PORTC_PIN20 20
-#define PORTC_PIN21 21
-#define PORTC_PIN22 22
-#define PORTC_PIN23 23
-#define PORTC_PIN24 24
-#define PORTC_PIN25 25
-#define PORTC_PIN26 26
-#define PORTC_PIN27 27
-#define PORTC_PIN28 28
-#define PORTC_PIN29 29
-#define PORTC_PIN30 30
-#define PORTC_PIN31 31
-
-#define TEENSY_PIN9_IOPORT IOPORT3
-#define TEENSY_PIN10_IOPORT IOPORT3
-#define TEENSY_PIN11_IOPORT IOPORT3
-#define TEENSY_PIN12_IOPORT IOPORT3
-#define TEENSY_PIN13_IOPORT IOPORT3
-#define TEENSY_PIN15_IOPORT IOPORT3
-#define TEENSY_PIN22_IOPORT IOPORT3
-#define TEENSY_PIN23_IOPORT IOPORT3
-#define TEENSY_PIN27_IOPORT IOPORT3
-#define TEENSY_PIN28_IOPORT IOPORT3
-#define TEENSY_PIN29_IOPORT IOPORT3
-#define TEENSY_PIN30_IOPORT IOPORT3
-
-#define TEENSY_PIN2 0
-#define TEENSY_PIN14 1
-#define TEENSY_PIN7 2
-#define TEENSY_PIN8 3
-#define TEENSY_PIN6 4
-#define TEENSY_PIN20 5
-#define TEENSY_PIN21 6
-#define TEENSY_PIN5 7
-#define PORTD_PIN8 8
-#define PORTD_PIN9 9
-#define PORTD_PIN10 10
-#define PORTD_PIN11 11
-#define PORTD_PIN12 12
-#define PORTD_PIN13 13
-#define PORTD_PIN14 14
-#define PORTD_PIN15 15
-#define PORTD_PIN16 16
-#define PORTD_PIN17 17
-#define PORTD_PIN18 18
-#define PORTD_PIN19 19
-#define PORTD_PIN20 20
-#define PORTD_PIN21 21
-#define PORTD_PIN22 22
-#define PORTD_PIN23 23
-#define PORTD_PIN24 24
-#define PORTD_PIN25 25
-#define PORTD_PIN26 26
-#define PORTD_PIN27 27
-#define PORTD_PIN28 28
-#define PORTD_PIN29 29
-#define PORTD_PIN30 30
-#define PORTD_PIN31 31
-
-#define TEENSY_PIN2_IOPORT IOPORT4
-#define TEENSY_PIN5_IOPORT IOPORT4
-#define TEENSY_PIN6_IOPORT IOPORT4
-#define TEENSY_PIN7_IOPORT IOPORT4
-#define TEENSY_PIN8_IOPORT IOPORT4
-#define TEENSY_PIN14_IOPORT IOPORT4
-#define TEENSY_PIN20_IOPORT IOPORT4
-#define TEENSY_PIN21_IOPORT IOPORT4
-
-#define TEENSY_PIN31 0
-#define TEENSY_PIN26 1
-#define PORTE_PIN2 2
-#define PORTE_PIN3 3
-#define PORTE_PIN4 4
-#define PORTE_PIN5 5
-#define PORTE_PIN6 6
-#define PORTE_PIN7 7
-#define PORTE_PIN8 8
-#define PORTE_PIN9 9
-#define PORTE_PIN10 10
-#define PORTE_PIN11 11
-#define PORTE_PIN12 12
-#define PORTE_PIN13 13
-#define PORTE_PIN14 14
-#define PORTE_PIN15 15
-#define PORTE_PIN16 16
-#define PORTE_PIN17 17
-#define PORTE_PIN18 18
-#define PORTE_PIN19 19
-#define PORTE_PIN20 20
-#define PORTE_PIN21 21
-#define PORTE_PIN22 22
-#define PORTE_PIN23 23
-#define PORTE_PIN24 24
-#define PORTE_PIN25 25
-#define PORTE_PIN26 26
-#define PORTE_PIN27 27
-#define PORTE_PIN28 28
-#define PORTE_PIN29 29
-#define PORTE_PIN30 30
-#define PORTE_PIN31 31
-
-#define TEENSY_PIN26_IOPORT IOPORT5
-#define TEENSY_PIN31_IOPORT IOPORT5
-
-#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1)
-#define LINE_PIN2 PAL_LINE(TEENSY_PIN2_IOPORT, TEENSY_PIN2)
-#define LINE_PIN3 PAL_LINE(TEENSY_PIN3_IOPORT, TEENSY_PIN3)
-#define LINE_PIN4 PAL_LINE(TEENSY_PIN4_IOPORT, TEENSY_PIN4)
-#define LINE_PIN5 PAL_LINE(TEENSY_PIN5_IOPORT, TEENSY_PIN5)
-#define LINE_PIN6 PAL_LINE(TEENSY_PIN6_IOPORT, TEENSY_PIN6)
-#define LINE_PIN7 PAL_LINE(TEENSY_PIN7_IOPORT, TEENSY_PIN7)
-#define LINE_PIN8 PAL_LINE(TEENSY_PIN8_IOPORT, TEENSY_PIN8)
-#define LINE_PIN9 PAL_LINE(TEENSY_PIN9_IOPORT, TEENSY_PIN9)
-#define LINE_PIN10 PAL_LINE(TEENSY_PIN10_IOPORT, TEENSY_PIN10)
-#define LINE_PIN11 PAL_LINE(TEENSY_PIN11_IOPORT, TEENSY_PIN11)
-#define LINE_PIN12 PAL_LINE(TEENSY_PIN12_IOPORT, TEENSY_PIN12)
-#define LINE_PIN13 PAL_LINE(TEENSY_PIN13_IOPORT, TEENSY_PIN13)
-#define LINE_PIN14 PAL_LINE(TEENSY_PIN14_IOPORT, TEENSY_PIN14)
-#define LINE_PIN15 PAL_LINE(TEENSY_PIN15_IOPORT, TEENSY_PIN15)
-#define LINE_PIN16 PAL_LINE(TEENSY_PIN16_IOPORT, TEENSY_PIN16)
-#define LINE_PIN17 PAL_LINE(TEENSY_PIN17_IOPORT, TEENSY_PIN17)
-#define LINE_PIN18 PAL_LINE(TEENSY_PIN18_IOPORT, TEENSY_PIN18)
-#define LINE_PIN19 PAL_LINE(TEENSY_PIN19_IOPORT, TEENSY_PIN19)
-#define LINE_PIN20 PAL_LINE(TEENSY_PIN20_IOPORT, TEENSY_PIN20)
-#define LINE_PIN21 PAL_LINE(TEENSY_PIN21_IOPORT, TEENSY_PIN21)
-#define LINE_PIN22 PAL_LINE(TEENSY_PIN22_IOPORT, TEENSY_PIN22)
-#define LINE_PIN23 PAL_LINE(TEENSY_PIN23_IOPORT, TEENSY_PIN23)
-#define LINE_PIN24 PAL_LINE(TEENSY_PIN24_IOPORT, TEENSY_PIN24)
-#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25)
-#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25)
-#define LINE_PIN26 PAL_LINE(TEENSY_PIN26_IOPORT, TEENSY_PIN26)
-#define LINE_PIN27 PAL_LINE(TEENSY_PIN27_IOPORT, TEENSY_PIN27)
-#define LINE_PIN28 PAL_LINE(TEENSY_PIN28_IOPORT, TEENSY_PIN28)
-#define LINE_PIN29 PAL_LINE(TEENSY_PIN29_IOPORT, TEENSY_PIN29)
-#define LINE_PIN30 PAL_LINE(TEENSY_PIN30_IOPORT, TEENSY_PIN30)
-#define LINE_PIN31 PAL_LINE(TEENSY_PIN31_IOPORT, TEENSY_PIN31)
-#define LINE_PIN32 PAL_LINE(TEENSY_PIN32_IOPORT, TEENSY_PIN32)
-#define LINE_PIN33 PAL_LINE(TEENSY_PIN33_IOPORT, TEENSY_PIN33)
-
-#define LINE_LED LINE_PIN13
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.mk deleted file mode 100644 index b9dcdc8..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.c b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.c deleted file mode 100644 index d60a89c..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.c +++ /dev/null @@ -1,183 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- /*
- * PORTA setup.
- *
- * PTA4 - PIN33
- * PTA5 - PIN24
- * PTA12 - PIN3
- * PTA13 - PIN4
- *
- * PTA18/19 crystal
- * PTA0/3 SWD
- */
- .port = IOPORT1,
- .pads = {
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_INPUT_ANALOG, PAL_MODE_INPUT_ANALOG, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTB setup.
- *
- * PTB0 - PIN16
- * PTB1 - PIN17
- * PTB2 - PIN19
- * PTB3 - PIN18
- * PTB16 - PIN0 - UART0_TX
- * PTB17 - PIN1 - UART0_RX
- * PTB18 - PIN32
- * PTB19 - PIN25
- */
- .port = IOPORT2,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTC setup.
- *
- * PTC0 - PIN15
- * PTC1 - PIN22
- * PTC2 - PIN23
- * PTC3 - PIN9
- * PTC4 - PIN10
- * PTC5 - PIN13
- * PTC6 - PIN11
- * PTC7 - PIN12
- * PTC8 - PIN28
- * PTC9 - PIN27
- * PTC10 - PIN29
- * PTC11 - PIN30
- */
- .port = IOPORT3,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTD setup.
- *
- * PTD0 - PIN2
- * PTD1 - PIN14
- * PTD2 - PIN7
- * PTD3 - PIN8
- * PTD4 - PIN6
- * PTD5 - PIN20
- * PTD6 - PIN21
- * PTD7 - PIN5
- */
- .port = IOPORT4,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTE setup.
- *
- * PTE0 - PIN31
- * PTE1 - PIN26
- */
- .port = IOPORT5,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- k20x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.h b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.h deleted file mode 100644 index 76a52b7..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.h +++ /dev/null @@ -1,295 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2015 RedoX https://github.com/RedoXyde
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for the PJRC Teensy 3.1 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_PJRC_TEENSY_3_1
-#define BOARD_NAME "PJRC Teensy 3.1"
-
-/* External 16 MHz crystal */
-#define KINETIS_XTAL_FREQUENCY 16000000UL
-
-/* Use internal capacitors for the crystal */
-#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P|OSC_CR_SC2P
-
-/*
- * MCU type
- */
-#define K20x7
-
-/*
- * IO pins assignments.
- */
-#define PORTA_PIN0 0
-#define PORTA_PIN1 1
-#define PORTA_PIN2 2
-#define PORTA_PIN3 3
-#define TEENSY_PIN33 4
-#define TEENSY_PIN24 5
-#define PORTA_PIN6 6
-#define PORTA_PIN7 7
-#define PORTA_PIN8 8
-#define PORTA_PIN9 9
-#define PORTA_PIN10 10
-#define PORTA_PIN11 11
-#define TEENSY_PIN3 12
-#define TEENSY_PIN4 13
-#define PORTA_PIN14 14
-#define PORTA_PIN15 15
-#define PORTA_PIN16 16
-#define PORTA_PIN17 17
-#define PORTA_PIN18 18
-#define PORTA_PIN19 19
-#define PORTA_PIN20 20
-#define PORTA_PIN21 21
-#define PORTA_PIN22 22
-#define PORTA_PIN23 23
-#define PORTA_PIN24 24
-#define PORTA_PIN25 25
-#define PORTA_PIN26 26
-#define PORTA_PIN27 27
-#define PORTA_PIN28 28
-#define PORTA_PIN29 29
-#define PORTA_PIN30 30
-#define PORTA_PIN31 31
-
-#define TEENSY_PIN3_IOPORT IOPORT1
-#define TEENSY_PIN4_IOPORT IOPORT1
-#define TEENSY_PIN24_IOPORT IOPORT1
-#define TEENSY_PIN33_IOPORT IOPORT1
-
-#define TEENSY_PIN16 0
-#define TEENSY_PIN17 1
-#define TEENSY_PIN19 2
-#define TEENSY_PIN18 3
-#define PORTB_PIN4 4
-#define PORTB_PIN5 5
-#define PORTB_PIN6 6
-#define PORTB_PIN7 7
-#define PORTB_PIN8 8
-#define PORTB_PIN9 9
-#define PORTB_PIN10 10
-#define PORTB_PIN11 11
-#define PORTB_PIN12 12
-#define PORTB_PIN13 13
-#define PORTB_PIN14 14
-#define PORTB_PIN15 15
-#define TEENSY_PIN0 16
-#define TEENSY_PIN1 17
-#define TEENSY_PIN32 18
-#define TEENSY_PIN25 19
-#define PORTB_PIN20 20
-#define PORTB_PIN21 21
-#define PORTB_PIN22 22
-#define PORTB_PIN23 23
-#define PORTB_PIN24 24
-#define PORTB_PIN25 25
-#define PORTB_PIN26 26
-#define PORTB_PIN27 27
-#define PORTB_PIN28 28
-#define PORTB_PIN29 29
-#define PORTB_PIN30 30
-#define PORTB_PIN31 31
-
-#define TEENSY_PIN0_IOPORT IOPORT2
-#define TEENSY_PIN1_IOPORT IOPORT2
-#define TEENSY_PIN16_IOPORT IOPORT2
-#define TEENSY_PIN17_IOPORT IOPORT2
-#define TEENSY_PIN18_IOPORT IOPORT2
-#define TEENSY_PIN19_IOPORT IOPORT2
-#define TEENSY_PIN25_IOPORT IOPORT2
-#define TEENSY_PIN32_IOPORT IOPORT2
-
-#define TEENSY_PIN15 0
-#define TEENSY_PIN22 1
-#define TEENSY_PIN23 2
-#define TEENSY_PIN9 3
-#define TEENSY_PIN10 4
-#define TEENSY_PIN13 5
-#define TEENSY_PIN11 6
-#define TEENSY_PIN12 7
-#define TEENSY_PIN28 8
-#define TEENSY_PIN27 9
-#define TEENSY_PIN29 10
-#define TEENSY_PIN30 11
-#define PORTC_PIN12 12
-#define PORTC_PIN13 13
-#define PORTC_PIN14 14
-#define PORTC_PIN15 15
-#define PORTC_PIN16 16
-#define PORTC_PIN17 17
-#define PORTC_PIN18 18
-#define PORTC_PIN19 19
-#define PORTC_PIN20 20
-#define PORTC_PIN21 21
-#define PORTC_PIN22 22
-#define PORTC_PIN23 23
-#define PORTC_PIN24 24
-#define PORTC_PIN25 25
-#define PORTC_PIN26 26
-#define PORTC_PIN27 27
-#define PORTC_PIN28 28
-#define PORTC_PIN29 29
-#define PORTC_PIN30 30
-#define PORTC_PIN31 31
-
-#define TEENSY_PIN9_IOPORT IOPORT3
-#define TEENSY_PIN10_IOPORT IOPORT3
-#define TEENSY_PIN11_IOPORT IOPORT3
-#define TEENSY_PIN12_IOPORT IOPORT3
-#define TEENSY_PIN13_IOPORT IOPORT3
-#define TEENSY_PIN15_IOPORT IOPORT3
-#define TEENSY_PIN22_IOPORT IOPORT3
-#define TEENSY_PIN23_IOPORT IOPORT3
-#define TEENSY_PIN27_IOPORT IOPORT3
-#define TEENSY_PIN28_IOPORT IOPORT3
-#define TEENSY_PIN29_IOPORT IOPORT3
-#define TEENSY_PIN30_IOPORT IOPORT3
-
-#define TEENSY_PIN2 0
-#define TEENSY_PIN14 1
-#define TEENSY_PIN7 2
-#define TEENSY_PIN8 3
-#define TEENSY_PIN6 4
-#define TEENSY_PIN20 5
-#define TEENSY_PIN21 6
-#define TEENSY_PIN5 7
-#define PORTD_PIN8 8
-#define PORTD_PIN9 9
-#define PORTD_PIN10 10
-#define PORTD_PIN11 11
-#define PORTD_PIN12 12
-#define PORTD_PIN13 13
-#define PORTD_PIN14 14
-#define PORTD_PIN15 15
-#define PORTD_PIN16 16
-#define PORTD_PIN17 17
-#define PORTD_PIN18 18
-#define PORTD_PIN19 19
-#define PORTD_PIN20 20
-#define PORTD_PIN21 21
-#define PORTD_PIN22 22
-#define PORTD_PIN23 23
-#define PORTD_PIN24 24
-#define PORTD_PIN25 25
-#define PORTD_PIN26 26
-#define PORTD_PIN27 27
-#define PORTD_PIN28 28
-#define PORTD_PIN29 29
-#define PORTD_PIN30 30
-#define PORTD_PIN31 31
-
-#define TEENSY_PIN2_IOPORT IOPORT4
-#define TEENSY_PIN5_IOPORT IOPORT4
-#define TEENSY_PIN6_IOPORT IOPORT4
-#define TEENSY_PIN7_IOPORT IOPORT4
-#define TEENSY_PIN8_IOPORT IOPORT4
-#define TEENSY_PIN14_IOPORT IOPORT4
-#define TEENSY_PIN20_IOPORT IOPORT4
-#define TEENSY_PIN21_IOPORT IOPORT4
-
-#define TEENSY_PIN31 0
-#define TEENSY_PIN26 1
-#define PORTE_PIN2 2
-#define PORTE_PIN3 3
-#define PORTE_PIN4 4
-#define PORTE_PIN5 5
-#define PORTE_PIN6 6
-#define PORTE_PIN7 7
-#define PORTE_PIN8 8
-#define PORTE_PIN9 9
-#define PORTE_PIN10 10
-#define PORTE_PIN11 11
-#define PORTE_PIN12 12
-#define PORTE_PIN13 13
-#define PORTE_PIN14 14
-#define PORTE_PIN15 15
-#define PORTE_PIN16 16
-#define PORTE_PIN17 17
-#define PORTE_PIN18 18
-#define PORTE_PIN19 19
-#define PORTE_PIN20 20
-#define PORTE_PIN21 21
-#define PORTE_PIN22 22
-#define PORTE_PIN23 23
-#define PORTE_PIN24 24
-#define PORTE_PIN25 25
-#define PORTE_PIN26 26
-#define PORTE_PIN27 27
-#define PORTE_PIN28 28
-#define PORTE_PIN29 29
-#define PORTE_PIN30 30
-#define PORTE_PIN31 31
-
-#define TEENSY_PIN26_IOPORT IOPORT5
-#define TEENSY_PIN31_IOPORT IOPORT5
-
-#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1)
-#define LINE_PIN2 PAL_LINE(TEENSY_PIN2_IOPORT, TEENSY_PIN2)
-#define LINE_PIN3 PAL_LINE(TEENSY_PIN3_IOPORT, TEENSY_PIN3)
-#define LINE_PIN4 PAL_LINE(TEENSY_PIN4_IOPORT, TEENSY_PIN4)
-#define LINE_PIN5 PAL_LINE(TEENSY_PIN5_IOPORT, TEENSY_PIN5)
-#define LINE_PIN6 PAL_LINE(TEENSY_PIN6_IOPORT, TEENSY_PIN6)
-#define LINE_PIN7 PAL_LINE(TEENSY_PIN7_IOPORT, TEENSY_PIN7)
-#define LINE_PIN8 PAL_LINE(TEENSY_PIN8_IOPORT, TEENSY_PIN8)
-#define LINE_PIN9 PAL_LINE(TEENSY_PIN9_IOPORT, TEENSY_PIN9)
-#define LINE_PIN10 PAL_LINE(TEENSY_PIN10_IOPORT, TEENSY_PIN10)
-#define LINE_PIN11 PAL_LINE(TEENSY_PIN11_IOPORT, TEENSY_PIN11)
-#define LINE_PIN12 PAL_LINE(TEENSY_PIN12_IOPORT, TEENSY_PIN12)
-#define LINE_PIN13 PAL_LINE(TEENSY_PIN13_IOPORT, TEENSY_PIN13)
-#define LINE_PIN14 PAL_LINE(TEENSY_PIN14_IOPORT, TEENSY_PIN14)
-#define LINE_PIN15 PAL_LINE(TEENSY_PIN15_IOPORT, TEENSY_PIN15)
-#define LINE_PIN16 PAL_LINE(TEENSY_PIN16_IOPORT, TEENSY_PIN16)
-#define LINE_PIN17 PAL_LINE(TEENSY_PIN17_IOPORT, TEENSY_PIN17)
-#define LINE_PIN18 PAL_LINE(TEENSY_PIN18_IOPORT, TEENSY_PIN18)
-#define LINE_PIN19 PAL_LINE(TEENSY_PIN19_IOPORT, TEENSY_PIN19)
-#define LINE_PIN20 PAL_LINE(TEENSY_PIN20_IOPORT, TEENSY_PIN20)
-#define LINE_PIN21 PAL_LINE(TEENSY_PIN21_IOPORT, TEENSY_PIN21)
-#define LINE_PIN22 PAL_LINE(TEENSY_PIN22_IOPORT, TEENSY_PIN22)
-#define LINE_PIN23 PAL_LINE(TEENSY_PIN23_IOPORT, TEENSY_PIN23)
-#define LINE_PIN24 PAL_LINE(TEENSY_PIN24_IOPORT, TEENSY_PIN24)
-#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25)
-#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25)
-#define LINE_PIN26 PAL_LINE(TEENSY_PIN26_IOPORT, TEENSY_PIN26)
-#define LINE_PIN27 PAL_LINE(TEENSY_PIN27_IOPORT, TEENSY_PIN27)
-#define LINE_PIN28 PAL_LINE(TEENSY_PIN28_IOPORT, TEENSY_PIN28)
-#define LINE_PIN29 PAL_LINE(TEENSY_PIN29_IOPORT, TEENSY_PIN29)
-#define LINE_PIN30 PAL_LINE(TEENSY_PIN30_IOPORT, TEENSY_PIN30)
-#define LINE_PIN31 PAL_LINE(TEENSY_PIN31_IOPORT, TEENSY_PIN31)
-#define LINE_PIN32 PAL_LINE(TEENSY_PIN32_IOPORT, TEENSY_PIN32)
-#define LINE_PIN33 PAL_LINE(TEENSY_PIN33_IOPORT, TEENSY_PIN33)
-
-#define LINE_LED LINE_PIN13
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.mk deleted file mode 100644 index 572a524..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_3_1/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_1/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_3_1
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.c b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.c deleted file mode 100644 index ab321b8..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.c +++ /dev/null @@ -1,177 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config =
-{
- .ports = {
- {
- /*
- * PORTA setup.
- *
- * PTA1 - PIN3
- * PTA2 - PIN4
- *
- * PTA18/19 crystal
- * PTA0/3 SWD
- */
- .port = IOPORT1,
- .pads = {
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_ALTERNATIVE_7, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_INPUT_ANALOG, PAL_MODE_INPUT_ANALOG, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTB setup.
- *
- * PTB0 - PIN16
- * PTB1 - PIN17
- * PTB2 - PIN19
- * PTB3 - PIN18
- * PTB16 - PIN0 - UART0_TX
- * PTB17 - PIN1 - UART0_RX
- */
- .port = IOPORT2,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_ALTERNATIVE_3, PAL_MODE_ALTERNATIVE_3,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTC setup.
- *
- * PTC0 - PIN15
- * PTC1 - PIN22
- * PTC2 - PIN23
- * PTC3 - PIN9
- * PTC4 - PIN10
- * PTC5 - PIN13
- * PTC6 - PIN11
- * PTC7 - PIN12
- */
- .port = IOPORT3,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTD setup.
- *
- * PTD0 - PIN2
- * PTD1 - PIN14
- * PTD2 - PIN7
- * PTD3 - PIN8
- * PTD4 - PIN6
- * PTD5 - PIN20
- * PTD6 - PIN21
- * PTD7 - PIN5
- */
- .port = IOPORT4,
- .pads = {
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- },
- },
- {
- /*
- * PORTE setup.
- *
- * PTE20 - PIN24
- * PTE21 - PIN25
- * PTE30 - PIN26
- */
- .port = IOPORT5,
- .pads = {
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_OUTPUT_PUSHPULL,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED, PAL_MODE_UNCONNECTED,
- PAL_MODE_OUTPUT_PUSHPULL, PAL_MODE_UNCONNECTED,
- },
- },
- },
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- kl2x_clock_init();
-}
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.h b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.h deleted file mode 100644 index ad75343..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.h +++ /dev/null @@ -1,279 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for the PJRC Teensy LC board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_PJRC_TEENSY_LC
-#define BOARD_NAME "PJRC Teensy LC"
-
-/* External 16 MHz crystal */
-#define KINETIS_XTAL_FREQUENCY 16000000UL
-
-/* Use internal capacitors for the crystal */
-#define KINETIS_BOARD_OSCILLATOR_SETTING OSC_CR_SC8P|OSC_CR_SC2P|OSC_CR_ERCLKEN
-
-/*
- * MCU type
- */
-#define KL26
-
-/*
- * IO pins assignments.
- */
-#define PORTA_PIN0 0
-#define TEENSY_PIN3 1
-#define TEENSY_PIN4 2
-#define PORTA_PIN3 3
-#define PORTA_PIN4 4
-#define PORTA_PIN5 5
-#define PORTA_PIN6 6
-#define PORTA_PIN7 7
-#define PORTA_PIN8 8
-#define PORTA_PIN9 9
-#define PORTA_PIN10 10
-#define PORTA_PIN11 11
-#define PORTA_PIN12 12
-#define PORTA_PIN13 13
-#define PORTA_PIN14 14
-#define PORTA_PIN15 15
-#define PORTA_PIN16 16
-#define PORTA_PIN17 17
-#define PORTA_PIN18 18
-#define PORTA_PIN19 19
-#define PORTA_PIN20 20
-#define PORTA_PIN21 21
-#define PORTA_PIN22 22
-#define PORTA_PIN23 23
-#define PORTA_PIN24 24
-#define PORTA_PIN25 25
-#define PORTA_PIN26 26
-#define PORTA_PIN27 27
-#define PORTA_PIN28 28
-#define PORTA_PIN29 29
-#define PORTA_PIN30 30
-#define PORTA_PIN31 31
-
-#define TEENSY_PIN3_IOPORT IOPORT1
-#define TEENSY_PIN4_IOPORT IOPORT1
-
-#define TEENSY_PIN16 0
-#define TEENSY_PIN17 1
-#define TEENSY_PIN19 2
-#define TEENSY_PIN18 3
-#define PORTB_PIN4 4
-#define PORTB_PIN5 5
-#define PORTB_PIN6 6
-#define PORTB_PIN7 7
-#define PORTB_PIN8 8
-#define PORTB_PIN9 9
-#define PORTB_PIN10 10
-#define PORTB_PIN11 11
-#define PORTB_PIN12 12
-#define PORTB_PIN13 13
-#define PORTB_PIN14 14
-#define PORTB_PIN15 15
-#define TEENSY_PIN0 16
-#define TEENSY_PIN1 17
-#define PORTB_PIN18 18
-#define PORTB_PIN19 19
-#define PORTB_PIN20 20
-#define PORTB_PIN21 21
-#define PORTB_PIN22 22
-#define PORTB_PIN23 23
-#define PORTB_PIN24 24
-#define PORTB_PIN25 25
-#define PORTB_PIN26 26
-#define PORTB_PIN27 27
-#define PORTB_PIN28 28
-#define PORTB_PIN29 29
-#define PORTB_PIN30 30
-#define PORTB_PIN31 31
-
-#define TEENSY_PIN0_IOPORT IOPORT2
-#define TEENSY_PIN1_IOPORT IOPORT2
-#define TEENSY_PIN16_IOPORT IOPORT2
-#define TEENSY_PIN17_IOPORT IOPORT2
-#define TEENSY_PIN18_IOPORT IOPORT2
-#define TEENSY_PIN19_IOPORT IOPORT2
-
-#define TEENSY_PIN15 0
-#define TEENSY_PIN22 1
-#define TEENSY_PIN23 2
-#define TEENSY_PIN9 3
-#define TEENSY_PIN10 4
-#define TEENSY_PIN13 5
-#define TEENSY_PIN11 6
-#define TEENSY_PIN12 7
-#define PORTC_PIN8 8
-#define PORTC_PIN9 9
-#define PORTC_PIN10 10
-#define PORTC_PIN11 11
-#define PORTC_PIN12 12
-#define PORTC_PIN13 13
-#define PORTC_PIN14 14
-#define PORTC_PIN15 15
-#define PORTC_PIN16 16
-#define PORTC_PIN17 17
-#define PORTC_PIN18 18
-#define PORTC_PIN19 19
-#define PORTC_PIN20 20
-#define PORTC_PIN21 21
-#define PORTC_PIN22 22
-#define PORTC_PIN23 23
-#define PORTC_PIN24 24
-#define PORTC_PIN25 25
-#define PORTC_PIN26 26
-#define PORTC_PIN27 27
-#define PORTC_PIN28 28
-#define PORTC_PIN29 29
-#define PORTC_PIN30 30
-#define PORTC_PIN31 31
-
-#define TEENSY_PIN9_IOPORT IOPORT3
-#define TEENSY_PIN10_IOPORT IOPORT3
-#define TEENSY_PIN11_IOPORT IOPORT3
-#define TEENSY_PIN12_IOPORT IOPORT3
-#define TEENSY_PIN13_IOPORT IOPORT3
-#define TEENSY_PIN15_IOPORT IOPORT3
-#define TEENSY_PIN22_IOPORT IOPORT3
-#define TEENSY_PIN23_IOPORT IOPORT3
-
-#define TEENSY_PIN2 0
-#define TEENSY_PIN14 1
-#define TEENSY_PIN7 2
-#define TEENSY_PIN8 3
-#define TEENSY_PIN6 4
-#define TEENSY_PIN20 5
-#define TEENSY_PIN21 6
-#define TEENSY_PIN5 7
-#define PORTD_PIN8 8
-#define PORTD_PIN9 9
-#define PORTD_PIN10 10
-#define PORTD_PIN11 11
-#define PORTD_PIN12 12
-#define PORTD_PIN13 13
-#define PORTD_PIN14 14
-#define PORTD_PIN15 15
-#define PORTD_PIN16 16
-#define PORTD_PIN17 17
-#define PORTD_PIN18 18
-#define PORTD_PIN19 19
-#define PORTD_PIN20 20
-#define PORTD_PIN21 21
-#define PORTD_PIN22 22
-#define PORTD_PIN23 23
-#define PORTD_PIN24 24
-#define PORTD_PIN25 25
-#define PORTD_PIN26 26
-#define PORTD_PIN27 27
-#define PORTD_PIN28 28
-#define PORTD_PIN29 29
-#define PORTD_PIN30 30
-#define PORTD_PIN31 31
-
-#define TEENSY_PIN2_IOPORT IOPORT4
-#define TEENSY_PIN5_IOPORT IOPORT4
-#define TEENSY_PIN6_IOPORT IOPORT4
-#define TEENSY_PIN7_IOPORT IOPORT4
-#define TEENSY_PIN8_IOPORT IOPORT4
-#define TEENSY_PIN14_IOPORT IOPORT4
-#define TEENSY_PIN20_IOPORT IOPORT4
-#define TEENSY_PIN21_IOPORT IOPORT4
-
-#define PORTE_PIN0 0
-#define PORTE_PIN1 1
-#define PORTE_PIN2 2
-#define PORTE_PIN3 3
-#define PORTE_PIN4 4
-#define PORTE_PIN5 5
-#define PORTE_PIN6 6
-#define PORTE_PIN7 7
-#define PORTE_PIN8 8
-#define PORTE_PIN9 9
-#define PORTE_PIN10 10
-#define PORTE_PIN11 11
-#define PORTE_PIN12 12
-#define PORTE_PIN13 13
-#define PORTE_PIN14 14
-#define PORTE_PIN15 15
-#define PORTE_PIN16 16
-#define PORTE_PIN17 17
-#define PORTE_PIN18 18
-#define PORTE_PIN19 19
-#define TEENSY_PIN24 20
-#define TEENSY_PIN25 21
-#define PORTE_PIN22 22
-#define PORTE_PIN23 23
-#define PORTE_PIN24 24
-#define PORTE_PIN25 25
-#define PORTE_PIN26 26
-#define PORTE_PIN27 27
-#define PORTE_PIN28 28
-#define PORTE_PIN29 29
-#define TEENSY_PIN26 30
-#define PORTE_PIN31 31
-
-#define TEENSY_PIN24_IOPORT IOPORT5
-#define TEENSY_PIN25_IOPORT IOPORT5
-#define TEENSY_PIN26_IOPORT IOPORT5
-
-#define LINE_PIN1 PAL_LINE(TEENSY_PIN1_IOPORT, TEENSY_PIN1)
-#define LINE_PIN2 PAL_LINE(TEENSY_PIN2_IOPORT, TEENSY_PIN2)
-#define LINE_PIN3 PAL_LINE(TEENSY_PIN3_IOPORT, TEENSY_PIN3)
-#define LINE_PIN4 PAL_LINE(TEENSY_PIN4_IOPORT, TEENSY_PIN4)
-#define LINE_PIN5 PAL_LINE(TEENSY_PIN5_IOPORT, TEENSY_PIN5)
-#define LINE_PIN6 PAL_LINE(TEENSY_PIN6_IOPORT, TEENSY_PIN6)
-#define LINE_PIN7 PAL_LINE(TEENSY_PIN7_IOPORT, TEENSY_PIN7)
-#define LINE_PIN8 PAL_LINE(TEENSY_PIN8_IOPORT, TEENSY_PIN8)
-#define LINE_PIN9 PAL_LINE(TEENSY_PIN9_IOPORT, TEENSY_PIN9)
-#define LINE_PIN10 PAL_LINE(TEENSY_PIN10_IOPORT, TEENSY_PIN10)
-#define LINE_PIN11 PAL_LINE(TEENSY_PIN11_IOPORT, TEENSY_PIN11)
-#define LINE_PIN12 PAL_LINE(TEENSY_PIN12_IOPORT, TEENSY_PIN12)
-#define LINE_PIN13 PAL_LINE(TEENSY_PIN13_IOPORT, TEENSY_PIN13)
-#define LINE_PIN14 PAL_LINE(TEENSY_PIN14_IOPORT, TEENSY_PIN14)
-#define LINE_PIN15 PAL_LINE(TEENSY_PIN15_IOPORT, TEENSY_PIN15)
-#define LINE_PIN16 PAL_LINE(TEENSY_PIN16_IOPORT, TEENSY_PIN16)
-#define LINE_PIN17 PAL_LINE(TEENSY_PIN17_IOPORT, TEENSY_PIN17)
-#define LINE_PIN18 PAL_LINE(TEENSY_PIN18_IOPORT, TEENSY_PIN18)
-#define LINE_PIN19 PAL_LINE(TEENSY_PIN19_IOPORT, TEENSY_PIN19)
-#define LINE_PIN20 PAL_LINE(TEENSY_PIN20_IOPORT, TEENSY_PIN20)
-#define LINE_PIN21 PAL_LINE(TEENSY_PIN21_IOPORT, TEENSY_PIN21)
-#define LINE_PIN22 PAL_LINE(TEENSY_PIN22_IOPORT, TEENSY_PIN22)
-#define LINE_PIN23 PAL_LINE(TEENSY_PIN23_IOPORT, TEENSY_PIN23)
-#define LINE_PIN24 PAL_LINE(TEENSY_PIN24_IOPORT, TEENSY_PIN24)
-#define LINE_PIN25 PAL_LINE(TEENSY_PIN25_IOPORT, TEENSY_PIN25)
-
-#define LINE_LED LINE_PIN13
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.mk deleted file mode 100644 index 85c643a..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/PJRC_TEENSY_LC/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_LC/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/PJRC_TEENSY_LC
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.c b/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.c deleted file mode 100644 index dc058f6..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.c +++ /dev/null @@ -1,102 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "hal.h"
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- * This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
- VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
- VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
- VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
- VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
- VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
- VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
- VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
- VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
- VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief Early initialization code.
- * @details This initialization must be performed just after stack setup
- * and before any other initialization.
- */
-void __early_init(void) {
-
- stm32_clock_init();
-}
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.h b/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.h deleted file mode 100644 index a866c88..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.h +++ /dev/null @@ -1,757 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for ST STM32F0-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F0308_DISCOVERY
-#define BOARD_NAME "ST STM32F0308-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- * NOTE: HSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK 0
-#endif
-
-#define STM32_LSEDRV (3 << 3)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 0
-#endif
-
-#define STM32_HSE_BYPASS
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F030x8
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON 0
-#define GPIOA_PIN1 1
-#define GPIOA_PIN2 2
-#define GPIOA_PIN3 3
-#define GPIOA_PIN4 4
-#define GPIOA_PIN5 5
-#define GPIOA_PIN6 6
-#define GPIOA_PIN7 7
-#define GPIOA_PIN8 8
-#define GPIOA_PIN9 9
-#define GPIOA_PIN10 10
-#define GPIOA_PIN11 11
-#define GPIOA_PIN12 12
-#define GPIOA_SWDAT 13
-#define GPIOA_SWCLK 14
-#define GPIOA_PIN15 15
-
-#define GPIOB_PIN0 0
-#define GPIOB_PIN1 1
-#define GPIOB_PIN2 2
-#define GPIOB_PIN3 3
-#define GPIOB_PIN4 4
-#define GPIOB_PIN5 5
-#define GPIOB_PIN6 6
-#define GPIOB_PIN7 7
-#define GPIOB_PIN8 8
-#define GPIOB_PIN9 9
-#define GPIOB_PIN10 10
-#define GPIOB_PIN11 11
-#define GPIOB_PIN12 12
-#define GPIOB_PIN13 13
-#define GPIOB_PIN14 14
-#define GPIOB_PIN15 15
-
-#define GPIOC_PIN0 0
-#define GPIOC_PIN1 1
-#define GPIOC_PIN2 2
-#define GPIOC_PIN3 3
-#define GPIOC_PIN4 4
-#define GPIOC_PIN5 5
-#define GPIOC_PIN6 6
-#define GPIOC_PIN7 7
-#define GPIOC_LED4 8
-#define GPIOC_LED3 9
-#define GPIOC_PIN10 10
-#define GPIOC_PIN11 11
-#define GPIOC_PIN12 12
-#define GPIOC_PIN13 13
-#define GPIOC_OSC32_IN 14
-#define GPIOC_OSC32_OUT 15
-
-#define GPIOD_PIN0 0
-#define GPIOD_PIN1 1
-#define GPIOD_PIN2 2
-#define GPIOD_PIN3 3
-#define GPIOD_PIN4 4
-#define GPIOD_PIN5 5
-#define GPIOD_PIN6 6
-#define GPIOD_PIN7 7
-#define GPIOD_PIN8 8
-#define GPIOD_PIN9 9
-#define GPIOD_PIN10 10
-#define GPIOD_PIN11 11
-#define GPIOD_PIN12 12
-#define GPIOD_PIN13 13
-#define GPIOD_PIN14 14
-#define GPIOD_PIN15 15
-
-#define GPIOF_OSC_IN 0
-#define GPIOF_OSC_OUT 1
-#define GPIOF_PIN2 2
-#define GPIOF_PIN3 3
-#define GPIOF_PIN4 4
-#define GPIOF_PIN5 5
-#define GPIOF_PIN6 6
-#define GPIOF_PIN7 7
-#define GPIOF_PIN8 8
-#define GPIOF_PIN9 9
-#define GPIOF_PIN10 10
-#define GPIOF_PIN11 11
-#define GPIOF_PIN12 12
-#define GPIOF_PIN13 13
-#define GPIOF_PIN14 14
-#define GPIOF_PIN15 15
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
-#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
-#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
-#define PIN_ODR_LOW(n) (0U << (n))
-#define PIN_ODR_HIGH(n) (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
-#define PIN_OSPEED_10M(n) (1U << ((n) * 2))
-#define PIN_OSPEED_40M(n) (3U << ((n) * 2))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
-#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
-
-/*
- * GPIOA setup:
- *
- * PA0 - BUTTON (input floating).
- * PA1 - PIN1 (input pullup).
- * PA2 - PIN2 (input pullup).
- * PA3 - PIN3 (input pullup).
- * PA4 - PIN4 (input pullup).
- * PA5 - PIN5 (input pullup).
- * PA6 - PIN6 (input pullup).
- * PA7 - PIN7 (input pullup).
- * PA8 - PIN8 (input pullup).
- * PA9 - PIN9 (input pullup).
- * PA10 - PIN10 (input pullup).
- * PA11 - PIN11 (input pullup).
- * PA12 - PIN12 (input pullup).
- * PA13 - SWDAT (alternate 0).
- * PA14 - SWCLK (alternate 0).
- * PA15 - PIN15 (input pullup).
- */
-#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
- PIN_MODE_INPUT(GPIOA_PIN1) | \
- PIN_MODE_INPUT(GPIOA_PIN2) | \
- PIN_MODE_INPUT(GPIOA_PIN3) | \
- PIN_MODE_INPUT(GPIOA_PIN4) | \
- PIN_MODE_INPUT(GPIOA_PIN5) | \
- PIN_MODE_INPUT(GPIOA_PIN6) | \
- PIN_MODE_INPUT(GPIOA_PIN7) | \
- PIN_MODE_INPUT(GPIOA_PIN8) | \
- PIN_MODE_INPUT(GPIOA_PIN9) | \
- PIN_MODE_INPUT(GPIOA_PIN10) | \
- PIN_MODE_INPUT(GPIOA_PIN11) | \
- PIN_MODE_INPUT(GPIOA_PIN12) | \
- PIN_MODE_ALTERNATE(GPIOA_SWDAT) | \
- PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
- PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_2M(GPIOA_BUTTON) | \
- PIN_OSPEED_2M(GPIOA_PIN1) | \
- PIN_OSPEED_2M(GPIOA_PIN2) | \
- PIN_OSPEED_2M(GPIOA_PIN3) | \
- PIN_OSPEED_2M(GPIOA_PIN4) | \
- PIN_OSPEED_2M(GPIOA_PIN5) | \
- PIN_OSPEED_2M(GPIOA_PIN6) | \
- PIN_OSPEED_2M(GPIOA_PIN7) | \
- PIN_OSPEED_2M(GPIOA_PIN8) | \
- PIN_OSPEED_2M(GPIOA_PIN9) | \
- PIN_OSPEED_2M(GPIOA_PIN10) | \
- PIN_OSPEED_2M(GPIOA_PIN11) | \
- PIN_OSPEED_2M(GPIOA_PIN12) | \
- PIN_OSPEED_40M(GPIOA_SWDAT) | \
- PIN_OSPEED_40M(GPIOA_SWCLK) | \
- PIN_OSPEED_40M(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOA_SWDAT) | \
- PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
- PIN_ODR_HIGH(GPIOA_PIN1) | \
- PIN_ODR_HIGH(GPIOA_PIN2) | \
- PIN_ODR_HIGH(GPIOA_PIN3) | \
- PIN_ODR_HIGH(GPIOA_PIN4) | \
- PIN_ODR_HIGH(GPIOA_PIN5) | \
- PIN_ODR_HIGH(GPIOA_PIN6) | \
- PIN_ODR_HIGH(GPIOA_PIN7) | \
- PIN_ODR_HIGH(GPIOA_PIN8) | \
- PIN_ODR_HIGH(GPIOA_PIN9) | \
- PIN_ODR_HIGH(GPIOA_PIN10) | \
- PIN_ODR_HIGH(GPIOA_PIN11) | \
- PIN_ODR_HIGH(GPIOA_PIN12) | \
- PIN_ODR_HIGH(GPIOA_SWDAT) | \
- PIN_ODR_HIGH(GPIOA_SWCLK) | \
- PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \
- PIN_AFIO_AF(GPIOA_PIN1, 0) | \
- PIN_AFIO_AF(GPIOA_PIN2, 0) | \
- PIN_AFIO_AF(GPIOA_PIN3, 0) | \
- PIN_AFIO_AF(GPIOA_PIN4, 0) | \
- PIN_AFIO_AF(GPIOA_PIN5, 0) | \
- PIN_AFIO_AF(GPIOA_PIN6, 0) | \
- PIN_AFIO_AF(GPIOA_PIN7, 0))
-#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
- PIN_AFIO_AF(GPIOA_PIN9, 0) | \
- PIN_AFIO_AF(GPIOA_PIN10, 0) | \
- PIN_AFIO_AF(GPIOA_PIN11, 0) | \
- PIN_AFIO_AF(GPIOA_PIN12, 0) | \
- PIN_AFIO_AF(GPIOA_SWDAT, 0) | \
- PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
- PIN_AFIO_AF(GPIOA_PIN15, 0))
-
-/*
- * GPIOB setup:
- *
- * PB0 - PIN0 (input pullup).
- * PB1 - PIN1 (input pullup).
- * PB2 - PIN2 (input pullup).
- * PB3 - PIN3 (input pullup).
- * PB4 - PIN4 (input pullup).
- * PB5 - PIN5 (input pullup).
- * PB6 - PIN6 (input pullup).
- * PB7 - PIN7 (input pullup).
- * PB8 - PIN8 (input pullup).
- * PB9 - PIN9 (input pullup).
- * PB10 - PIN10 (input pullup).
- * PB11 - PIN11 (input pullup).
- * PB12 - PIN12 (input pullup).
- * PB13 - PIN13 (input pullup).
- * PB14 - PIN14 (input pullup).
- * PB15 - PIN15 (input pullup).
- */
-#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
- PIN_MODE_INPUT(GPIOB_PIN1) | \
- PIN_MODE_INPUT(GPIOB_PIN2) | \
- PIN_MODE_INPUT(GPIOB_PIN3) | \
- PIN_MODE_INPUT(GPIOB_PIN4) | \
- PIN_MODE_INPUT(GPIOB_PIN5) | \
- PIN_MODE_INPUT(GPIOB_PIN6) | \
- PIN_MODE_INPUT(GPIOB_PIN7) | \
- PIN_MODE_INPUT(GPIOB_PIN8) | \
- PIN_MODE_INPUT(GPIOB_PIN9) | \
- PIN_MODE_INPUT(GPIOB_PIN10) | \
- PIN_MODE_INPUT(GPIOB_PIN11) | \
- PIN_MODE_INPUT(GPIOB_PIN12) | \
- PIN_MODE_INPUT(GPIOB_PIN13) | \
- PIN_MODE_INPUT(GPIOB_PIN14) | \
- PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_2M(GPIOB_PIN0) | \
- PIN_OSPEED_2M(GPIOB_PIN1) | \
- PIN_OSPEED_40M(GPIOB_PIN2) | \
- PIN_OSPEED_40M(GPIOB_PIN3) | \
- PIN_OSPEED_40M(GPIOB_PIN4) | \
- PIN_OSPEED_2M(GPIOB_PIN5) | \
- PIN_OSPEED_2M(GPIOB_PIN6) | \
- PIN_OSPEED_2M(GPIOB_PIN7) | \
- PIN_OSPEED_2M(GPIOB_PIN8) | \
- PIN_OSPEED_2M(GPIOB_PIN9) | \
- PIN_OSPEED_2M(GPIOB_PIN10) | \
- PIN_OSPEED_2M(GPIOB_PIN11) | \
- PIN_OSPEED_2M(GPIOB_PIN12) | \
- PIN_OSPEED_2M(GPIOB_PIN13) | \
- PIN_OSPEED_2M(GPIOB_PIN14) | \
- PIN_OSPEED_2M(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
- PIN_ODR_HIGH(GPIOB_PIN1) | \
- PIN_ODR_HIGH(GPIOB_PIN2) | \
- PIN_ODR_HIGH(GPIOB_PIN3) | \
- PIN_ODR_HIGH(GPIOB_PIN4) | \
- PIN_ODR_HIGH(GPIOB_PIN5) | \
- PIN_ODR_HIGH(GPIOB_PIN6) | \
- PIN_ODR_HIGH(GPIOB_PIN7) | \
- PIN_ODR_HIGH(GPIOB_PIN8) | \
- PIN_ODR_HIGH(GPIOB_PIN9) | \
- PIN_ODR_HIGH(GPIOB_PIN10) | \
- PIN_ODR_HIGH(GPIOB_PIN11) | \
- PIN_ODR_HIGH(GPIOB_PIN12) | \
- PIN_ODR_HIGH(GPIOB_PIN13) | \
- PIN_ODR_HIGH(GPIOB_PIN14) | \
- PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
- PIN_AFIO_AF(GPIOB_PIN1, 0) | \
- PIN_AFIO_AF(GPIOB_PIN2, 0) | \
- PIN_AFIO_AF(GPIOB_PIN3, 0) | \
- PIN_AFIO_AF(GPIOB_PIN4, 0) | \
- PIN_AFIO_AF(GPIOB_PIN5, 0) | \
- PIN_AFIO_AF(GPIOB_PIN6, 0) | \
- PIN_AFIO_AF(GPIOB_PIN7, 0))
-#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
- PIN_AFIO_AF(GPIOB_PIN9, 0) | \
- PIN_AFIO_AF(GPIOB_PIN10, 0) | \
- PIN_AFIO_AF(GPIOB_PIN11, 0) | \
- PIN_AFIO_AF(GPIOB_PIN12, 0) | \
- PIN_AFIO_AF(GPIOB_PIN13, 0) | \
- PIN_AFIO_AF(GPIOB_PIN14, 0) | \
- PIN_AFIO_AF(GPIOB_PIN15, 0))
-
-/*
- * GPIOC setup:
- *
- * PC0 - PIN0 (input pullup).
- * PC1 - PIN1 (input pullup).
- * PC2 - PIN2 (input pullup).
- * PC3 - PIN3 (input pullup).
- * PC4 - PIN4 (input pullup).
- * PC5 - PIN5 (input pullup).
- * PC6 - PIN6 (input pullup).
- * PC7 - PIN7 (input pullup).
- * PC8 - LED4 (output pushpull maximum).
- * PC9 - LED3 (output pushpull maximum).
- * PC10 - PIN10 (input pullup).
- * PC11 - PIN11 (input pullup).
- * PC12 - PIN12 (input pullup).
- * PC13 - PIN13 (input pullup).
- * PC14 - OSC32_IN (input floating).
- * PC15 - OSC32_OUT (input floating).
- */
-#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
- PIN_MODE_INPUT(GPIOC_PIN1) | \
- PIN_MODE_INPUT(GPIOC_PIN2) | \
- PIN_MODE_INPUT(GPIOC_PIN3) | \
- PIN_MODE_INPUT(GPIOC_PIN4) | \
- PIN_MODE_INPUT(GPIOC_PIN5) | \
- PIN_MODE_INPUT(GPIOC_PIN6) | \
- PIN_MODE_INPUT(GPIOC_PIN7) | \
- PIN_MODE_OUTPUT(GPIOC_LED4) | \
- PIN_MODE_OUTPUT(GPIOC_LED3) | \
- PIN_MODE_INPUT(GPIOC_PIN10) | \
- PIN_MODE_INPUT(GPIOC_PIN11) | \
- PIN_MODE_INPUT(GPIOC_PIN12) | \
- PIN_MODE_INPUT(GPIOC_PIN13) | \
- PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
- PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOC_LED4) | \
- PIN_OTYPE_PUSHPULL(GPIOC_LED3) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_2M(GPIOC_PIN0) | \
- PIN_OSPEED_2M(GPIOC_PIN1) | \
- PIN_OSPEED_2M(GPIOC_PIN2) | \
- PIN_OSPEED_2M(GPIOC_PIN3) | \
- PIN_OSPEED_2M(GPIOC_PIN4) | \
- PIN_OSPEED_2M(GPIOC_PIN5) | \
- PIN_OSPEED_2M(GPIOC_PIN6) | \
- PIN_OSPEED_2M(GPIOC_PIN7) | \
- PIN_OSPEED_40M(GPIOC_LED4) | \
- PIN_OSPEED_40M(GPIOC_LED3) | \
- PIN_OSPEED_2M(GPIOC_PIN10) | \
- PIN_OSPEED_2M(GPIOC_PIN11) | \
- PIN_OSPEED_2M(GPIOC_PIN12) | \
- PIN_OSPEED_2M(GPIOC_PIN13) | \
- PIN_OSPEED_40M(GPIOC_OSC32_IN) | \
- PIN_OSPEED_40M(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
- PIN_PUPDR_FLOATING(GPIOC_LED4) | \
- PIN_PUPDR_FLOATING(GPIOC_LED3) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
- PIN_ODR_HIGH(GPIOC_PIN1) | \
- PIN_ODR_HIGH(GPIOC_PIN2) | \
- PIN_ODR_HIGH(GPIOC_PIN3) | \
- PIN_ODR_HIGH(GPIOC_PIN4) | \
- PIN_ODR_HIGH(GPIOC_PIN5) | \
- PIN_ODR_HIGH(GPIOC_PIN6) | \
- PIN_ODR_HIGH(GPIOC_PIN7) | \
- PIN_ODR_LOW(GPIOC_LED4) | \
- PIN_ODR_LOW(GPIOC_LED3) | \
- PIN_ODR_HIGH(GPIOC_PIN10) | \
- PIN_ODR_HIGH(GPIOC_PIN11) | \
- PIN_ODR_HIGH(GPIOC_PIN12) | \
- PIN_ODR_HIGH(GPIOC_PIN13) | \
- PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
- PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
- PIN_AFIO_AF(GPIOC_PIN1, 0) | \
- PIN_AFIO_AF(GPIOC_PIN2, 0) | \
- PIN_AFIO_AF(GPIOC_PIN3, 0) | \
- PIN_AFIO_AF(GPIOC_PIN4, 0) | \
- PIN_AFIO_AF(GPIOC_PIN5, 0) | \
- PIN_AFIO_AF(GPIOC_PIN6, 0) | \
- PIN_AFIO_AF(GPIOC_PIN7, 0))
-#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_LED4, 0) | \
- PIN_AFIO_AF(GPIOC_LED3, 0) | \
- PIN_AFIO_AF(GPIOC_PIN10, 0) | \
- PIN_AFIO_AF(GPIOC_PIN11, 0) | \
- PIN_AFIO_AF(GPIOC_PIN12, 0) | \
- PIN_AFIO_AF(GPIOC_PIN13, 0) | \
- PIN_AFIO_AF(GPIOC_OSC32_IN, 0) | \
- PIN_AFIO_AF(GPIOC_OSC32_OUT, 0))
-
-/*
- * GPIOD setup:
- *
- * PD0 - PIN0 (input pullup).
- * PD1 - PIN1 (input pullup).
- * PD2 - PIN2 (input pullup).
- * PD3 - PIN3 (input pullup).
- * PD4 - PIN4 (input pullup).
- * PD5 - PIN5 (input pullup).
- * PD6 - PIN6 (input pullup).
- * PD7 - PIN7 (input pullup).
- * PD8 - PIN8 (input pullup).
- * PD9 - PIN9 (input pullup).
- * PD10 - PIN10 (input pullup).
- * PD11 - PIN11 (input pullup).
- * PD12 - PIN12 (input pullup).
- * PD13 - PIN13 (input pullup).
- * PD14 - PIN14 (input pullup).
- * PD15 - PIN15 (input pullup).
- */
-#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
- PIN_MODE_INPUT(GPIOD_PIN1) | \
- PIN_MODE_INPUT(GPIOD_PIN2) | \
- PIN_MODE_INPUT(GPIOD_PIN3) | \
- PIN_MODE_INPUT(GPIOD_PIN4) | \
- PIN_MODE_INPUT(GPIOD_PIN5) | \
- PIN_MODE_INPUT(GPIOD_PIN6) | \
- PIN_MODE_INPUT(GPIOD_PIN7) | \
- PIN_MODE_INPUT(GPIOD_PIN8) | \
- PIN_MODE_INPUT(GPIOD_PIN9) | \
- PIN_MODE_INPUT(GPIOD_PIN10) | \
- PIN_MODE_INPUT(GPIOD_PIN11) | \
- PIN_MODE_INPUT(GPIOD_PIN12) | \
- PIN_MODE_INPUT(GPIOD_PIN13) | \
- PIN_MODE_INPUT(GPIOD_PIN14) | \
- PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_2M(GPIOD_PIN0) | \
- PIN_OSPEED_2M(GPIOD_PIN1) | \
- PIN_OSPEED_2M(GPIOD_PIN2) | \
- PIN_OSPEED_2M(GPIOD_PIN3) | \
- PIN_OSPEED_2M(GPIOD_PIN4) | \
- PIN_OSPEED_2M(GPIOD_PIN5) | \
- PIN_OSPEED_2M(GPIOD_PIN6) | \
- PIN_OSPEED_2M(GPIOD_PIN7) | \
- PIN_OSPEED_2M(GPIOD_PIN8) | \
- PIN_OSPEED_2M(GPIOD_PIN9) | \
- PIN_OSPEED_2M(GPIOD_PIN10) | \
- PIN_OSPEED_2M(GPIOD_PIN11) | \
- PIN_OSPEED_2M(GPIOD_PIN12) | \
- PIN_OSPEED_2M(GPIOD_PIN13) | \
- PIN_OSPEED_2M(GPIOD_PIN14) | \
- PIN_OSPEED_2M(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
- PIN_ODR_HIGH(GPIOD_PIN1) | \
- PIN_ODR_HIGH(GPIOD_PIN2) | \
- PIN_ODR_HIGH(GPIOD_PIN3) | \
- PIN_ODR_HIGH(GPIOD_PIN4) | \
- PIN_ODR_HIGH(GPIOD_PIN5) | \
- PIN_ODR_HIGH(GPIOD_PIN6) | \
- PIN_ODR_HIGH(GPIOD_PIN7) | \
- PIN_ODR_HIGH(GPIOD_PIN8) | \
- PIN_ODR_HIGH(GPIOD_PIN9) | \
- PIN_ODR_HIGH(GPIOD_PIN10) | \
- PIN_ODR_HIGH(GPIOD_PIN11) | \
- PIN_ODR_HIGH(GPIOD_PIN12) | \
- PIN_ODR_HIGH(GPIOD_PIN13) | \
- PIN_ODR_HIGH(GPIOD_PIN14) | \
- PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
- PIN_AFIO_AF(GPIOD_PIN1, 0) | \
- PIN_AFIO_AF(GPIOD_PIN2, 0) | \
- PIN_AFIO_AF(GPIOD_PIN3, 0) | \
- PIN_AFIO_AF(GPIOD_PIN4, 0) | \
- PIN_AFIO_AF(GPIOD_PIN5, 0) | \
- PIN_AFIO_AF(GPIOD_PIN6, 0) | \
- PIN_AFIO_AF(GPIOD_PIN7, 0))
-#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
- PIN_AFIO_AF(GPIOD_PIN9, 0) | \
- PIN_AFIO_AF(GPIOD_PIN10, 0) | \
- PIN_AFIO_AF(GPIOD_PIN11, 0) | \
- PIN_AFIO_AF(GPIOD_PIN12, 0) | \
- PIN_AFIO_AF(GPIOD_PIN13, 0) | \
- PIN_AFIO_AF(GPIOD_PIN14, 0) | \
- PIN_AFIO_AF(GPIOD_PIN15, 0))
-
-/*
- * GPIOF setup:
- *
- * PF0 - OSC_IN (input floating).
- * PF1 - OSC_OUT (input floating).
- * PF2 - PIN2 (input pullup).
- * PF3 - PIN3 (input pullup).
- * PF4 - PIN4 (input pullup).
- * PF5 - PIN5 (input pullup).
- * PF6 - PIN6 (input pullup).
- * PF7 - PIN7 (input pullup).
- * PF8 - PIN8 (input pullup).
- * PF9 - PIN9 (input pullup).
- * PF10 - PIN10 (input pullup).
- * PF11 - PIN11 (input pullup).
- * PF12 - PIN12 (input pullup).
- * PF13 - PIN13 (input pullup).
- * PF14 - PIN14 (input pullup).
- * PF15 - PIN15 (input pullup).
- */
-#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
- PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
- PIN_MODE_INPUT(GPIOF_PIN2) | \
- PIN_MODE_INPUT(GPIOF_PIN3) | \
- PIN_MODE_INPUT(GPIOF_PIN4) | \
- PIN_MODE_INPUT(GPIOF_PIN5) | \
- PIN_MODE_INPUT(GPIOF_PIN6) | \
- PIN_MODE_INPUT(GPIOF_PIN7) | \
- PIN_MODE_INPUT(GPIOF_PIN8) | \
- PIN_MODE_INPUT(GPIOF_PIN9) | \
- PIN_MODE_INPUT(GPIOF_PIN10) | \
- PIN_MODE_INPUT(GPIOF_PIN11) | \
- PIN_MODE_INPUT(GPIOF_PIN12) | \
- PIN_MODE_INPUT(GPIOF_PIN13) | \
- PIN_MODE_INPUT(GPIOF_PIN14) | \
- PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_2M(GPIOF_OSC_IN) | \
- PIN_OSPEED_2M(GPIOF_OSC_OUT) | \
- PIN_OSPEED_2M(GPIOF_PIN2) | \
- PIN_OSPEED_2M(GPIOF_PIN3) | \
- PIN_OSPEED_2M(GPIOF_PIN4) | \
- PIN_OSPEED_2M(GPIOF_PIN5) | \
- PIN_OSPEED_2M(GPIOF_PIN6) | \
- PIN_OSPEED_2M(GPIOF_PIN7) | \
- PIN_OSPEED_2M(GPIOF_PIN8) | \
- PIN_OSPEED_2M(GPIOF_PIN9) | \
- PIN_OSPEED_2M(GPIOF_PIN10) | \
- PIN_OSPEED_2M(GPIOF_PIN11) | \
- PIN_OSPEED_2M(GPIOF_PIN12) | \
- PIN_OSPEED_2M(GPIOF_PIN13) | \
- PIN_OSPEED_2M(GPIOF_PIN14) | \
- PIN_OSPEED_2M(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
- PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
- PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
- PIN_ODR_HIGH(GPIOF_PIN2) | \
- PIN_ODR_HIGH(GPIOF_PIN3) | \
- PIN_ODR_HIGH(GPIOF_PIN4) | \
- PIN_ODR_HIGH(GPIOF_PIN5) | \
- PIN_ODR_HIGH(GPIOF_PIN6) | \
- PIN_ODR_HIGH(GPIOF_PIN7) | \
- PIN_ODR_HIGH(GPIOF_PIN8) | \
- PIN_ODR_HIGH(GPIOF_PIN9) | \
- PIN_ODR_HIGH(GPIOF_PIN10) | \
- PIN_ODR_HIGH(GPIOF_PIN11) | \
- PIN_ODR_HIGH(GPIOF_PIN12) | \
- PIN_ODR_HIGH(GPIOF_PIN13) | \
- PIN_ODR_HIGH(GPIOF_PIN14) | \
- PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \
- PIN_AFIO_AF(GPIOF_OSC_OUT, 0) | \
- PIN_AFIO_AF(GPIOF_PIN2, 0) | \
- PIN_AFIO_AF(GPIOF_PIN3, 0) | \
- PIN_AFIO_AF(GPIOF_PIN4, 0) | \
- PIN_AFIO_AF(GPIOF_PIN5, 0) | \
- PIN_AFIO_AF(GPIOF_PIN6, 0) | \
- PIN_AFIO_AF(GPIOF_PIN7, 0))
-#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
- PIN_AFIO_AF(GPIOF_PIN9, 0) | \
- PIN_AFIO_AF(GPIOF_PIN10, 0) | \
- PIN_AFIO_AF(GPIOF_PIN11, 0) | \
- PIN_AFIO_AF(GPIOF_PIN12, 0) | \
- PIN_AFIO_AF(GPIOF_PIN13, 0) | \
- PIN_AFIO_AF(GPIOF_PIN14, 0) | \
- PIN_AFIO_AF(GPIOF_PIN15, 0))
-
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk deleted file mode 100644 index 35b3939..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/ST_STM32F0308_DISCOVERY/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files.
-BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/ST_STM32F0308_DISCOVERY/board.c
-
-# Required include directories
-BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/ST_STM32F0308_DISCOVERY
diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.c b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.c deleted file mode 100644 index 2bbbc4c..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -#if HAL_USE_PAL || defined(__DOXYGEN__) -const PALConfig pal_default_config = -{ - {VAL_GPIOA_DATA, VAL_GPIOA_DIR, VAL_GPIOA_AFSEL, VAL_GPIOA_DR2R, - VAL_GPIOA_DR4R, VAL_GPIOA_DR8R, VAL_GPIOA_ODR, VAL_GPIOA_PUR, - VAL_GPIOA_PDR, VAL_GPIOA_SLR, VAL_GPIOA_DEN, VAL_GPIOA_AMSEL, - VAL_GPIOA_PCTL}, - {VAL_GPIOB_DATA, VAL_GPIOB_DIR, VAL_GPIOB_AFSEL, VAL_GPIOB_DR2R, - VAL_GPIOB_DR4R, VAL_GPIOB_DR8R, VAL_GPIOB_ODR, VAL_GPIOB_PUR, - VAL_GPIOB_PDR, VAL_GPIOB_SLR, VAL_GPIOB_DEN, VAL_GPIOB_AMSEL, - VAL_GPIOB_PCTL}, - {VAL_GPIOC_DATA, VAL_GPIOC_DIR, VAL_GPIOC_AFSEL, VAL_GPIOC_DR2R, - VAL_GPIOC_DR4R, VAL_GPIOC_DR8R, VAL_GPIOC_ODR, VAL_GPIOC_PUR, - VAL_GPIOC_PDR, VAL_GPIOC_SLR, VAL_GPIOC_DEN, VAL_GPIOC_AMSEL, - VAL_GPIOC_PCTL}, - {VAL_GPIOD_DATA, VAL_GPIOD_DIR, VAL_GPIOD_AFSEL, VAL_GPIOD_DR2R, - VAL_GPIOD_DR4R, VAL_GPIOD_DR8R, VAL_GPIOD_ODR, VAL_GPIOD_PUR, - VAL_GPIOD_PDR, VAL_GPIOD_SLR, VAL_GPIOD_DEN, VAL_GPIOD_AMSEL, - VAL_GPIOD_PCTL}, - {VAL_GPIOE_DATA, VAL_GPIOE_DIR, VAL_GPIOE_AFSEL, VAL_GPIOE_DR2R, - VAL_GPIOE_DR4R, VAL_GPIOE_DR8R, VAL_GPIOE_ODR, VAL_GPIOE_PUR, - VAL_GPIOE_PDR, VAL_GPIOE_SLR, VAL_GPIOE_DEN, VAL_GPIOE_AMSEL, - VAL_GPIOE_PCTL}, - {VAL_GPIOF_DATA, VAL_GPIOF_DIR, VAL_GPIOF_AFSEL, VAL_GPIOF_DR2R, - VAL_GPIOF_DR4R, VAL_GPIOF_DR8R, VAL_GPIOF_ODR, VAL_GPIOF_PUR, - VAL_GPIOF_PDR, VAL_GPIOF_SLR, VAL_GPIOF_DEN, VAL_GPIOF_AMSEL, - VAL_GPIOF_PCTL} -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization is performed just after reset before BSS and - * DATA segments initialization. - */ -void __early_init(void) -{ - tiva_clock_init(); -} - -/** - * @brief Late initialization code. - * @note This initialization is performed after BSS and DATA segments - * initialization and before invoking the main() function. - */ -void boardInit(void) -{ -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.h b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.h deleted file mode 100644 index 367dce1..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.h +++ /dev/null @@ -1,943 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for Texas Instruments TM4C123G Launchpad Board. - */ - -/* - * Board identifier. - */ -#define BOARD_TI_TM4C123G_LAUNCHPAD -#define BOARD_NAME "Texas Instruments TM4C123G Launchpad" - -/* - * MCU type - */ -//#define TM4C1230C3PM -//#define TM4C1230D5PM -//#define TM4C1230E6PM -//#define TM4C1230H6PM -//#define TM4C1231C3PM -//#define TM4C1231D5PM -//#define TM4C1231D5PZ -//#define TM4C1231E6PM -//#define TM4C1231E6PZ -//#define TM4C1231H6PGE -//#define TM4C1231H6PM -//#define TM4C1231H6PZ -//#define TM4C1232C3PM -//#define TM4C1232D5PM -//#define TM4C1232E6PM -//#define TM4C1232H6PM -//#define TM4C1233C3PM -//#define TM4C1233D5PM -//#define TM4C1233D5PZ -//#define TM4C1233E6PM -//#define TM4C1233E6PZ -//#define TM4C1233H6PGE -//#define TM4C1233H6PM -//#define TM4C1233H6PZ -//#define TM4C1236D5PM -//#define TM4C1236E6PM -//#define TM4C1236H6PM -//#define TM4C1237D5PM -//#define TM4C1237D5PZ -//#define TM4C1237E6PM -//#define TM4C1237E6PZ -//#define TM4C1237H6PGE -//#define TM4C1237H6PM -//#define TM4C1237H6PZ -//#define TM4C123AE6PM -//#define TM4C123AH6PM -//#define TM4C123BE6PM -//#define TM4C123BE6PZ -//#define TM4C123BH6PGE -//#define TM4C123BH6PM -//#define TM4C123BH6PZ -//#define TM4C123BH6ZRB -//#define TM4C123FE6PM -//#define TM4C123FH6PM -//#define TM4C123GE6PM -//#define TM4C123GE6PZ -//#define TM4C123GH6PGE -#define TM4C123GH6PM -//#define TM4C123GH6PZ -//#define TM4C123GH6ZRB -//#define TM4C123GH5ZXR - -/* - * Board oscillators-related settings. - */ -#define TIVA_XTAL_VALUE 16000000 - -/* - * IO pins assignments. - */ -#define GPIOA_UART0_RX 0 -#define GPIOA_UART0_TX 1 -#define GPIOA_SSI0_CLK 2 -#define GPIOA_PIN3 3 -#define GPIOA_SSI0_RX 4 -#define GPIOA_SSI0_TX 5 -#define GPIOA_PIN6 6 -#define GPIOA_PIN7 7 - -#define GPIOB_PIN0 0 -#define GPIOB_PIN1 1 -#define GPIOB_I2C0_SCL 2 -#define GPIOB_I2C0_SDA 3 -#define GPIOB_PIN4 4 -#define GPIOB_PIN5 5 -#define GPIOB_PIN6 6 -#define GPIOB_PIN7 7 - -#define GPIOC_TCK_SWCLK 0 -#define GPIOC_TMS_SWDIO 1 -#define GPIOC_TDI 2 -#define GPIOC_TDO_SWO 3 -#define GPIOC_PIN4 4 -#define GPIOC_PIN5 5 -#define GPIOC_PIN6 6 -#define GPIOC_PIN7 7 - -#define GPIOD_PIN0 0 -#define GPIOD_PIN1 1 -#define GPIOD_PIN2 2 -#define GPIOD_PIN3 3 -#define GPIOD_PIN4 4 -#define GPIOD_PIN5 5 -#define GPIOD_PIN6 6 -#define GPIOD_PIN7 7 - -#define GPIOE_PIN0 0 -#define GPIOE_PIN1 1 -#define GPIOE_PIN2 2 -#define GPIOE_PIN3 3 -#define GPIOE_PIN4 4 -#define GPIOE_PIN5 5 -#define GPIOE_PIN6 6 -#define GPIOE_PIN7 7 - -#define GPIOF_SW2 0 -#define GPIOF_LED_RED 1 -#define GPIOF_LED_BLUE 2 -#define GPIOF_LED_GREEN 3 -#define GPIOF_SW1 4 -#define GPIOF_PIN5 5 -#define GPIOF_PIN6 6 -#define GPIOF_PIN7 7 - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - */ -#define PIN_DATA_LOW(n) (0U << (n)) -#define PIN_DATA_HIGH(n) (1U << (n)) - -#define PIN_DIR_IN(n) (0U << (n)) -#define PIN_DIR_OUT(n) (1U << (n)) - -#define PIN_AFSEL_GPIO(n) (0U << (n)) -#define PIN_AFSEL_ALTERNATE(n) (1U << (n)) - -#define PIN_ODR_DISABLE(n) (0U << (n)) -#define PIN_ODR_ENABLE(n) (1U << (n)) - -#define PIN_PxR_DISABLE(n) (0U << (n)) -#define PIN_PxR_ENABLE(n) (1U << (n)) - -#define PIN_DEN_DISABLE(n) (0U << (n)) -#define PIN_DEN_ENABLE(n) (1U << (n)) - -#define PIN_AMSEL_DISABLE(n) (0U << (n)) -#define PIN_AMSEL_ENABLE(n) (1U << (n)) - -#define PIN_DRxR_DISABLE(n) (0U << (n)) -#define PIN_DRxR_ENABLE(n) (1U << (n)) - -#define PIN_SLR_DISABLE(n) (0U << (n)) -#define PIN_SLR_ENABLE(n) (1U << (n)) - -#define PIN_PCTL_MODE(n, mode) (mode << ((n) * 4)) - -/* - * GPIOA Setup: - * - * PA0 - UART0 RX () - * PA1 - UART0 TX () - * PA2 - PIN2 () - * PA3 - PIN3 () - * PA4 - PIN4 () - * PA5 - PIN5 () - * PA6 - PIN6 () - * PA7 - PIN7 () - */ -#define VAL_GPIOA_DATA (PIN_DATA_LOW(GPIOA_UART0_RX) | \ - PIN_DATA_LOW(GPIOA_UART0_TX) | \ - PIN_DATA_LOW(GPIOA_SSI0_CLK) | \ - PIN_DATA_LOW(GPIOA_PIN3) | \ - PIN_DATA_LOW(GPIOA_SSI0_RX) | \ - PIN_DATA_LOW(GPIOA_SSI0_TX) | \ - PIN_DATA_LOW(GPIOA_PIN6) | \ - PIN_DATA_LOW(GPIOA_PIN7)) - -#define VAL_GPIOA_DIR (PIN_DIR_IN(GPIOA_UART0_RX) | \ - PIN_DIR_IN(GPIOA_UART0_TX) | \ - PIN_DIR_IN(GPIOA_SSI0_CLK) | \ - PIN_DIR_IN(GPIOA_PIN3) | \ - PIN_DIR_IN(GPIOA_SSI0_RX) | \ - PIN_DIR_IN(GPIOA_SSI0_TX) | \ - PIN_DIR_IN(GPIOA_PIN6) | \ - PIN_DIR_IN(GPIOA_PIN7)) - -#define VAL_GPIOA_AFSEL (PIN_AFSEL_GPIO(GPIOA_UART0_RX) | \ - PIN_AFSEL_GPIO(GPIOA_UART0_TX) | \ - PIN_AFSEL_GPIO(GPIOA_SSI0_CLK) | \ - PIN_AFSEL_GPIO(GPIOA_PIN3) | \ - PIN_AFSEL_GPIO(GPIOA_SSI0_RX) | \ - PIN_AFSEL_GPIO(GPIOA_SSI0_TX) | \ - PIN_AFSEL_GPIO(GPIOA_PIN6) | \ - PIN_AFSEL_GPIO(GPIOA_PIN7)) - -#define VAL_GPIOA_ODR (PIN_ODR_DISABLE(GPIOA_UART0_RX) | \ - PIN_ODR_DISABLE(GPIOA_UART0_TX) | \ - PIN_ODR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_ODR_DISABLE(GPIOA_PIN3) | \ - PIN_ODR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_ODR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_ODR_DISABLE(GPIOA_PIN6) | \ - PIN_ODR_DISABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_PUR (PIN_PxR_DISABLE(GPIOA_UART0_RX) | \ - PIN_PxR_DISABLE(GPIOA_UART0_TX) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_PxR_DISABLE(GPIOA_PIN3) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_PxR_DISABLE(GPIOA_PIN6) | \ - PIN_PxR_DISABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_PDR (PIN_PxR_DISABLE(GPIOA_UART0_RX) | \ - PIN_PxR_DISABLE(GPIOA_UART0_TX) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_PxR_DISABLE(GPIOA_PIN3) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_PxR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_PxR_DISABLE(GPIOA_PIN6) | \ - PIN_PxR_DISABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_DEN (PIN_DEN_ENABLE(GPIOA_UART0_RX) | \ - PIN_DEN_ENABLE(GPIOA_UART0_TX) | \ - PIN_DEN_ENABLE(GPIOA_SSI0_CLK) | \ - PIN_DEN_ENABLE(GPIOA_PIN3) | \ - PIN_DEN_ENABLE(GPIOA_SSI0_RX) | \ - PIN_DEN_ENABLE(GPIOA_SSI0_TX) | \ - PIN_DEN_ENABLE(GPIOA_PIN6) | \ - PIN_DEN_ENABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_AMSEL (PIN_AMSEL_DISABLE(GPIOA_UART0_RX) | \ - PIN_AMSEL_DISABLE(GPIOA_UART0_TX) | \ - PIN_AMSEL_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_AMSEL_DISABLE(GPIOA_PIN3)) - -#define VAL_GPIOA_DR2R (PIN_DRxR_ENABLE(GPIOA_UART0_RX) | \ - PIN_DRxR_ENABLE(GPIOA_UART0_TX) | \ - PIN_DRxR_ENABLE(GPIOA_SSI0_CLK) | \ - PIN_DRxR_ENABLE(GPIOA_PIN3) | \ - PIN_DRxR_ENABLE(GPIOA_SSI0_RX) | \ - PIN_DRxR_ENABLE(GPIOA_SSI0_TX) | \ - PIN_DRxR_ENABLE(GPIOA_PIN6) | \ - PIN_DRxR_ENABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_DR4R (PIN_DRxR_DISABLE(GPIOA_UART0_RX) | \ - PIN_DRxR_DISABLE(GPIOA_UART0_TX) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_DRxR_DISABLE(GPIOA_PIN3) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_DRxR_DISABLE(GPIOA_PIN6) | \ - PIN_DRxR_DISABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_DR8R (PIN_DRxR_DISABLE(GPIOA_UART0_RX) | \ - PIN_DRxR_DISABLE(GPIOA_UART0_TX) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_DRxR_DISABLE(GPIOA_PIN3) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_DRxR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_DRxR_DISABLE(GPIOA_PIN6) | \ - PIN_DRxR_DISABLE(GPIOA_PIN7)) - - -#define VAL_GPIOA_SLR (PIN_SLR_DISABLE(GPIOA_UART0_RX) | \ - PIN_SLR_DISABLE(GPIOA_UART0_TX) | \ - PIN_SLR_DISABLE(GPIOA_SSI0_CLK) | \ - PIN_SLR_DISABLE(GPIOA_PIN3) | \ - PIN_SLR_DISABLE(GPIOA_SSI0_RX) | \ - PIN_SLR_DISABLE(GPIOA_SSI0_TX) | \ - PIN_SLR_DISABLE(GPIOA_PIN6) | \ - PIN_SLR_DISABLE(GPIOA_PIN7)) - -#define VAL_GPIOA_PCTL (PIN_PCTL_MODE(GPIOA_UART0_RX, 0) | \ - PIN_PCTL_MODE(GPIOA_UART0_TX, 0) | \ - PIN_PCTL_MODE(GPIOA_SSI0_CLK, 0) | \ - PIN_PCTL_MODE(GPIOA_PIN3, 0) | \ - PIN_PCTL_MODE(GPIOA_SSI0_RX, 0) | \ - PIN_PCTL_MODE(GPIOA_SSI0_TX, 0) | \ - PIN_PCTL_MODE(GPIOA_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOA_PIN7, 0)) - -/* - * GPIOB Setup: - * - * PB0 - PIN0 () - * PB1 - PIN1 () - * PB2 - I2C0_SCL () - * PB3 - I2C0_SDA () - * PB4 - PIN4 () - * PB5 - PIN5 () - * PB6 - PIN6 () - * PB7 - PIN7 () - */ -#define VAL_GPIOB_DATA (PIN_DATA_LOW(GPIOB_PIN0) | \ - PIN_DATA_LOW(GPIOB_PIN1) | \ - PIN_DATA_LOW(GPIOB_I2C0_SCL) | \ - PIN_DATA_LOW(GPIOB_I2C0_SDA) | \ - PIN_DATA_LOW(GPIOB_PIN4) | \ - PIN_DATA_LOW(GPIOB_PIN5) | \ - PIN_DATA_LOW(GPIOB_PIN6) | \ - PIN_DATA_LOW(GPIOB_PIN7)) - -#define VAL_GPIOB_DIR (PIN_DIR_IN(GPIOB_PIN0) | \ - PIN_DIR_IN(GPIOB_PIN1) | \ - PIN_DIR_IN(GPIOB_I2C0_SCL) | \ - PIN_DIR_IN(GPIOB_I2C0_SDA) | \ - PIN_DIR_IN(GPIOB_PIN4) | \ - PIN_DIR_IN(GPIOB_PIN5) | \ - PIN_DIR_IN(GPIOB_PIN6) | \ - PIN_DIR_IN(GPIOB_PIN7)) - -#define VAL_GPIOB_AFSEL (PIN_AFSEL_GPIO(GPIOB_PIN0) | \ - PIN_AFSEL_GPIO(GPIOB_PIN1) | \ - PIN_AFSEL_GPIO(GPIOB_I2C0_SCL) | \ - PIN_AFSEL_GPIO(GPIOB_I2C0_SDA) | \ - PIN_AFSEL_GPIO(GPIOB_PIN4) | \ - PIN_AFSEL_GPIO(GPIOB_PIN5) | \ - PIN_AFSEL_GPIO(GPIOB_PIN6) | \ - PIN_AFSEL_GPIO(GPIOB_PIN7)) - -#define VAL_GPIOB_DR2R (PIN_DRxR_ENABLE(GPIOB_PIN0) | \ - PIN_DRxR_ENABLE(GPIOB_PIN1) | \ - PIN_DRxR_ENABLE(GPIOB_I2C0_SCL) | \ - PIN_DRxR_ENABLE(GPIOB_I2C0_SDA) | \ - PIN_DRxR_ENABLE(GPIOB_PIN4) | \ - PIN_DRxR_ENABLE(GPIOB_PIN5) | \ - PIN_DRxR_ENABLE(GPIOB_PIN6) | \ - PIN_DRxR_ENABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_DR4R (PIN_DRxR_DISABLE(GPIOB_PIN0) | \ - PIN_DRxR_DISABLE(GPIOB_PIN1) | \ - PIN_DRxR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_DRxR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_DRxR_DISABLE(GPIOB_PIN4) | \ - PIN_DRxR_DISABLE(GPIOB_PIN5) | \ - PIN_DRxR_DISABLE(GPIOB_PIN6) | \ - PIN_DRxR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_DR8R (PIN_DRxR_DISABLE(GPIOB_PIN0) | \ - PIN_DRxR_DISABLE(GPIOB_PIN1) | \ - PIN_DRxR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_DRxR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_DRxR_DISABLE(GPIOB_PIN4) | \ - PIN_DRxR_DISABLE(GPIOB_PIN5) | \ - PIN_DRxR_DISABLE(GPIOB_PIN6) | \ - PIN_DRxR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_ODR (PIN_ODR_DISABLE(GPIOB_PIN0) | \ - PIN_ODR_DISABLE(GPIOB_PIN1) | \ - PIN_ODR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_ODR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_ODR_DISABLE(GPIOB_PIN4) | \ - PIN_ODR_DISABLE(GPIOB_PIN5) | \ - PIN_ODR_DISABLE(GPIOB_PIN6) | \ - PIN_ODR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_PUR (PIN_PxR_DISABLE(GPIOB_PIN0) | \ - PIN_PxR_DISABLE(GPIOB_PIN1) | \ - PIN_PxR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_PxR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_PxR_DISABLE(GPIOB_PIN4) | \ - PIN_PxR_DISABLE(GPIOB_PIN5) | \ - PIN_PxR_DISABLE(GPIOB_PIN6) | \ - PIN_PxR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_PDR (PIN_PxR_DISABLE(GPIOB_PIN0) | \ - PIN_PxR_DISABLE(GPIOB_PIN1) | \ - PIN_PxR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_PxR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_PxR_DISABLE(GPIOB_PIN4) | \ - PIN_PxR_DISABLE(GPIOB_PIN5) | \ - PIN_PxR_DISABLE(GPIOB_PIN6) | \ - PIN_PxR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_SLR (PIN_SLR_DISABLE(GPIOB_PIN0) | \ - PIN_SLR_DISABLE(GPIOB_PIN1) | \ - PIN_SLR_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_SLR_DISABLE(GPIOB_I2C0_SDA) | \ - PIN_SLR_DISABLE(GPIOB_PIN4) | \ - PIN_SLR_DISABLE(GPIOB_PIN5) | \ - PIN_SLR_DISABLE(GPIOB_PIN6) | \ - PIN_SLR_DISABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_DEN (PIN_DEN_ENABLE(GPIOB_PIN0) | \ - PIN_DEN_ENABLE(GPIOB_PIN1) | \ - PIN_DEN_ENABLE(GPIOB_I2C0_SCL) | \ - PIN_DEN_ENABLE(GPIOB_I2C0_SDA) | \ - PIN_DEN_ENABLE(GPIOB_PIN4) | \ - PIN_DEN_ENABLE(GPIOB_PIN5) | \ - PIN_DEN_ENABLE(GPIOB_PIN6) | \ - PIN_DEN_ENABLE(GPIOB_PIN7)) - -#define VAL_GPIOB_AMSEL (PIN_AMSEL_DISABLE(GPIOB_PIN0) | \ - PIN_AMSEL_DISABLE(GPIOB_PIN1) | \ - PIN_AMSEL_DISABLE(GPIOB_I2C0_SCL) | \ - PIN_AMSEL_DISABLE(GPIOB_I2C0_SDA)) - -#define VAL_GPIOB_PCTL (PIN_PCTL_MODE(GPIOB_PIN0, 0) | \ - PIN_PCTL_MODE(GPIOB_PIN1, 0) | \ - PIN_PCTL_MODE(GPIOB_I2C0_SCL, 0) | \ - PIN_PCTL_MODE(GPIOB_I2C0_SDA, 0) | \ - PIN_PCTL_MODE(GPIOB_PIN4, 0) | \ - PIN_PCTL_MODE(GPIOB_PIN5, 0) | \ - PIN_PCTL_MODE(GPIOB_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOB_PIN7, 0)) - -/* - * GPIOC Setup: - * - * PC0 - TCK_SWCLK (alternate 1) - * PC1 - TMS_SWDIO (alternate 1) - * PC2 - TDI (alternate 1) - * PC3 - TDO_SWO (alternate 1) - * PC4 - PIN4 () - * PC5 - PIN5 () - * PC6 - PIN6 () - * PC7 - PIN7 () - */ - -#define VAL_GPIOC_DATA (PIN_DATA_LOW(GPIOC_TCK_SWCLK) | \ - PIN_DATA_LOW(GPIOC_TMS_SWDIO) | \ - PIN_DATA_LOW(GPIOC_TDI) | \ - PIN_DATA_LOW(GPIOC_TDO_SWO) | \ - PIN_DATA_LOW(GPIOC_PIN4) | \ - PIN_DATA_LOW(GPIOC_PIN5) | \ - PIN_DATA_LOW(GPIOC_PIN6) | \ - PIN_DATA_LOW(GPIOC_PIN7)) - -#define VAL_GPIOC_DIR (PIN_DIR_IN(GPIOC_TCK_SWCLK) | \ - PIN_DIR_IN(GPIOC_TMS_SWDIO) | \ - PIN_DIR_IN(GPIOC_TDI) | \ - PIN_DIR_OUT(GPIOC_TDO_SWO) | \ - PIN_DIR_IN(GPIOC_PIN4) | \ - PIN_DIR_IN(GPIOC_PIN5) | \ - PIN_DIR_IN(GPIOC_PIN6) | \ - PIN_DIR_IN(GPIOC_PIN7)) - -#define VAL_GPIOC_AFSEL (PIN_AFSEL_ALTERNATE(GPIOC_TCK_SWCLK) | \ - PIN_AFSEL_ALTERNATE(GPIOC_TMS_SWDIO) | \ - PIN_AFSEL_ALTERNATE(GPIOC_TDI) | \ - PIN_AFSEL_ALTERNATE(GPIOC_TDO_SWO) | \ - PIN_AFSEL_GPIO(GPIOC_PIN4) | \ - PIN_AFSEL_GPIO(GPIOC_PIN5) | \ - PIN_AFSEL_GPIO(GPIOC_PIN6) | \ - PIN_AFSEL_GPIO(GPIOC_PIN7)) - -#define VAL_GPIOC_DR2R (PIN_DRxR_ENABLE(GPIOC_TCK_SWCLK) | \ - PIN_DRxR_ENABLE(GPIOC_TMS_SWDIO) | \ - PIN_DRxR_ENABLE(GPIOC_TDI) | \ - PIN_DRxR_ENABLE(GPIOC_TDO_SWO) | \ - PIN_DRxR_ENABLE(GPIOC_PIN4) | \ - PIN_DRxR_ENABLE(GPIOC_PIN5) | \ - PIN_DRxR_ENABLE(GPIOC_PIN6) | \ - PIN_DRxR_ENABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_DR4R (PIN_DRxR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_DRxR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_DRxR_DISABLE(GPIOC_TDI) | \ - PIN_DRxR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_DRxR_DISABLE(GPIOC_PIN4) | \ - PIN_DRxR_DISABLE(GPIOC_PIN5) | \ - PIN_DRxR_DISABLE(GPIOC_PIN6) | \ - PIN_DRxR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_DR8R (PIN_DRxR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_DRxR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_DRxR_DISABLE(GPIOC_TDI) | \ - PIN_DRxR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_DRxR_DISABLE(GPIOC_PIN4) | \ - PIN_DRxR_DISABLE(GPIOC_PIN5) | \ - PIN_DRxR_DISABLE(GPIOC_PIN6) | \ - PIN_DRxR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_ODR (PIN_ODR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_ODR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_ODR_DISABLE(GPIOC_TDI) | \ - PIN_ODR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_ODR_DISABLE(GPIOC_PIN4) | \ - PIN_ODR_DISABLE(GPIOC_PIN5) | \ - PIN_ODR_DISABLE(GPIOC_PIN6) | \ - PIN_ODR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_PUR (PIN_PxR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_PxR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_PxR_DISABLE(GPIOC_TDI) | \ - PIN_PxR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_PxR_DISABLE(GPIOC_PIN4) | \ - PIN_PxR_DISABLE(GPIOC_PIN5) | \ - PIN_PxR_DISABLE(GPIOC_PIN6) | \ - PIN_PxR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_PDR (PIN_PxR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_PxR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_PxR_DISABLE(GPIOC_TDI) | \ - PIN_PxR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_PxR_DISABLE(GPIOC_PIN4) | \ - PIN_PxR_DISABLE(GPIOC_PIN5) | \ - PIN_PxR_DISABLE(GPIOC_PIN6) | \ - PIN_PxR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_SLR (PIN_SLR_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_SLR_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_SLR_DISABLE(GPIOC_TDI) | \ - PIN_SLR_DISABLE(GPIOC_TDO_SWO) | \ - PIN_SLR_DISABLE(GPIOC_PIN4) | \ - PIN_SLR_DISABLE(GPIOC_PIN5) | \ - PIN_SLR_DISABLE(GPIOC_PIN6) | \ - PIN_SLR_DISABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_DEN (PIN_DEN_ENABLE(GPIOC_TCK_SWCLK) | \ - PIN_DEN_ENABLE(GPIOC_TMS_SWDIO) | \ - PIN_DEN_ENABLE(GPIOC_TDI) | \ - PIN_DEN_ENABLE(GPIOC_TDO_SWO) | \ - PIN_DEN_ENABLE(GPIOC_PIN4) | \ - PIN_DEN_ENABLE(GPIOC_PIN5) | \ - PIN_DEN_ENABLE(GPIOC_PIN6) | \ - PIN_DEN_ENABLE(GPIOC_PIN7)) - -#define VAL_GPIOC_AMSEL (PIN_AMSEL_DISABLE(GPIOC_TCK_SWCLK) | \ - PIN_AMSEL_DISABLE(GPIOC_TMS_SWDIO) | \ - PIN_AMSEL_DISABLE(GPIOC_TDI) | \ - PIN_AMSEL_DISABLE(GPIOC_TDO_SWO)) - -#define VAL_GPIOC_PCTL (PIN_PCTL_MODE(GPIOC_TCK_SWCLK, 1) | \ - PIN_PCTL_MODE(GPIOC_TMS_SWDIO, 1) | \ - PIN_PCTL_MODE(GPIOC_TDI, 1) | \ - PIN_PCTL_MODE(GPIOC_TDO_SWO, 1) | \ - PIN_PCTL_MODE(GPIOC_PIN4, 0) | \ - PIN_PCTL_MODE(GPIOC_PIN5, 0) | \ - PIN_PCTL_MODE(GPIOC_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOC_PIN7, 0)) - -/* - * GPIOD Setup: - * - * PD0 - PIN0 () - * PD1 - PIN1 () - * PD2 - PIN2 () - * PD3 - PIN3 () - * PD4 - PIN4 () - * PD5 - PIN5 () - * PD6 - PIN6 () - * PD7 - PIN7 () - */ -#define VAL_GPIOD_DATA (PIN_DATA_LOW(GPIOD_PIN0) | \ - PIN_DATA_LOW(GPIOD_PIN1) | \ - PIN_DATA_LOW(GPIOD_PIN2) | \ - PIN_DATA_LOW(GPIOD_PIN3) | \ - PIN_DATA_LOW(GPIOD_PIN4) | \ - PIN_DATA_LOW(GPIOD_PIN5) | \ - PIN_DATA_LOW(GPIOD_PIN6) | \ - PIN_DATA_LOW(GPIOD_PIN7)) - -#define VAL_GPIOD_DIR (PIN_DIR_IN(GPIOD_PIN0) | \ - PIN_DIR_IN(GPIOD_PIN1) | \ - PIN_DIR_IN(GPIOD_PIN2) | \ - PIN_DIR_IN(GPIOD_PIN3) | \ - PIN_DIR_IN(GPIOD_PIN4) | \ - PIN_DIR_IN(GPIOD_PIN5) | \ - PIN_DIR_IN(GPIOD_PIN6) | \ - PIN_DIR_IN(GPIOD_PIN7)) - -#define VAL_GPIOD_AFSEL (PIN_AFSEL_GPIO(GPIOD_PIN0) | \ - PIN_AFSEL_GPIO(GPIOD_PIN1) | \ - PIN_AFSEL_GPIO(GPIOD_PIN2) | \ - PIN_AFSEL_GPIO(GPIOD_PIN3) | \ - PIN_AFSEL_GPIO(GPIOD_PIN4) | \ - PIN_AFSEL_GPIO(GPIOD_PIN5) | \ - PIN_AFSEL_GPIO(GPIOD_PIN6) | \ - PIN_AFSEL_GPIO(GPIOD_PIN7)) - -#define VAL_GPIOD_DR2R (PIN_DRxR_ENABLE(GPIOD_PIN0) | \ - PIN_DRxR_ENABLE(GPIOD_PIN1) | \ - PIN_DRxR_ENABLE(GPIOD_PIN2) | \ - PIN_DRxR_ENABLE(GPIOD_PIN3) | \ - PIN_DRxR_ENABLE(GPIOD_PIN4) | \ - PIN_DRxR_ENABLE(GPIOD_PIN5) | \ - PIN_DRxR_ENABLE(GPIOD_PIN6) | \ - PIN_DRxR_ENABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_DR4R (PIN_DRxR_DISABLE(GPIOD_PIN0) | \ - PIN_DRxR_DISABLE(GPIOD_PIN1) | \ - PIN_DRxR_DISABLE(GPIOD_PIN2) | \ - PIN_DRxR_DISABLE(GPIOD_PIN3) | \ - PIN_DRxR_DISABLE(GPIOD_PIN4) | \ - PIN_DRxR_DISABLE(GPIOD_PIN5) | \ - PIN_DRxR_DISABLE(GPIOD_PIN6) | \ - PIN_DRxR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_DR8R (PIN_DRxR_DISABLE(GPIOD_PIN0) | \ - PIN_DRxR_DISABLE(GPIOD_PIN1) | \ - PIN_DRxR_DISABLE(GPIOD_PIN2) | \ - PIN_DRxR_DISABLE(GPIOD_PIN3) | \ - PIN_DRxR_DISABLE(GPIOD_PIN4) | \ - PIN_DRxR_DISABLE(GPIOD_PIN5) | \ - PIN_DRxR_DISABLE(GPIOD_PIN6) | \ - PIN_DRxR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_ODR (PIN_ODR_DISABLE(GPIOD_PIN0) | \ - PIN_ODR_DISABLE(GPIOD_PIN1) | \ - PIN_ODR_DISABLE(GPIOD_PIN2) | \ - PIN_ODR_DISABLE(GPIOD_PIN3) | \ - PIN_ODR_DISABLE(GPIOD_PIN4) | \ - PIN_ODR_DISABLE(GPIOD_PIN5) | \ - PIN_ODR_DISABLE(GPIOD_PIN6) | \ - PIN_ODR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_PUR (PIN_PxR_DISABLE(GPIOD_PIN0) | \ - PIN_PxR_DISABLE(GPIOD_PIN1) | \ - PIN_PxR_DISABLE(GPIOD_PIN2) | \ - PIN_PxR_DISABLE(GPIOD_PIN3) | \ - PIN_PxR_DISABLE(GPIOD_PIN4) | \ - PIN_PxR_DISABLE(GPIOD_PIN5) | \ - PIN_PxR_DISABLE(GPIOD_PIN6) | \ - PIN_PxR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_PDR (PIN_PxR_DISABLE(GPIOD_PIN0) | \ - PIN_PxR_DISABLE(GPIOD_PIN1) | \ - PIN_PxR_DISABLE(GPIOD_PIN2) | \ - PIN_PxR_DISABLE(GPIOD_PIN3) | \ - PIN_PxR_DISABLE(GPIOD_PIN4) | \ - PIN_PxR_DISABLE(GPIOD_PIN5) | \ - PIN_PxR_DISABLE(GPIOD_PIN6) | \ - PIN_PxR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_SLR (PIN_SLR_DISABLE(GPIOD_PIN0) | \ - PIN_SLR_DISABLE(GPIOD_PIN1) | \ - PIN_SLR_DISABLE(GPIOD_PIN2) | \ - PIN_SLR_DISABLE(GPIOD_PIN3) | \ - PIN_SLR_DISABLE(GPIOD_PIN4) | \ - PIN_SLR_DISABLE(GPIOD_PIN5) | \ - PIN_SLR_DISABLE(GPIOD_PIN6) | \ - PIN_SLR_DISABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_DEN (PIN_DEN_ENABLE(GPIOD_PIN0) | \ - PIN_DEN_ENABLE(GPIOD_PIN1) | \ - PIN_DEN_ENABLE(GPIOD_PIN2) | \ - PIN_DEN_ENABLE(GPIOD_PIN3) | \ - PIN_DEN_ENABLE(GPIOD_PIN4) | \ - PIN_DEN_ENABLE(GPIOD_PIN5) | \ - PIN_DEN_ENABLE(GPIOD_PIN6) | \ - PIN_DEN_ENABLE(GPIOD_PIN7)) - -#define VAL_GPIOD_AMSEL (PIN_AMSEL_DISABLE(GPIOD_PIN0) | \ - PIN_AMSEL_DISABLE(GPIOD_PIN1) | \ - PIN_AMSEL_DISABLE(GPIOD_PIN2) | \ - PIN_AMSEL_DISABLE(GPIOD_PIN3)) - -#define VAL_GPIOD_PCTL (PIN_PCTL_MODE(GPIOD_PIN0, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN1, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN2, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN3, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN4, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN5, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOD_PIN7, 0)) - -/* - * GPIOE Setup: - * - * PE0 - PIN0 () - * PE1 - PIN1 () - * PE2 - PIN2 () - * PE3 - PIN3 () - * PE4 - PIN4 () - * PE5 - PIN5 () - * PE6 - PIN6 () - * PE7 - PIN7 () - */ -#define VAL_GPIOE_DATA (PIN_DATA_LOW(GPIOE_PIN0) | \ - PIN_DATA_LOW(GPIOE_PIN1) | \ - PIN_DATA_LOW(GPIOE_PIN2) | \ - PIN_DATA_LOW(GPIOE_PIN3) | \ - PIN_DATA_LOW(GPIOE_PIN4) | \ - PIN_DATA_LOW(GPIOE_PIN5) | \ - PIN_DATA_LOW(GPIOE_PIN6) | \ - PIN_DATA_LOW(GPIOE_PIN7)) - -#define VAL_GPIOE_DIR (PIN_DIR_IN(GPIOE_PIN0) | \ - PIN_DIR_IN(GPIOE_PIN1) | \ - PIN_DIR_IN(GPIOE_PIN2) | \ - PIN_DIR_IN(GPIOE_PIN3) | \ - PIN_DIR_IN(GPIOE_PIN4) | \ - PIN_DIR_IN(GPIOE_PIN5) | \ - PIN_DIR_IN(GPIOE_PIN6) | \ - PIN_DIR_IN(GPIOE_PIN7)) - -#define VAL_GPIOE_AFSEL (PIN_AFSEL_GPIO(GPIOE_PIN0) | \ - PIN_AFSEL_GPIO(GPIOE_PIN1) | \ - PIN_AFSEL_GPIO(GPIOE_PIN2) | \ - PIN_AFSEL_GPIO(GPIOE_PIN3) | \ - PIN_AFSEL_GPIO(GPIOE_PIN4) | \ - PIN_AFSEL_GPIO(GPIOE_PIN5) | \ - PIN_AFSEL_GPIO(GPIOE_PIN6) | \ - PIN_AFSEL_GPIO(GPIOE_PIN7)) - -#define VAL_GPIOE_DR2R (PIN_DRxR_ENABLE(GPIOE_PIN0) | \ - PIN_DRxR_ENABLE(GPIOE_PIN1) | \ - PIN_DRxR_ENABLE(GPIOE_PIN2) | \ - PIN_DRxR_ENABLE(GPIOE_PIN3) | \ - PIN_DRxR_ENABLE(GPIOE_PIN4) | \ - PIN_DRxR_ENABLE(GPIOE_PIN5) | \ - PIN_DRxR_ENABLE(GPIOE_PIN6) | \ - PIN_DRxR_ENABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_DR4R (PIN_DRxR_DISABLE(GPIOE_PIN0) | \ - PIN_DRxR_DISABLE(GPIOE_PIN1) | \ - PIN_DRxR_DISABLE(GPIOE_PIN2) | \ - PIN_DRxR_DISABLE(GPIOE_PIN3) | \ - PIN_DRxR_DISABLE(GPIOE_PIN4) | \ - PIN_DRxR_DISABLE(GPIOE_PIN5) | \ - PIN_DRxR_DISABLE(GPIOE_PIN6) | \ - PIN_DRxR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_DR8R (PIN_DRxR_DISABLE(GPIOE_PIN0) | \ - PIN_DRxR_DISABLE(GPIOE_PIN1) | \ - PIN_DRxR_DISABLE(GPIOE_PIN2) | \ - PIN_DRxR_DISABLE(GPIOE_PIN3) | \ - PIN_DRxR_DISABLE(GPIOE_PIN4) | \ - PIN_DRxR_DISABLE(GPIOE_PIN5) | \ - PIN_DRxR_DISABLE(GPIOE_PIN6) | \ - PIN_DRxR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_ODR (PIN_ODR_DISABLE(GPIOE_PIN0) | \ - PIN_ODR_DISABLE(GPIOE_PIN1) | \ - PIN_ODR_DISABLE(GPIOE_PIN2) | \ - PIN_ODR_DISABLE(GPIOE_PIN3) | \ - PIN_ODR_DISABLE(GPIOE_PIN4) | \ - PIN_ODR_DISABLE(GPIOE_PIN5) | \ - PIN_ODR_DISABLE(GPIOE_PIN6) | \ - PIN_ODR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_PUR (PIN_PxR_DISABLE(GPIOE_PIN0) | \ - PIN_PxR_DISABLE(GPIOE_PIN1) | \ - PIN_PxR_DISABLE(GPIOE_PIN2) | \ - PIN_PxR_DISABLE(GPIOE_PIN3) | \ - PIN_PxR_DISABLE(GPIOE_PIN4) | \ - PIN_PxR_DISABLE(GPIOE_PIN5) | \ - PIN_PxR_DISABLE(GPIOE_PIN6) | \ - PIN_PxR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_PDR (PIN_PxR_DISABLE(GPIOE_PIN0) | \ - PIN_PxR_DISABLE(GPIOE_PIN1) | \ - PIN_PxR_DISABLE(GPIOE_PIN2) | \ - PIN_PxR_DISABLE(GPIOE_PIN3) | \ - PIN_PxR_DISABLE(GPIOE_PIN4) | \ - PIN_PxR_DISABLE(GPIOE_PIN5) | \ - PIN_PxR_DISABLE(GPIOE_PIN6) | \ - PIN_PxR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_SLR (PIN_SLR_DISABLE(GPIOE_PIN0) | \ - PIN_SLR_DISABLE(GPIOE_PIN1) | \ - PIN_SLR_DISABLE(GPIOE_PIN2) | \ - PIN_SLR_DISABLE(GPIOE_PIN3) | \ - PIN_SLR_DISABLE(GPIOE_PIN4) | \ - PIN_SLR_DISABLE(GPIOE_PIN5) | \ - PIN_SLR_DISABLE(GPIOE_PIN6) | \ - PIN_SLR_DISABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_DEN (PIN_DEN_ENABLE(GPIOE_PIN0) | \ - PIN_DEN_ENABLE(GPIOE_PIN1) | \ - PIN_DEN_ENABLE(GPIOE_PIN2) | \ - PIN_DEN_ENABLE(GPIOE_PIN3) | \ - PIN_DEN_ENABLE(GPIOE_PIN4) | \ - PIN_DEN_ENABLE(GPIOE_PIN5) | \ - PIN_DEN_ENABLE(GPIOE_PIN6) | \ - PIN_DEN_ENABLE(GPIOE_PIN7)) - -#define VAL_GPIOE_AMSEL (PIN_AMSEL_DISABLE(GPIOE_PIN0) | \ - PIN_AMSEL_DISABLE(GPIOE_PIN1) | \ - PIN_AMSEL_DISABLE(GPIOE_PIN2) | \ - PIN_AMSEL_DISABLE(GPIOE_PIN3)) - -#define VAL_GPIOE_PCTL (PIN_PCTL_MODE(GPIOE_PIN0, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN1, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN2, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN3, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN4, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN5, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOE_PIN7, 0)) - -/* - * GPIOF Setup: - * - * PF0 - SW2 () - * PF1 - LED_RED () - * PF2 - LED_BLUE () - * PF3 - LED_GREEN () - * PF4 - SW1 () - * PF5 - PIN5 () - * PF6 - PIN6 () - * PF7 - PIN7 () - */ - -#define VAL_GPIOF_DATA (PIN_DATA_LOW(GPIOF_SW2) | \ - PIN_DATA_LOW(GPIOF_LED_RED) | \ - PIN_DATA_LOW(GPIOF_LED_BLUE) | \ - PIN_DATA_LOW(GPIOF_LED_GREEN) | \ - PIN_DATA_LOW(GPIOF_SW1) | \ - PIN_DATA_LOW(GPIOF_PIN5) | \ - PIN_DATA_LOW(GPIOF_PIN6) | \ - PIN_DATA_LOW(GPIOF_PIN7)) - -#define VAL_GPIOF_DIR (PIN_DIR_IN(GPIOF_SW2) | \ - PIN_DIR_IN(GPIOF_LED_RED) | \ - PIN_DIR_IN(GPIOF_LED_BLUE) | \ - PIN_DIR_IN(GPIOF_LED_GREEN) | \ - PIN_DIR_IN(GPIOF_SW1) | \ - PIN_DIR_IN(GPIOF_PIN5) | \ - PIN_DIR_IN(GPIOF_PIN6) | \ - PIN_DIR_IN(GPIOF_PIN7)) - -#define VAL_GPIOF_AFSEL (PIN_AFSEL_GPIO(GPIOF_SW2) | \ - PIN_AFSEL_GPIO(GPIOF_LED_RED) | \ - PIN_AFSEL_GPIO(GPIOF_LED_BLUE) | \ - PIN_AFSEL_GPIO(GPIOF_LED_GREEN) | \ - PIN_AFSEL_GPIO(GPIOF_SW1) | \ - PIN_AFSEL_GPIO(GPIOF_PIN5) | \ - PIN_AFSEL_GPIO(GPIOF_PIN6) | \ - PIN_AFSEL_GPIO(GPIOF_PIN7)) - -#define VAL_GPIOF_DR2R (PIN_DRxR_ENABLE(GPIOF_SW2) | \ - PIN_DRxR_ENABLE(GPIOF_LED_RED) | \ - PIN_DRxR_ENABLE(GPIOF_LED_BLUE) | \ - PIN_DRxR_ENABLE(GPIOF_LED_GREEN) | \ - PIN_DRxR_ENABLE(GPIOF_SW1) | \ - PIN_DRxR_ENABLE(GPIOF_PIN5) | \ - PIN_DRxR_ENABLE(GPIOF_PIN6) | \ - PIN_DRxR_ENABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_DR4R (PIN_DRxR_DISABLE(GPIOF_SW2) | \ - PIN_DRxR_DISABLE(GPIOF_LED_RED) | \ - PIN_DRxR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_DRxR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_DRxR_DISABLE(GPIOF_SW1) | \ - PIN_DRxR_DISABLE(GPIOF_PIN5) | \ - PIN_DRxR_DISABLE(GPIOF_PIN6) | \ - PIN_DRxR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_DR8R (PIN_DRxR_DISABLE(GPIOF_SW2) | \ - PIN_DRxR_DISABLE(GPIOF_LED_RED) | \ - PIN_DRxR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_DRxR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_DRxR_DISABLE(GPIOF_SW1) | \ - PIN_DRxR_DISABLE(GPIOF_PIN5) | \ - PIN_DRxR_DISABLE(GPIOF_PIN6) | \ - PIN_DRxR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_ODR (PIN_ODR_DISABLE(GPIOF_SW2) | \ - PIN_ODR_DISABLE(GPIOF_LED_RED) | \ - PIN_ODR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_ODR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_ODR_DISABLE(GPIOF_SW1) | \ - PIN_ODR_DISABLE(GPIOF_PIN5) | \ - PIN_ODR_DISABLE(GPIOF_PIN6) | \ - PIN_ODR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_PUR (PIN_PxR_DISABLE(GPIOF_SW2) | \ - PIN_PxR_DISABLE(GPIOF_LED_RED) | \ - PIN_PxR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_PxR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_PxR_DISABLE(GPIOF_SW1) | \ - PIN_PxR_DISABLE(GPIOF_PIN5) | \ - PIN_PxR_DISABLE(GPIOF_PIN6) | \ - PIN_PxR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_PDR (PIN_PxR_DISABLE(GPIOF_SW2) | \ - PIN_PxR_DISABLE(GPIOF_LED_RED) | \ - PIN_PxR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_PxR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_PxR_DISABLE(GPIOF_SW1) | \ - PIN_PxR_DISABLE(GPIOF_PIN5) | \ - PIN_PxR_DISABLE(GPIOF_PIN6) | \ - PIN_PxR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_SLR (PIN_SLR_DISABLE(GPIOF_SW2) | \ - PIN_SLR_DISABLE(GPIOF_LED_RED) | \ - PIN_SLR_DISABLE(GPIOF_LED_BLUE) | \ - PIN_SLR_DISABLE(GPIOF_LED_GREEN) | \ - PIN_SLR_DISABLE(GPIOF_SW1) | \ - PIN_SLR_DISABLE(GPIOF_PIN5) | \ - PIN_SLR_DISABLE(GPIOF_PIN6) | \ - PIN_SLR_DISABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_DEN (PIN_DEN_ENABLE(GPIOF_SW2) | \ - PIN_DEN_ENABLE(GPIOF_LED_RED) | \ - PIN_DEN_ENABLE(GPIOF_LED_BLUE) | \ - PIN_DEN_ENABLE(GPIOF_LED_GREEN) | \ - PIN_DEN_ENABLE(GPIOF_SW1) | \ - PIN_DEN_ENABLE(GPIOF_PIN5) | \ - PIN_DEN_ENABLE(GPIOF_PIN6) | \ - PIN_DEN_ENABLE(GPIOF_PIN7)) - -#define VAL_GPIOF_AMSEL (PIN_AMSEL_DISABLE(GPIOF_SW2) | \ - PIN_AMSEL_DISABLE(GPIOF_LED_RED) | \ - PIN_AMSEL_DISABLE(GPIOF_LED_BLUE) | \ - PIN_AMSEL_DISABLE(GPIOF_LED_GREEN)) - -#define VAL_GPIOF_PCTL (PIN_PCTL_MODE(GPIOF_SW2, 0) | \ - PIN_PCTL_MODE(GPIOF_LED_RED, 0) | \ - PIN_PCTL_MODE(GPIOF_LED_BLUE, 0) | \ - PIN_PCTL_MODE(GPIOF_LED_GREEN, 0) | \ - PIN_PCTL_MODE(GPIOF_SW1, 0) | \ - PIN_PCTL_MODE(GPIOF_PIN5, 0) | \ - PIN_PCTL_MODE(GPIOF_PIN6, 0) | \ - PIN_PCTL_MODE(GPIOF_PIN7, 0)) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.mk deleted file mode 100644 index 8232a30..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.c - -# Required include directories -BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/TI_TM4C123G_LAUNCHPAD diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.c b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.c deleted file mode 100644 index 437dcf8..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -#if HAL_USE_PAL || defined(__DOXYGEN__) -const PALConfig pal_default_config = -{ - {VAL_GPIOA_DATA, VAL_GPIOA_DIR, VAL_GPIOA_AFSEL, VAL_GPIOA_DR2R, - VAL_GPIOA_DR4R, VAL_GPIOA_DR8R, VAL_GPIOA_ODR, VAL_GPIOA_PUR, - VAL_GPIOA_PDR, VAL_GPIOA_SLR, VAL_GPIOA_DEN, VAL_GPIOA_AMSEL, - VAL_GPIOA_PCTL}, - {VAL_GPIOB_DATA, VAL_GPIOB_DIR, VAL_GPIOB_AFSEL, VAL_GPIOB_DR2R, - VAL_GPIOB_DR4R, VAL_GPIOB_DR8R, VAL_GPIOB_ODR, VAL_GPIOB_PUR, - VAL_GPIOB_PDR, VAL_GPIOB_SLR, VAL_GPIOB_DEN, VAL_GPIOB_AMSEL, - VAL_GPIOB_PCTL}, - {VAL_GPIOC_DATA, VAL_GPIOC_DIR, VAL_GPIOC_AFSEL, VAL_GPIOC_DR2R, - VAL_GPIOC_DR4R, VAL_GPIOC_DR8R, VAL_GPIOC_ODR, VAL_GPIOC_PUR, - VAL_GPIOC_PDR, VAL_GPIOC_SLR, VAL_GPIOC_DEN, VAL_GPIOC_AMSEL, - VAL_GPIOC_PCTL}, - {VAL_GPIOD_DATA, VAL_GPIOD_DIR, VAL_GPIOD_AFSEL, VAL_GPIOD_DR2R, - VAL_GPIOD_DR4R, VAL_GPIOD_DR8R, VAL_GPIOD_ODR, VAL_GPIOD_PUR, - VAL_GPIOD_PDR, VAL_GPIOD_SLR, VAL_GPIOD_DEN, VAL_GPIOD_AMSEL, - VAL_GPIOD_PCTL}, - {VAL_GPIOE_DATA, VAL_GPIOE_DIR, VAL_GPIOE_AFSEL, VAL_GPIOE_DR2R, - VAL_GPIOE_DR4R, VAL_GPIOE_DR8R, VAL_GPIOE_ODR, VAL_GPIOE_PUR, - VAL_GPIOE_PDR, VAL_GPIOE_SLR, VAL_GPIOE_DEN, VAL_GPIOE_AMSEL, - VAL_GPIOE_PCTL}, - {VAL_GPIOF_DATA, VAL_GPIOF_DIR, VAL_GPIOF_AFSEL, VAL_GPIOF_DR2R, - VAL_GPIOF_DR4R, VAL_GPIOF_DR8R, VAL_GPIOF_ODR, VAL_GPIOF_PUR, - VAL_GPIOF_PDR, VAL_GPIOF_SLR, VAL_GPIOF_DEN, VAL_GPIOF_AMSEL, - VAL_GPIOF_PCTL}, - {VAL_GPIOG_DATA, VAL_GPIOG_DIR, VAL_GPIOG_AFSEL, VAL_GPIOG_DR2R, - VAL_GPIOG_DR4R, VAL_GPIOG_DR8R, VAL_GPIOG_ODR, VAL_GPIOG_PUR, - VAL_GPIOG_PDR, VAL_GPIOG_SLR, VAL_GPIOG_DEN, VAL_GPIOG_AMSEL, - VAL_GPIOG_PCTL}, - {VAL_GPIOH_DATA, VAL_GPIOH_DIR, VAL_GPIOH_AFSEL, VAL_GPIOH_DR2R, - VAL_GPIOH_DR4R, VAL_GPIOH_DR8R, VAL_GPIOH_ODR, VAL_GPIOH_PUR, - VAL_GPIOH_PDR, VAL_GPIOH_SLR, VAL_GPIOH_DEN, VAL_GPIOH_AMSEL, - VAL_GPIOH_PCTL}, - {VAL_GPIOJ_DATA, VAL_GPIOJ_DIR, VAL_GPIOJ_AFSEL, VAL_GPIOJ_DR2R, - VAL_GPIOJ_DR4R, VAL_GPIOJ_DR8R, VAL_GPIOJ_ODR, VAL_GPIOJ_PUR, - VAL_GPIOJ_PDR, VAL_GPIOJ_SLR, VAL_GPIOJ_DEN, VAL_GPIOJ_AMSEL, - VAL_GPIOJ_PCTL}, - {VAL_GPIOK_DATA, VAL_GPIOK_DIR, VAL_GPIOK_AFSEL, VAL_GPIOK_DR2R, - VAL_GPIOK_DR4R, VAL_GPIOK_DR8R, VAL_GPIOK_ODR, VAL_GPIOK_PUR, - VAL_GPIOK_PDR, VAL_GPIOK_SLR, VAL_GPIOK_DEN, VAL_GPIOK_AMSEL, - VAL_GPIOK_PCTL}, - {VAL_GPIOL_DATA, VAL_GPIOL_DIR, VAL_GPIOL_AFSEL, VAL_GPIOL_DR2R, - VAL_GPIOL_DR4R, VAL_GPIOL_DR8R, VAL_GPIOL_ODR, VAL_GPIOL_PUR, - VAL_GPIOL_PDR, VAL_GPIOL_SLR, VAL_GPIOL_DEN, VAL_GPIOL_AMSEL, - VAL_GPIOL_PCTL}, - {VAL_GPIOM_DATA, VAL_GPIOM_DIR, VAL_GPIOM_AFSEL, VAL_GPIOM_DR2R, - VAL_GPIOM_DR4R, VAL_GPIOM_DR8R, VAL_GPIOM_ODR, VAL_GPIOM_PUR, - VAL_GPIOM_PDR, VAL_GPIOM_SLR, VAL_GPIOM_DEN, VAL_GPIOM_AMSEL, - VAL_GPIOM_PCTL}, - {VAL_GPION_DATA, VAL_GPION_DIR, VAL_GPION_AFSEL, VAL_GPION_DR2R, - VAL_GPION_DR4R, VAL_GPION_DR8R, VAL_GPION_ODR, VAL_GPION_PUR, - VAL_GPION_PDR, VAL_GPION_SLR, VAL_GPION_DEN, VAL_GPION_AMSEL, - VAL_GPION_PCTL}, - {VAL_GPIOP_DATA, VAL_GPIOP_DIR, VAL_GPIOP_AFSEL, VAL_GPIOP_DR2R, - VAL_GPIOP_DR4R, VAL_GPIOP_DR8R, VAL_GPIOP_ODR, VAL_GPIOP_PUR, - VAL_GPIOP_PDR, VAL_GPIOP_SLR, VAL_GPIOP_DEN, VAL_GPIOP_AMSEL, - VAL_GPIOP_PCTL}, - {VAL_GPIOQ_DATA, VAL_GPIOQ_DIR, VAL_GPIOQ_AFSEL, VAL_GPIOQ_DR2R, - VAL_GPIOQ_DR4R, VAL_GPIOQ_DR8R, VAL_GPIOQ_ODR, VAL_GPIOQ_PUR, - VAL_GPIOQ_PDR, VAL_GPIOQ_SLR, VAL_GPIOQ_DEN, VAL_GPIOQ_AMSEL, - VAL_GPIOQ_PCTL} -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization is performed just after reset before BSS and - * DATA segments initialization. - */ -void __early_init(void) { - tiva_clock_init(); -} - -/** - * @brief Late initialization code. - * @note This initialization is performed after BSS and DATA segments - * initialization and before invoking the main() function. - */ -void boardInit(void) { -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h deleted file mode 100644 index 08bb36f..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.h +++ /dev/null @@ -1,429 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for Texas Instruments TM4C1294 Launchpad Board. - */ - -/* - * Board identifier. - */ -#define BOARD_TI_TM4C1294_LAUNCHPAD -#define BOARD_NAME "Texas Instruments TM4C1294 Launchpad" - -/* - * Ethernet PHY type. - */ -#define BOARD_PHY_ADDR 0 /* 0 is internal PHY */ -#define BOARD_PHY_ID 0x2000A221 /* internal PHY ID */ -/* uncomment when using RMII */ -//#define BOARD_PHY_RMII - -/* - * MCU type - */ -//#define TM4C1290NCPDT -//#define TM4C1290NCZAD -//#define TM4C1292NCPDT -//#define TM4C1292NCZAD -//#define TM4C1294KCPDT -#define TM4C1294NCPDT -//#define TM4C1294NCZAD -//#define TM4C1297NCZAD -//#define TM4C1299KCZAD -//#define TM4C1299NCZAD -//#define TM4C129CNCPDT -//#define TM4C129CNCZAD -//#define TM4C129DNCPDT -//#define TM4C129DNCZAD -//#define TM4C129EKCPDT -//#define TM4C129ENCPDT -//#define TM4C129ENCZAD -//#define TM4C129LNCZAD -//#define TM4C129XKCZAD -//#define TM4C129XNCZAD - -/* - * Board oscillators-related settings. - */ -#define TIVA_XTAL_VALUE 25000000 - -/* - * IO pins assignments. - */ -#define GPIOA_UART0_RX 0 -#define GPIOA_UART0_TX 1 -#define GPIOA_PIN2 2 -#define GPIOA_PIN3 3 -#define GPIOA_PIN4 4 -#define GPIOA_PIN5 5 -#define GPIOA_PIN6 6 -#define GPIOA_PIN7 7 - -#define GPIOB_PIN0 0 -#define GPIOB_PIN1 1 -#define GPIOB_PIN2 2 -#define GPIOB_PIN3 3 -#define GPIOB_PIN4 4 -#define GPIOB_PIN5 5 -#define GPIOB_PIN6 6 -#define GPIOB_PIN7 7 - -#define GPIOC_TCK_SWCLK 0 -#define GPIOC_TMS_SWDIO 1 -#define GPIOC_TDI 2 -#define GPIOC_TDO_SWO 3 -#define GPIOC_PIN4 4 -#define GPIOC_PIN5 5 -#define GPIOC_PIN6 6 -#define GPIOC_PIN7 7 - -#define GPIOD_PIN0 0 -#define GPIOD_PIN1 1 -#define GPIOD_PIN2 2 -#define GPIOD_PIN3 3 -#define GPIOD_PIN4 4 -#define GPIOD_PIN5 5 -#define GPIOD_PIN6 6 -#define GPIOD_PIN7 7 - -#define GPIOE_PIN0 0 -#define GPIOE_PIN1 1 -#define GPIOE_PIN2 2 -#define GPIOE_PIN3 3 -#define GPIOE_PIN4 4 -#define GPIOE_PIN5 5 -#define GPIOE_PIN6 6 -#define GPIOE_PIN7 7 - -#define GPIOF_LED0 0 -#define GPIOF_PIN1 1 -#define GPIOF_PIN2 2 -#define GPIOF_PIN3 3 -#define GPIOF_LED1 4 -#define GPIOF_PIN5 5 -#define GPIOF_PIN6 6 -#define GPIOF_PIN7 7 - -#define GPIOG_PIN0 0 -#define GPIOG_PIN1 1 -#define GPIOG_PIN2 2 -#define GPIOG_PIN3 3 -#define GPIOG_PIN4 4 -#define GPIOG_PIN5 5 -#define GPIOG_PIN6 6 -#define GPIOG_PIN7 7 - -#define GPIOH_PIN0 0 -#define GPIOH_PIN1 1 -#define GPIOH_PIN2 2 -#define GPIOH_PIN3 3 -#define GPIOH_PIN4 4 -#define GPIOH_PIN5 5 -#define GPIOH_PIN6 6 -#define GPIOH_PIN7 7 - -#define GPIOJ_SW1 0 -#define GPIOJ_PIN1 1 -#define GPIOJ_PIN2 2 -#define GPIOJ_PIN3 3 -#define GPIOJ_PIN4 4 -#define GPIOJ_PIN5 5 -#define GPIOJ_PIN6 6 -#define GPIOJ_PIN7 7 - -#define GPIOK_PIN0 0 -#define GPIOK_PIN1 1 -#define GPIOK_PIN2 2 -#define GPIOK_PIN3 3 -#define GPIOK_PIN4 4 -#define GPIOK_PIN5 5 -#define GPIOK_PIN6 6 -#define GPIOK_PIN7 7 - -#define GPIOL_PIN0 0 -#define GPIOL_PIN1 1 -#define GPIOL_PIN2 2 -#define GPIOL_PIN3 3 -#define GPIOL_PIN4 4 -#define GPIOL_PIN5 5 -#define GPIOL_PIN6 6 -#define GPIOL_PIN7 7 - -#define GPIOM_PIN0 0 -#define GPIOM_PIN1 1 -#define GPIOM_PIN2 2 -#define GPIOM_PIN3 3 -#define GPIOM_PIN4 4 -#define GPIOM_PIN5 5 -#define GPIOM_PIN6 6 -#define GPIOM_PIN7 7 - -#define GPION_LED2 0 -#define GPION_LED3 1 -#define GPION_PIN2 2 -#define GPION_PIN3 3 -#define GPION_PIN4 4 -#define GPION_PIN5 5 -#define GPION_PIN6 6 -#define GPION_PIN7 7 - -#define GPIOP_PIN0 0 -#define GPIOP_PIN1 1 -#define GPIOP_PIN2 2 -#define GPIOP_PIN3 3 -#define GPIOP_PIN4 4 -#define GPIOP_PIN5 5 -#define GPIOP_PIN6 6 -#define GPIOP_PIN7 7 - -#define GPIOQ_PIN0 0 -#define GPIOQ_PIN1 1 -#define GPIOQ_PIN2 2 -#define GPIOQ_PIN3 3 -#define GPIOQ_PIN4 4 -#define GPIOQ_PIN5 5 -#define GPIOQ_PIN6 6 -#define GPIOQ_PIN7 7 - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - */ -#define VAL_GPIOA_DATA 0b00000000 -#define VAL_GPIOA_DIR 0b00000000 -#define VAL_GPIOA_AFSEL 0b00000000 -#define VAL_GPIOA_DR2R 0b11111111 -#define VAL_GPIOA_DR4R 0b00000000 -#define VAL_GPIOA_DR8R 0b00000000 -#define VAL_GPIOA_ODR 0b00000000 -#define VAL_GPIOA_PUR 0b00000000 -#define VAL_GPIOA_PDR 0b00000000 -#define VAL_GPIOA_SLR 0b00000000 -#define VAL_GPIOA_DEN 0b11111111 -#define VAL_GPIOA_AMSEL 0b0000 -#define VAL_GPIOA_PCTL 0x00000000 - -#define VAL_GPIOB_DATA 0b00000000 -#define VAL_GPIOB_DIR 0b00000000 -#define VAL_GPIOB_AFSEL 0b00000000 -#define VAL_GPIOB_DR2R 0b11111111 -#define VAL_GPIOB_DR4R 0b00000000 -#define VAL_GPIOB_DR8R 0b00000000 -#define VAL_GPIOB_ODR 0b00000000 -#define VAL_GPIOB_PUR 0b00000000 -#define VAL_GPIOB_PDR 0b00000000 -#define VAL_GPIOB_SLR 0b00000000 -#define VAL_GPIOB_DEN 0b11111111 -#define VAL_GPIOB_AMSEL 0b0000 -#define VAL_GPIOB_PCTL 0x00000000 - -#define VAL_GPIOC_DATA 0b00000000 -#define VAL_GPIOC_DIR 0b00001000 -#define VAL_GPIOC_AFSEL 0b00001111 -#define VAL_GPIOC_DR2R 0b11111111 -#define VAL_GPIOC_DR4R 0b00000000 -#define VAL_GPIOC_DR8R 0b00000000 -#define VAL_GPIOC_ODR 0b00000000 -#define VAL_GPIOC_PUR 0b00001111 -#define VAL_GPIOC_PDR 0b00000000 -#define VAL_GPIOC_SLR 0b00000000 -#define VAL_GPIOC_DEN 0b11111111 -#define VAL_GPIOC_AMSEL 0b0000 -#define VAL_GPIOC_PCTL 0x00001111 - -#define VAL_GPIOD_DATA 0b00000000 -#define VAL_GPIOD_DIR 0b00000000 -#define VAL_GPIOD_AFSEL 0b00000000 -#define VAL_GPIOD_DR2R 0b11111111 -#define VAL_GPIOD_DR4R 0b00000000 -#define VAL_GPIOD_DR8R 0b00000000 -#define VAL_GPIOD_ODR 0b00000000 -#define VAL_GPIOD_PUR 0b00000000 -#define VAL_GPIOD_PDR 0b00000000 -#define VAL_GPIOD_SLR 0b00000000 -#define VAL_GPIOD_DEN 0b11111111 -#define VAL_GPIOD_AMSEL 0b0000 -#define VAL_GPIOD_PCTL 0x00000000 - -#define VAL_GPIOE_DATA 0b00000000 -#define VAL_GPIOE_DIR 0b00000000 -#define VAL_GPIOE_AFSEL 0b00000000 -#define VAL_GPIOE_DR2R 0b11111111 -#define VAL_GPIOE_DR4R 0b00000000 -#define VAL_GPIOE_DR8R 0b00000000 -#define VAL_GPIOE_ODR 0b00000000 -#define VAL_GPIOE_PUR 0b00000000 -#define VAL_GPIOE_PDR 0b00000000 -#define VAL_GPIOE_SLR 0b00000000 -#define VAL_GPIOE_DEN 0b11111111 -#define VAL_GPIOE_AMSEL 0b0000 -#define VAL_GPIOE_PCTL 0x00000000 - -#define VAL_GPIOF_DATA 0b00000000 -#define VAL_GPIOF_DIR 0b00000000 -#define VAL_GPIOF_AFSEL 0b00000000 -#define VAL_GPIOF_DR2R 0b11111111 -#define VAL_GPIOF_DR4R 0b00000000 -#define VAL_GPIOF_DR8R 0b00000000 -#define VAL_GPIOF_ODR 0b00000000 -#define VAL_GPIOF_PUR 0b00000000 -#define VAL_GPIOF_PDR 0b00000000 -#define VAL_GPIOF_SLR 0b00000000 -#define VAL_GPIOF_DEN 0b11111111 -#define VAL_GPIOF_AMSEL 0b0000 -#define VAL_GPIOF_PCTL 0x00000000 - -#define VAL_GPIOG_DATA 0b00000000 -#define VAL_GPIOG_DIR 0b00000000 -#define VAL_GPIOG_AFSEL 0b00000000 -#define VAL_GPIOG_DR2R 0b11111111 -#define VAL_GPIOG_DR4R 0b00000000 -#define VAL_GPIOG_DR8R 0b00000000 -#define VAL_GPIOG_ODR 0b00000000 -#define VAL_GPIOG_PUR 0b00000000 -#define VAL_GPIOG_PDR 0b00000000 -#define VAL_GPIOG_SLR 0b00000000 -#define VAL_GPIOG_DEN 0b11111111 -#define VAL_GPIOG_AMSEL 0b0000 -#define VAL_GPIOG_PCTL 0x00000000 - -#define VAL_GPIOH_DATA 0b00000000 -#define VAL_GPIOH_DIR 0b00000000 -#define VAL_GPIOH_AFSEL 0b00000000 -#define VAL_GPIOH_DR2R 0b11111111 -#define VAL_GPIOH_DR4R 0b00000000 -#define VAL_GPIOH_DR8R 0b00000000 -#define VAL_GPIOH_ODR 0b00000000 -#define VAL_GPIOH_PUR 0b00000000 -#define VAL_GPIOH_PDR 0b00000000 -#define VAL_GPIOH_SLR 0b00000000 -#define VAL_GPIOH_DEN 0b11111111 -#define VAL_GPIOH_AMSEL 0b0000 -#define VAL_GPIOH_PCTL 0x00000000 - -#define VAL_GPIOJ_DATA 0b00000000 -#define VAL_GPIOJ_DIR 0b00000000 -#define VAL_GPIOJ_AFSEL 0b00000000 -#define VAL_GPIOJ_DR2R 0b11111111 -#define VAL_GPIOJ_DR4R 0b00000000 -#define VAL_GPIOJ_DR8R 0b00000000 -#define VAL_GPIOJ_ODR 0b00000000 -#define VAL_GPIOJ_PUR 0b00000001 -#define VAL_GPIOJ_PDR 0b00000000 -#define VAL_GPIOJ_SLR 0b00000000 -#define VAL_GPIOJ_DEN 0b11111111 -#define VAL_GPIOJ_AMSEL 0b0000 -#define VAL_GPIOJ_PCTL 0x00000000 - -#define VAL_GPIOK_DATA 0b00000000 -#define VAL_GPIOK_DIR 0b00000000 -#define VAL_GPIOK_AFSEL 0b00000000 -#define VAL_GPIOK_DR2R 0b11111111 -#define VAL_GPIOK_DR4R 0b00000000 -#define VAL_GPIOK_DR8R 0b00000000 -#define VAL_GPIOK_ODR 0b00000000 -#define VAL_GPIOK_PUR 0b00000000 -#define VAL_GPIOK_PDR 0b00000000 -#define VAL_GPIOK_SLR 0b00000000 -#define VAL_GPIOK_DEN 0b11111111 -#define VAL_GPIOK_AMSEL 0b0000 -#define VAL_GPIOK_PCTL 0x00000000 - -#define VAL_GPIOL_DATA 0b00000000 -#define VAL_GPIOL_DIR 0b00000000 -#define VAL_GPIOL_AFSEL 0b00000000 -#define VAL_GPIOL_DR2R 0b11111111 -#define VAL_GPIOL_DR4R 0b00000000 -#define VAL_GPIOL_DR8R 0b00000000 -#define VAL_GPIOL_ODR 0b00000000 -#define VAL_GPIOL_PUR 0b00000000 -#define VAL_GPIOL_PDR 0b00000000 -#define VAL_GPIOL_SLR 0b00000000 -#define VAL_GPIOL_DEN 0b11111111 -#define VAL_GPIOL_AMSEL 0b0000 -#define VAL_GPIOL_PCTL 0x00000000 - -#define VAL_GPIOM_DATA 0b00000000 -#define VAL_GPIOM_DIR 0b00000000 -#define VAL_GPIOM_AFSEL 0b00000000 -#define VAL_GPIOM_DR2R 0b11111111 -#define VAL_GPIOM_DR4R 0b00000000 -#define VAL_GPIOM_DR8R 0b00000000 -#define VAL_GPIOM_ODR 0b00000000 -#define VAL_GPIOM_PUR 0b00000000 -#define VAL_GPIOM_PDR 0b00000000 -#define VAL_GPIOM_SLR 0b00000000 -#define VAL_GPIOM_DEN 0b11111111 -#define VAL_GPIOM_AMSEL 0b0000 -#define VAL_GPIOM_PCTL 0x00000000 - -#define VAL_GPION_DATA 0b00000000 -#define VAL_GPION_DIR 0b00000000 -#define VAL_GPION_AFSEL 0b00000000 -#define VAL_GPION_DR2R 0b11111111 -#define VAL_GPION_DR4R 0b00000000 -#define VAL_GPION_DR8R 0b00000000 -#define VAL_GPION_ODR 0b00000000 -#define VAL_GPION_PUR 0b00000000 -#define VAL_GPION_PDR 0b00000000 -#define VAL_GPION_SLR 0b00000000 -#define VAL_GPION_DEN 0b11111111 -#define VAL_GPION_AMSEL 0b0000 -#define VAL_GPION_PCTL 0x00000000 - -#define VAL_GPIOP_DATA 0b00000000 -#define VAL_GPIOP_DIR 0b00000000 -#define VAL_GPIOP_AFSEL 0b00000000 -#define VAL_GPIOP_DR2R 0b11111111 -#define VAL_GPIOP_DR4R 0b00000000 -#define VAL_GPIOP_DR8R 0b00000000 -#define VAL_GPIOP_ODR 0b00000000 -#define VAL_GPIOP_PUR 0b00000000 -#define VAL_GPIOP_PDR 0b00000000 -#define VAL_GPIOP_SLR 0b00000000 -#define VAL_GPIOP_DEN 0b11111111 -#define VAL_GPIOP_AMSEL 0b0000 -#define VAL_GPIOP_PCTL 0x00000000 - -#define VAL_GPIOQ_DATA 0b00000000 -#define VAL_GPIOQ_DIR 0b00000000 -#define VAL_GPIOQ_AFSEL 0b00000000 -#define VAL_GPIOQ_DR2R 0b11111111 -#define VAL_GPIOQ_DR4R 0b00000000 -#define VAL_GPIOQ_DR8R 0b00000000 -#define VAL_GPIOQ_ODR 0b00000000 -#define VAL_GPIOQ_PUR 0b00000000 -#define VAL_GPIOQ_PDR 0b00000000 -#define VAL_GPIOQ_SLR 0b00000000 -#define VAL_GPIOQ_DEN 0b11111111 -#define VAL_GPIOQ_AMSEL 0b0000 -#define VAL_GPIOQ_PCTL 0x00000000 - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.mk deleted file mode 100644 index 56298eb..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/TI_TM4C1294_LAUNCHPAD/board.c - -# Required include directories -BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/TI_TM4C1294_LAUNCHPAD diff --git a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.c b/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.c deleted file mode 100644 index 9bae7ab..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = -{ - .pads = { - PAL_MODE_OUTPUT_OPENDRAIN, /* P0.0: SDA */ - PAL_MODE_OUTPUT_OPENDRAIN, /* P0.1: SCL */ - PAL_MODE_UNCONNECTED, /* P0.2 */ - PAL_MODE_UNCONNECTED, /* P0.3 */ - PAL_MODE_UNCONNECTED, /* P0.4 */ - PAL_MODE_UNCONNECTED, /* P0.5 */ - PAL_MODE_UNCONNECTED, /* P0.6 */ - PAL_MODE_UNCONNECTED, /* P0.7 */ - PAL_MODE_UNCONNECTED, /* P0.8 UART_RTS */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.9: UART_TX */ - PAL_MODE_UNCONNECTED, /* P0.10 UART_CTS */ - PAL_MODE_INPUT_PULLUP, /* P0.11: UART_RX */ - PAL_MODE_UNCONNECTED, /* P0.12 */ - PAL_MODE_UNCONNECTED, /* P0.13 */ - PAL_MODE_UNCONNECTED, /* P0.14 */ - PAL_MODE_UNCONNECTED, /* P0.15 */ - PAL_MODE_INPUT_PULLUP, /* P0.16: KEY1 */ - PAL_MODE_INPUT_PULLUP, /* P0.17: KEY2 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.18: LED0 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.19: LED1 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.20: LED2 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.21: LED3 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: LED4 */ - PAL_MODE_INPUT, /* P0.23: SPI_MISO */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: SPI_MOSI */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_SCK */ - PAL_MODE_UNCONNECTED, /* P0.26 */ - PAL_MODE_UNCONNECTED, /* P0.27 */ - PAL_MODE_UNCONNECTED, /* P0.28 */ - PAL_MODE_UNCONNECTED, /* P0.29 */ - PAL_MODE_OUTPUT_PUSHPULL, /* P0.30: SPI_NSS */ - PAL_MODE_UNCONNECTED, /* P0.31 */ - }, -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization is performed just after reset before BSS and - * DATA segments initialization. - */ -void __early_init(void) -{ -} - -/** - * @brief Late initialization code. - * @note This initialization is performed after BSS and DATA segments - * initialization and before invoking the main() function. - */ -void boardInit(void) -{ - //FIXME: not really needed yet - //NRF_CLOCK->XTALFREQ = 0xff; - //NRF_CLOCK->EVENTS_HFCLKSTARTED = 0; - //NRF_CLOCK->TASKS_HFCLKSTART = 1; - //while (!NRF_CLOCK->EVENTS_HFCLKSTARTED) {} -} diff --git a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.h b/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.h deleted file mode 100644 index 5a4e8f0..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* Board identifier. */ -#define BOARD_WVSHARE_BLE400 -#define BOARD_NAME "WvShare BLE400" - -/* Board oscillators-related settings. */ -#define NRF51_XTAL_VALUE 16000000 - -/* GPIO pins. */ -#define KEY1 16 -#define KEY2 17 -#define LED0 18 -#define LED1 19 -#define LED2 20 -#define LED3 21 -#define LED4 22 -#define UART_TX 9 -#define UART_RX 11 -#define UART_RTS 8 -#define UART_CTS 10 -#define SPI_SCK 25 -#define SPI_MOSI 24 -#define SPI_MISO 23 -#define SPI_SS 30 -#define I2C_SCL 1 -#define I2C_SDA 0 -#define AIN0 26 -#define AIN1 27 -#define AIN2 1 -#define AIN3 2 -#define AIN4 3 -#define AIN5 4 -#define AIN6 5 -#define AIN7 6 -#define AREF0 0 -#define AREF1 6 - -/* - * IO pins assignments. - */ -#define IOPORT1_KEY1 16U -#define IOPORT1_KEY2 17U -#define IOPORT1_LED0 18U -#define IOPORT1_LED1 19U -#define IOPORT1_LED2 20U -#define IOPORT1_LED3 21U -#define IOPORT1_LED4 22U -#define IOPORT1_UART_TX 9U -#define IOPORT1_UART_RX 11U -#define IOPORT1_UART_RTS 8U -#define IOPORT1_UART_CTS 10U -#define IOPORT1_SPI_SCK 25U -#define IOPORT1_SPI_MOSI 24U -#define IOPORT1_SPI_MISO 23U -#define IOPORT1_SPI_SS 30U -#define IOPORT1_I2C_SCL 1U -#define IOPORT1_I2C_SDA 0U -#define IOPORT1_AIN0 26U -#define IOPORT1_AIN1 27U -#define IOPORT1_AIN2 1U -#define IOPORT1_AIN3 2U -#define IOPORT1_AIN4 3U -#define IOPORT1_AIN5 4U -#define IOPORT1_AIN6 5U -#define IOPORT1_AIN7 6U -#define IOPORT1_AREF0 0U -#define IOPORT1_AREF1 6U - -/* - * IO lines assignments. - */ -#define LINE_KEY1 PAL_LINE(IOPORT1, IOPORT1_KEY1) -#define LINE_KEY2 PAL_LINE(IOPORT1, IOPORT1_KEY2) -#define LINE_LED0 PAL_LINE(IOPORT1, IOPORT1_LED0) -#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1) -#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2) -#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3) -#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4) -#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX) -#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX) -#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS) -#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS) -#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK) -#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI) -#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO) -#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS) -#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL) -#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA) -#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0) -#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1) -#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2) -#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3) -#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4) -#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5) -#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6) -#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7) -#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0) -#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1) - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.mk b/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.mk deleted file mode 100644 index ade4201..0000000 --- a/ChibiOS_16.1.5/community/os/hal/boards/WVSHARE_BLE400/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/WVSHARE_BLE400/board.c - -# Required include directories -BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/WVSHARE_BLE400 |