From 5a059c8d6ecfe2f98a77570b8b6cf13c500398f7 Mon Sep 17 00:00:00 2001 From: Clyne Sullivan Date: Fri, 11 Nov 2016 15:15:16 -0500 Subject: tar'd chibi --- .../community/os/common/ext/CMSIS/KINETIS/k20x5.h | 305 --- .../community/os/common/ext/CMSIS/KINETIS/k20x7.h | 362 --- .../community/os/common/ext/CMSIS/KINETIS/k20xx.h | 2319 -------------------- .../community/os/common/ext/CMSIS/KINETIS/kl25z.h | 1100 ---------- .../community/os/common/ext/CMSIS/KINETIS/kl26z.h | 1169 ---------- .../os/common/ext/CMSIS/KINETIS/kl27zxx.h | 1229 ----------- .../os/common/ext/CMSIS/KINETIS/kl27zxxx.h | 1216 ---------- .../community/os/common/ext/CMSIS/KINETIS/kl2xz.h | 1218 ---------- .../ports/ARMCMx/compilers/GCC/ld/STM32F103x8.ld | 50 - .../ports/ARMCMx/compilers/GCC/ld/STM32F103xC.ld | 50 - .../community/os/common/ports/MSP430X/chcore.c | 103 - .../community/os/common/ports/MSP430X/chcore.h | 437 ---- .../os/common/ports/MSP430X/chcore_timer.h | 119 - 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12 - .../ARMCMx/compilers/GCC/mk/startup_k20x5.mk | 3 - .../ARMCMx/compilers/GCC/mk/startup_k20x7.mk | 3 - .../ARMCMx/compilers/GCC/mk/startup_kl2x.mk | 12 - .../ARMCMx/compilers/GCC/mk/startup_nrf51.mk | 10 - .../ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk | 11 - .../ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk | 11 - .../common/startup/ARMCMx/devices/K20x5/cmparams.h | 84 - .../common/startup/ARMCMx/devices/K20x7/cmparams.h | 80 - .../common/startup/ARMCMx/devices/KL2x/cmparams.h | 92 - .../startup/ARMCMx/devices/NRF51822/cmparams.h | 82 - .../startup/ARMCMx/devices/TM4C123x/cmparams.h | 112 - .../startup/ARMCMx/devices/TM4C129x/cmparams.h | 96 - .../MSP430X/compilers/GCC/ld/msp430fr5969.ld | 390 ---- .../MSP430X/compilers/GCC/ld/msp430fr6989.ld | 437 ---- .../compilers/GCC/mk/startup_msp430fr5xxx.mk | 10 - .../common/startup/MSP430X/compilers/GCC/rules.mk | 269 --- 47 files changed, 12877 deletions(-) delete mode 100644 ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x5.h 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100644 ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld delete mode 100644 ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld delete mode 100644 ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk delete mode 100644 ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/rules.mk (limited to 'ChibiOS_16.1.5/community/os/common') diff --git a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x5.h b/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x5.h deleted file mode 100644 index c309f04..0000000 --- a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x5.h +++ /dev/null @@ -1,305 +0,0 @@ -/* - * Copyright (C) 2014-2016 Fabio Utzig, http://fabioutzig.com - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _K20x5_H_ -#define _K20x5_H_ - -/* - * ============================================================== - * ---------- Interrupt Number Definition ----------------------- - * ============================================================== - */ -typedef enum IRQn -{ -/****** Cortex-M0 Processor Exceptions Numbers ****************/ - InitialSP_IRQn = -15, - InitialPC_IRQn = -15, - NonMaskableInt_IRQn = -14, - HardFault_IRQn = -13, - MemoryManagement_IRQn = -12, - BusFault_IRQn = -11, - UsageFault_IRQn = -10, - SVCall_IRQn = -5, - DebugMonitor_IRQn = -4, - PendSV_IRQn = -2, - SysTick_IRQn = -1, - -/****** K20x Specific Interrupt Numbers ***********************/ - DMA0_IRQn = 0, // Vector40 - DMA1_IRQn = 1, // Vector44 - DMA2_IRQn = 2, // Vector48 - DMA3_IRQn = 3, // Vector4C - DMAError_IRQn = 4, // Vector50 - DMA_IRQn = 5, // Vector54 - FlashMemComplete_IRQn = 6, // Vector58 - FlashMemReadCollision_IRQn = 7, // Vector5C - LowVoltageWarning_IRQn = 8, // Vector60 - LLWU_IRQn = 9, // Vector64 - WDOG_IRQn = 10, // Vector68 - I2C0_IRQn = 11, // Vector6C - SPI0_IRQn = 12, // Vector70 - I2S0_IRQn = 13, // Vector74 - I2S1_IRQn = 14, // Vector78 - UART0LON_IRQn = 15, // Vector7C - UART0Status_IRQn = 16, // Vector80 - UART0Error_IRQn = 17, // Vector84 - UART1Status_IRQn = 18, // Vector88 - UART1Error_IRQn = 19, // Vector8C - UART2Status_IRQn = 20, // Vector90 - UART2Error_IRQn = 21, // Vector94 - ADC0_IRQn = 22, // Vector98 - CMP0_IRQn = 23, // Vector9C - CMP1_IRQn = 24, // VectorA0 - FTM0_IRQn = 25, // VectorA4 - FTM1_IRQn = 26, // VectorA8 - CMT_IRQn = 27, // VectorAC - RTCAlarm_IRQn = 28, // VectorB0 - RTCSeconds_IRQn = 29, // VectorB4 - PITChannel0_IRQn = 30, // VectorB8 - PITChannel1_IRQn = 31, // VectorBC - PITChannel2_IRQn = 32, // VectorC0 - PITChannel3_IRQn = 33, // VectorC4 - PDB_IRQn = 34, // VectorC8 - USB_OTG_IRQn = 35, // VectorCC - USBChargerDetect_IRQn = 36, // VectorD0 - TSI_IRQn = 37, // VectorD4 - MCG_IRQn = 38, // VectorD8 - LPTMR0_IRQn = 39, // VectorDC - PINA_IRQn = 40, // VectorE0 - PINB_IRQn = 41, // VectorE4 - PINC_IRQn = 42, // VectorE8 - PIND_IRQn = 43, // VectorEC - PINE_IRQn = 44, // VectorF0 - SoftInitInt_IRQn = 45, // VectorF4 -} IRQn_Type; - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/** - * @brief K20x Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -#define __FPU_PRESENT 0 -#define __MPU_PRESENT 0 -#define __NVIC_PRIO_BITS 4 -#define __Vendor_SysTickConfig 0 - -#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ - -#include "k20xx.h" - -typedef struct -{ - __IO uint32_t SOPT1; - __IO uint32_t SOPT1CFG; - uint32_t RESERVED0[1023]; - __IO uint32_t SOPT2; - uint32_t RESERVED1[1]; - __IO uint32_t SOPT4; - __IO uint32_t SOPT5; - uint32_t RESERVED2[1]; - __IO uint32_t SOPT7; - uint32_t RESERVED3[2]; - __I uint32_t SDID; - uint32_t RESERVED4[3]; - __IO uint32_t SCGC4; - __IO uint32_t SCGC5; - __IO uint32_t SCGC6; - __IO uint32_t SCGC7; - __IO uint32_t CLKDIV1; - __IO uint32_t CLKDIV2; - __I uint32_t FCFG1; - __I uint32_t FCFG2; - __I uint32_t UIDH; - __I uint32_t UIDMH; - __I uint32_t UIDML; - __I uint32_t UIDL; -} SIM_TypeDef; - -/****************************************************************/ -/* Peripheral memory map */ -/****************************************************************/ -#define DMA_BASE ((uint32_t)0x40008000) -#define FTFL_BASE ((uint32_t)0x40020000) -#define DMAMUX_BASE ((uint32_t)0x40021000) -#define SPI0_BASE ((uint32_t)0x4002C000) -#define PIT_BASE ((uint32_t)0x40037000) -#define FTM0_BASE ((uint32_t)0x40038000) -#define FTM1_BASE ((uint32_t)0x40039000) -#define ADC0_BASE ((uint32_t)0x4003B000) -#define VBAT_BASE ((uint32_t)0x4003E000) -#define LPTMR0_BASE ((uint32_t)0x40040000) -#define SRF_BASE ((uint32_t)0x40041000) -#define TSI0_BASE ((uint32_t)0x40045000) -#define SIM_BASE ((uint32_t)0x40047000) -#define PORTA_BASE ((uint32_t)0x40049000) -#define PORTB_BASE ((uint32_t)0x4004A000) -#define PORTC_BASE ((uint32_t)0x4004B000) -#define PORTD_BASE ((uint32_t)0x4004C000) -#define PORTE_BASE ((uint32_t)0x4004D000) -#define WDOG_BASE ((uint32_t)0x40052000) -#define MCG_BASE ((uint32_t)0x40064000) -#define OSC0_BASE ((uint32_t)0x40065000) -#define I2C0_BASE ((uint32_t)0x40066000) -#define UART0_BASE ((uint32_t)0x4006A000) -#define UART1_BASE ((uint32_t)0x4006B000) -#define UART2_BASE ((uint32_t)0x4006C000) -#define USBOTG_BASE ((uint32_t)0x40072000) -#define LLWU_BASE ((uint32_t)0x4007C000) -#define PMC_BASE ((uint32_t)0x4007D000) -#define GPIOA_BASE ((uint32_t)0x400FF000) -#define GPIOB_BASE ((uint32_t)0x400FF040) -#define GPIOC_BASE ((uint32_t)0x400FF080) -#define GPIOD_BASE ((uint32_t)0x400FF0C0) -#define GPIOE_BASE ((uint32_t)0x400FF100) - -/****************************************************************/ -/* Peripheral declaration */ -/****************************************************************/ -#define DMA ((DMA_TypeDef *) DMA_BASE) -#define FTFL ((FTFL_TypeDef *) FTFL_BASE) -#define DMAMUX ((DMAMUX_TypeDef *) DMAMUX_BASE) -#define PIT ((PIT_TypeDef *) PIT_BASE) -#define FTM0 ((FTM_TypeDef *) FTM0_BASE) -#define FTM1 ((FTM_TypeDef *) FTM1_BASE) -#define ADC0 ((ADC_TypeDef *) ADC0_BASE) -#define VBAT ((volatile uint8_t *)VBAT_BASE) /* 32 bytes */ -#define LPTMR0 ((LPTMR_TypeDef *) LPTMR0_BASE) -#define SYSTEM_REGISTER_FILE ((volatile uint8_t *)SRF_BASE) /* 32 bytes */ -#define TSI0 ((TSI_TypeDef *) TSI0_BASE) -#define SIM ((SIM_TypeDef *) SIM_BASE) -#define LLWU ((LLWU_TypeDef *) LLWU_BASE) -#define PMC ((PMC_TypeDef *) PMC_BASE) -#define PORTA ((PORT_TypeDef *) PORTA_BASE) -#define PORTB ((PORT_TypeDef *) PORTB_BASE) -#define PORTC ((PORT_TypeDef *) PORTC_BASE) -#define PORTD ((PORT_TypeDef *) PORTD_BASE) -#define PORTE ((PORT_TypeDef *) PORTE_BASE) -#define WDOG ((WDOG_TypeDef *) WDOG_BASE) -#define USB0 ((USBOTG_TypeDef *) USBOTG_BASE) -#define MCG ((MCG_TypeDef *) MCG_BASE) -#define OSC0 ((OSC_TypeDef *) OSC0_BASE) -#define SPI0 ((SPI_TypeDef *) SPI0_BASE) -#define I2C0 ((I2C_TypeDef *) I2C0_BASE) -#define UART0 ((UART_TypeDef *) UART0_BASE) -#define UART1 ((UART_TypeDef *) UART1_BASE) -#define UART2 ((UART_TypeDef *) UART2_BASE) -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) - -/****************************************************************/ -/* Peripheral Registers Bits Definition */ -/****************************************************************/ - -/****************************************************************/ -/* */ -/* System Integration Module (SIM) */ -/* */ -/****************************************************************/ -/********* Bits definition for SIM_SOPT1 register *************/ -#define SIM_SOPT1_USBREGEN ((uint32_t)0x80000000) /*!< USB voltage regulator enable */ -#define SIM_SOPT1_USBSSTBY ((uint32_t)0x40000000) /*!< USB voltage regulator in standby mode during Stop, VLPS, LLS and VLLS modes */ -#define SIM_SOPT1_USBVSTBY ((uint32_t)0x20000000) /*!< USB voltage regulator in standby mode during VLPR and VLPW modes */ -#define SIM_SOPT1_OSC32KSEL_SHIFT 18 /*!< 32K oscillator clock select (shift) */ -#define SIM_SOPT1_OSC32KSEL_MASK ((uint32_t)((uint32_t)0x3 << SIM_SOPT1_OSC32KSEL_SHIFT)) /*!< 32K oscillator clock select (mask) */ -#define SIM_SOPT1_OSC32KSEL(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT1_OSC32KSEL_SHIFT) & SIM_SOPT1_OSC32KSEL_MASK)) /*!< 32K oscillator clock select */ -#define SIM_SOPT1_RAMSIZE_SHIFT 12 -#define SIM_SOPT1_RAMSIZE_MASK ((uint32_t)((uint32_t)0xf << SIM_SOPT1_RAMSIZE_SHIFT)) -#define SIM_SOPT1_RAMSIZE(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT1_RAMSIZE_SHIFT) & SIM_SOPT1_RAMSIZE_MASK)) - -/******* Bits definition for SIM_SOPT1CFG register ************/ -#define SIM_SOPT1CFG_USSWE ((uint32_t)0x04000000) /*!< USB voltage regulator stop standby write enable */ -#define SIM_SOPT1CFG_UVSWE ((uint32_t)0x02000000) /*!< USB voltage regulator VLP standby write enable */ -#define SIM_SOPT1CFG_URWE ((uint32_t)0x01000000) /*!< USB voltage regulator voltage regulator write enable */ - -/******* Bits definition for SIM_SOPT2 register ************/ -#define SIM_SOPT2_USBSRC ((uint32_t)0x00040000) /*!< USB clock source select */ -#define SIM_SOPT2_PLLFLLSEL ((uint32_t)0x00010000) /*!< PLL/FLL clock select */ -#define SIM_SOPT2_TRACECLKSEL ((uint32_t)0x00001000) -#define SIM_SOPT2_PTD7PAD ((uint32_t)0x00000800) -#define SIM_SOPT2_CLKOUTSEL_SHIFT 5 -#define SIM_SOPT2_CLKOUTSEL_MASK ((uint32_t)((uint32_t)0x7 << SIM_SOPT2_CLKOUTSEL_SHIFT)) -#define SIM_SOPT2_CLKOUTSEL(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT2_CLKOUTSEL_SHIFT) & SIM_SOPT2_CLKOUTSEL_MASK)) -#define SIM_SOPT2_RTCCLKOUTSEL ((uint32_t)0x00000010) /*!< RTC clock out select */ - -/******* Bits definition for SIM_SCGC4 register ************/ -#define SIM_SCGC4_VREF ((uint32_t)0x00100000) /*!< VREF Clock Gate Control */ -#define SIM_SCGC4_CMP ((uint32_t)0x00080000) /*!< Comparator Clock Gate Control */ -#define SIM_SCGC4_USBOTG ((uint32_t)0x00040000) /*!< USB Clock Gate Control */ -#define SIM_SCGC4_UART2 ((uint32_t)0x00001000) /*!< UART2 Clock Gate Control */ -#define SIM_SCGC4_UART1 ((uint32_t)0x00000800) /*!< UART1 Clock Gate Control */ -#define SIM_SCGC4_UART0 ((uint32_t)0x00000400) /*!< UART0 Clock Gate Control */ -#define SIM_SCGC4_I2C0 ((uint32_t)0x00000040) /*!< I2C0 Clock Gate Control */ -#define SIM_SCGC4_CMT ((uint32_t)0x00000004) /*!< CMT Clock Gate Control */ -#define SIM_SCGC4_EMW ((uint32_t)0x00000002) /*!< EWM Clock Gate Control */ - -/******* Bits definition for SIM_SCGC5 register ************/ -#define SIM_SCGC5_PORTE ((uint32_t)0x00002000) /*!< Port E Clock Gate Control */ -#define SIM_SCGC5_PORTD ((uint32_t)0x00001000) /*!< Port D Clock Gate Control */ -#define SIM_SCGC5_PORTC ((uint32_t)0x00000800) /*!< Port C Clock Gate Control */ -#define SIM_SCGC5_PORTB ((uint32_t)0x00000400) /*!< Port B Clock Gate Control */ -#define SIM_SCGC5_PORTA ((uint32_t)0x00000200) /*!< Port A Clock Gate Control */ -#define SIM_SCGC5_TSI ((uint32_t)0x00000020) /*!< TSI Access Control */ -#define SIM_SCGC5_LPTIMER ((uint32_t)0x00000001) /*!< Low Power Timer Access Control */ - -/******* Bits definition for SIM_SCGC6 register ************/ -#define SIM_SCGC6_RTC ((uint32_t)0x20000000) /*!< RTC Access Control */ -#define SIM_SCGC6_ADC0 ((uint32_t)0x08000000) /*!< ADC0 Clock Gate Control */ -#define SIM_SCGC6_FTM1 ((uint32_t)0x02000000) /*!< FTM1 Clock Gate Control */ -#define SIM_SCGC6_FTM0 ((uint32_t)0x01000000) /*!< FTM0 Clock Gate Control */ -#define SIM_SCGC6_PIT ((uint32_t)0x00800000) /*!< PIT Clock Gate Control */ -#define SIM_SCGC6_PDB ((uint32_t)0x00400000) /*!< PDB Clock Gate Control */ -#define SIM_SCGC6_USBDCD ((uint32_t)0x00200000) /*!< USB DCD Clock Gate Control */ -#define SIM_SCGC6_CRC ((uint32_t)0x00040000) /*!< Low Power Timer Access Control */ -#define SIM_SCGC6_I2S ((uint32_t)0x00008000) /*!< CRC Clock Gate Control */ -#define SIM_SCGC6_SPI0 ((uint32_t)0x00001000) /*!< SPI0 Clock Gate Control */ -#define SIM_SCGC6_DMAMUX ((uint32_t)0x00000002) /*!< DMA Mux Clock Gate Control */ -#define SIM_SCGC6_FTFL ((uint32_t)0x00000001) /*!< Flash Memory Clock Gate Control */ - -/******* Bits definition for SIM_SCGC6 register ************/ -#define SIM_SCGC7_DMA ((uint32_t)0x00000002) /*!< DMA Clock Gate Control */ - -/****** Bits definition for SIM_CLKDIV1 register ***********/ -#define SIM_CLKDIV1_OUTDIV1_SHIFT 28 -#define SIM_CLKDIV1_OUTDIV1_MASK ((uint32_t)((uint32_t)0xF << SIM_CLKDIV1_OUTDIV1_SHIFT)) -#define SIM_CLKDIV1_OUTDIV1(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV1_SHIFT) & SIM_CLKDIV1_OUTDIV1_MASK)) -#define SIM_CLKDIV1_OUTDIV2_SHIFT 24 -#define SIM_CLKDIV1_OUTDIV2_MASK ((uint32_t)((uint32_t)0xF << SIM_CLKDIV1_OUTDIV2_SHIFT)) -#define SIM_CLKDIV1_OUTDIV2(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV2_SHIFT) & SIM_CLKDIV1_OUTDIV2_MASK)) -#define SIM_CLKDIV1_OUTDIV4_SHIFT 16 -#define SIM_CLKDIV1_OUTDIV4_MASK ((uint32_t)((uint32_t)0x7 << SIM_CLKDIV1_OUTDIV4_SHIFT)) -#define SIM_CLKDIV1_OUTDIV4(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV4_SHIFT) & SIM_CLKDIV1_OUTDIV4_MASK)) - -/****** Bits definition for SIM_CLKDIV2 register ***********/ -#define SIM_CLKDIV2_USBDIV_SHIFT 1 -#define SIM_CLKDIV2_USBDIV_MASK ((uint32_t)((uint32_t)0x7 << SIM_CLKDIV2_USBDIV_SHIFT)) -#define SIM_CLKDIV2_USBDIV(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV2_USBDIV_SHIFT) & SIM_CLKDIV2_USBDIV_MASK)) -#define SIM_CLKDIV2_USBFRAC ((uint32_t)0x00000001) - -#endif diff --git a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x7.h b/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x7.h deleted file mode 100644 index 87a4e52..0000000 --- a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20x7.h +++ /dev/null @@ -1,362 +0,0 @@ -/* - * Copyright (C) 2014-2016 Fabio Utzig, http://fabioutzig.com - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _K20x7_H_ -#define _K20x7_H_ - -/* - * ============================================================== - * ---------- Interrupt Number Definition ----------------------- - * ============================================================== - */ -typedef enum IRQn -{ -/****** Cortex-M0 Processor Exceptions Numbers ****************/ - InitialSP_IRQn = -15, - InitialPC_IRQn = -15, - NonMaskableInt_IRQn = -14, - HardFault_IRQn = -13, - MemoryManagement_IRQn = -12, - BusFault_IRQn = -11, - UsageFault_IRQn = -10, - SVCall_IRQn = -5, - DebugMonitor_IRQn = -4, - PendSV_IRQn = -2, - SysTick_IRQn = -1, - -/****** K20x Specific Interrupt Numbers ***********************/ - DMA0_IRQn = 0, // Vector40 - DMA1_IRQn = 1, // Vector44 - DMA2_IRQn = 2, // Vector48 - DMA3_IRQn = 3, // Vector4C - DMA4_IRQn = 4, // Vector50 - DMA5_IRQn = 5, // Vector54 - DMA6_IRQn = 6, // Vector58 - DMA7_IRQn = 7, // Vector5C - DMA8_IRQn = 8, // Vector60 - DMA9_IRQn = 9, // Vector64 - DMA10_IRQn = 10, // Vector68 - DMA11_IRQn = 11, // Vector6C - DMA12_IRQn = 12, // Vector70 - DMA13_IRQn = 13, // Vector74 - DMA14_IRQn = 14, // Vector78 - DMA15_IRQn = 15, // Vector7C - DMAError_IRQn = 16, // Vector80 - //~ DMA_IRQn = 17, // Vector84 - FlashMemComplete_IRQn = 18, // Vector88 - FlashMemReadCollision_IRQn = 19, // Vector8C - LowVoltageWarning_IRQn = 20, // Vector90 - LLWU_IRQn = 21, // Vector94 - WDOG_IRQn = 22, // Vector98 - I2C0_IRQn = 24, // VectorA0 - I2C1_IRQn = 25, // VectorA4 - SPI0_IRQn = 26, // VectorA8 - SPI1_IRQn = 27, // VectorAC - CANMessage_IRQn = 29, // VectorB4 - CANBusOff = 30, // VectorB8 - CANError = 31, // VectorBC - CANTxWarning = 32, // VectorC0 - CANRxWarning = 33, // VectorC4 - CANWakeUp = 34, // VectorC8 - I2S0Tx_IRQn = 35, // VectorCC - I2S1Rx_IRQn = 36, // VectorD0 - UART0LON_IRQn = 44, // VectorF0 - UART0Status_IRQn = 45, // VectorF4 - UART0Error_IRQn = 46, // VectorF8 - UART1Status_IRQn = 47, // VectorFC - UART1Error_IRQn = 48, // Vector100 - UART2Status_IRQn = 49, // Vector104 - UART2Error_IRQn = 50, // Vector108 - ADC0_IRQn = 57, // Vector124 - ADC1_IRQn = 58, // Vector128 - CMP0_IRQn = 59, // Vector12C - CMP1_IRQn = 60, // Vector130 - CMP2_IRQn = 61, // Vector134 - FTM0_IRQn = 62, // Vector138 - FTM1_IRQn = 63, // Vector13C - FTM2_IRQn = 64, // Vector140 - CMT_IRQn = 65, // Vector144 - RTCAlarm_IRQn = 66, // Vector148 - RTCSeconds_IRQn = 67, // Vector14C - PITChannel0_IRQn = 68, // Vector150 - PITChannel1_IRQn = 69, // Vector154 - PITChannel2_IRQn = 70, // Vector158 - PITChannel3_IRQn = 71, // Vector15C - PDB_IRQn = 72, // Vector160 - USB_OTG_IRQn = 73, // Vector164 - USBChargerDetect_IRQn = 74, // Vector168 - DAC0_IRQn = 81, // Vector184 - TSI_IRQn = 83, // Vector18C - MCG_IRQn = 84, // Vector190 - LPTMR0_IRQn = 85, // Vector194 - PINA_IRQn = 87, // Vector19C - PINB_IRQn = 88, // Vector1A0 - PINC_IRQn = 89, // Vector1A4 - PIND_IRQn = 90, // Vector1A8 - PINE_IRQn = 91, // Vector1AC - SoftInitInt_IRQn = 94, // Vector1B8 -} IRQn_Type; - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/** - * @brief K20x Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -#define __FPU_PRESENT 0 -#define __MPU_PRESENT 0 -#define __NVIC_PRIO_BITS 4 -#define __Vendor_SysTickConfig 0 - -#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ - -#include "k20xx.h" - -typedef struct -{ - __IO uint32_t SOPT1; - __IO uint32_t SOPT1CFG; - uint32_t RESERVED0[1023]; - __IO uint32_t SOPT2; - uint32_t RESERVED1[1]; - __IO uint32_t SOPT4; - __IO uint32_t SOPT5; - uint32_t RESERVED2[1]; - __IO uint32_t SOPT7; - uint32_t RESERVED3[2]; - __I uint32_t SDID; - uint32_t RESERVED4[1]; - __IO uint32_t SCGC2; - __IO uint32_t SCGC3; - __IO uint32_t SCGC4; - __IO uint32_t SCGC5; - __IO uint32_t SCGC6; - __IO uint32_t SCGC7; - __IO uint32_t CLKDIV1; - __IO uint32_t CLKDIV2; - __I uint32_t FCFG1; - __I uint32_t FCFG2; - __I uint32_t UIDH; - __I uint32_t UIDMH; - __I uint32_t UIDML; - __I uint32_t UIDL; -} SIM_TypeDef; - -/****************************************************************/ -/* Peripheral memory map */ -/****************************************************************/ -#define AXBS_BASE ((uint32_t)0x40004000) // -#define DMA_BASE ((uint32_t)0x40008000) -#define FTFL_BASE ((uint32_t)0x40020000) -#define DMAMUX_BASE ((uint32_t)0x40021000) -#define FCAN0_BASE ((uint32_t)0x40024000) // -#define SPI0_BASE ((uint32_t)0x4002C000) -#define SPI1_BASE ((uint32_t)0x4002D000) // -#define I2S0_BASE ((uint32_t)0x4002F000) // -#define USBDCD_BASE ((uint32_t)0x40035000) // -#define PDB_BASE ((uint32_t)0x40036000) // -#define PIT_BASE ((uint32_t)0x40037000) -#define FTM0_BASE ((uint32_t)0x40038000) -#define FTM1_BASE ((uint32_t)0x40039000) -#define ADC0_BASE ((uint32_t)0x4003B000) -#define RTC_BASE ((uint32_t)0x4003D000) // -#define VBAT_BASE ((uint32_t)0x4003E000) -#define LPTMR0_BASE ((uint32_t)0x40040000) -#define SRF_BASE ((uint32_t)0x40041000) -#define TSI0_BASE ((uint32_t)0x40045000) -#define SIM_BASE ((uint32_t)0x40047000) -#define PORTA_BASE ((uint32_t)0x40049000) -#define PORTB_BASE ((uint32_t)0x4004A000) -#define PORTC_BASE ((uint32_t)0x4004B000) -#define PORTD_BASE ((uint32_t)0x4004C000) -#define PORTE_BASE ((uint32_t)0x4004D000) -#define WDOG_BASE ((uint32_t)0x40052000) -#define EWDOG_BASE ((uint32_t)0x40061000) // -#define CMT_BASE ((uint32_t)0x40062000) // -#define MCG_BASE ((uint32_t)0x40064000) -#define OSC0_BASE ((uint32_t)0x40065000) -#define I2C0_BASE ((uint32_t)0x40066000) -#define I2C1_BASE ((uint32_t)0x40067000) // -#define UART0_BASE ((uint32_t)0x4006A000) -#define UART1_BASE ((uint32_t)0x4006B000) -#define UART2_BASE ((uint32_t)0x4006C000) -#define USBOTG_BASE ((uint32_t)0x40072000) -#define CMP0_BASE ((uint32_t)0x40073000) // -#define VREF_BASE ((uint32_t)0x40074000) // -#define LLWU_BASE ((uint32_t)0x4007C000) -#define PMC_BASE ((uint32_t)0x4007D000) -#define SMC_BASE ((uint32_t)0x4007E000) // -#define RCM_BASE ((uint32_t)0x4007F000) // -#define FTM2_BASE ((uint32_t)0x400B8000) // -#define ADC1_BASE ((uint32_t)0x400BB000) // -#define DAC0_BASE ((uint32_t)0x400CC000) // -#define GPIOA_BASE ((uint32_t)0x400FF000) -#define GPIOB_BASE ((uint32_t)0x400FF040) -#define GPIOC_BASE ((uint32_t)0x400FF080) -#define GPIOD_BASE ((uint32_t)0x400FF0C0) -#define GPIOE_BASE ((uint32_t)0x400FF100) - -/****************************************************************/ -/* Peripheral declaration */ -/****************************************************************/ -#define DMA ((DMA_TypeDef *) DMA_BASE) -#define FTFL ((FTFL_TypeDef *) FTFL_BASE) -#define DMAMUX ((DMAMUX_TypeDef *) DMAMUX_BASE) -#define PIT ((PIT_TypeDef *) PIT_BASE) -#define FTM0 ((FTM_TypeDef *) FTM0_BASE) -#define FTM1 ((FTM_TypeDef *) FTM1_BASE) -#define FTM2 ((FTM_TypeDef *) FTM2_BASE) -#define ADC0 ((ADC_TypeDef *) ADC0_BASE) -#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define VBAT ((volatile uint8_t *)VBAT_BASE) /* 32 bytes */ -#define LPTMR0 ((LPTMR_TypeDef *) LPTMR0_BASE) -#define SYSTEM_REGISTER_FILE ((volatile uint8_t *)SRF_BASE) /* 32 bytes */ -#define TSI0 ((TSI_TypeDef *) TSI0_BASE) -#define SIM ((SIM_TypeDef *) SIM_BASE) -#define LLWU ((LLWU_TypeDef *) LLWU_BASE) -#define PMC ((PMC_TypeDef *) PMC_BASE) -#define PORTA ((PORT_TypeDef *) PORTA_BASE) -#define PORTB ((PORT_TypeDef *) PORTB_BASE) -#define PORTC ((PORT_TypeDef *) PORTC_BASE) -#define PORTD ((PORT_TypeDef *) PORTD_BASE) -#define PORTE ((PORT_TypeDef *) PORTE_BASE) -#define WDOG ((WDOG_TypeDef *) WDOG_BASE) -#define USB0 ((USBOTG_TypeDef *) USBOTG_BASE) -#define MCG ((MCG_TypeDef *) MCG_BASE) -#define OSC0 ((OSC_TypeDef *) OSC0_BASE) -#define SPI0 ((SPI_TypeDef *) SPI0_BASE) -#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define I2C0 ((I2C_TypeDef *) I2C0_BASE) -#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define UART0 ((UART_TypeDef *) UART0_BASE) -#define UART1 ((UART_TypeDef *) UART1_BASE) -#define UART2 ((UART_TypeDef *) UART2_BASE) -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) - -/****************************************************************/ -/* Peripheral Registers Bits Definition */ -/****************************************************************/ - -/****************************************************************/ -/* */ -/* System Integration Module (SIM) */ -/* */ -/****************************************************************/ -/********* Bits definition for SIM_SOPT1 register *************/ -#define SIM_SOPT1_USBREGEN ((uint32_t)0x80000000) /*!< USB voltage regulator enable */ -#define SIM_SOPT1_USBSSTBY ((uint32_t)0x40000000) /*!< USB voltage regulator in standby mode during Stop, VLPS, LLS and VLLS modes */ -#define SIM_SOPT1_USBVSTBY ((uint32_t)0x20000000) /*!< USB voltage regulator in standby mode during VLPR and VLPW modes */ -#define SIM_SOPT1_OSC32KSEL_SHIFT 18 /*!< 32K oscillator clock select (shift) */ -#define SIM_SOPT1_OSC32KSEL_MASK ((uint32_t)((uint32_t)0x3 << SIM_SOPT1_OSC32KSEL_SHIFT)) /*!< 32K oscillator clock select (mask) */ -#define SIM_SOPT1_OSC32KSEL(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT1_OSC32KSEL_SHIFT) & SIM_SOPT1_OSC32KSEL_MASK)) /*!< 32K oscillator clock select */ -#define SIM_SOPT1_RAMSIZE_SHIFT 12 -#define SIM_SOPT1_RAMSIZE_MASK ((uint32_t)((uint32_t)0xf << SIM_SOPT1_RAMSIZE_SHIFT)) -#define SIM_SOPT1_RAMSIZE(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT1_RAMSIZE_SHIFT) & SIM_SOPT1_RAMSIZE_MASK)) - -/******* Bits definition for SIM_SOPT1CFG register ************/ -#define SIM_SOPT1CFG_USSWE ((uint32_t)0x04000000) /*!< USB voltage regulator stop standby write enable */ -#define SIM_SOPT1CFG_UVSWE ((uint32_t)0x02000000) /*!< USB voltage regulator VLP standby write enable */ -#define SIM_SOPT1CFG_URWE ((uint32_t)0x01000000) /*!< USB voltage regulator voltage regulator write enable */ - -/******* Bits definition for SIM_SOPT2 register ************/ -#define SIM_SOPT2_USBSRC ((uint32_t)0x00040000) /*!< USB clock source select */ -#define SIM_SOPT2_PLLFLLSEL ((uint32_t)0x00010000) /*!< PLL/FLL clock select */ -#define SIM_SOPT2_TRACECLKSEL ((uint32_t)0x00001000) -#define SIM_SOPT2_PTD7PAD ((uint32_t)0x00000800) -#define SIM_SOPT2_CLKOUTSEL_SHIFT 5 -#define SIM_SOPT2_CLKOUTSEL_MASK ((uint32_t)((uint32_t)0x7 << SIM_SOPT2_CLKOUTSEL_SHIFT)) -#define SIM_SOPT2_CLKOUTSEL(x) ((uint32_t)(((uint32_t)(x) << SIM_SOPT2_CLKOUTSEL_SHIFT) & SIM_SOPT2_CLKOUTSEL_MASK)) -#define SIM_SOPT2_RTCCLKOUTSEL ((uint32_t)0x00000010) /*!< RTC clock out select */ - -/******* Bits definition for SIM_SCGC2 register ************/ -#define SIM_SCGC2_DAC0 ((uint32_t)0x00001000) /*!< DAC0 Clock Gate Control */ - -/******* Bits definition for SIM_SCGC3 register ************/ -#define SIM_SCGC3_ADC1 ((uint32_t)0x08000000) /*!< ADC1 Clock Gate Control */ -#define SIM_SCGC3_FTM2 ((uint32_t)0x01000000) /*!< FTM2 Clock Gate Control */ - -/******* Bits definition for SIM_SCGC4 register ************/ -#define SIM_SCGC4_VREF ((uint32_t)0x00100000) /*!< VREF Clock Gate Control */ -#define SIM_SCGC4_CMP ((uint32_t)0x00080000) /*!< Comparator Clock Gate Control */ -#define SIM_SCGC4_USBOTG ((uint32_t)0x00040000) /*!< USB Clock Gate Control */ -#define SIM_SCGC4_UART2 ((uint32_t)0x00001000) /*!< UART2 Clock Gate Control */ -#define SIM_SCGC4_UART1 ((uint32_t)0x00000800) /*!< UART1 Clock Gate Control */ -#define SIM_SCGC4_UART0 ((uint32_t)0x00000400) /*!< UART0 Clock Gate Control */ -#define SIM_SCGC4_I2C1 ((uint32_t)0x00000080) /*!< I2C1 Clock Gate Control */ -#define SIM_SCGC4_I2C0 ((uint32_t)0x00000040) /*!< I2C0 Clock Gate Control */ -#define SIM_SCGC4_CMT ((uint32_t)0x00000004) /*!< CMT Clock Gate Control */ -#define SIM_SCGC4_EMW ((uint32_t)0x00000002) /*!< EWM Clock Gate Control */ - -/******* Bits definition for SIM_SCGC5 register ************/ -#define SIM_SCGC5_PORTE ((uint32_t)0x00002000) /*!< Port E Clock Gate Control */ -#define SIM_SCGC5_PORTD ((uint32_t)0x00001000) /*!< Port D Clock Gate Control */ -#define SIM_SCGC5_PORTC ((uint32_t)0x00000800) /*!< Port C Clock Gate Control */ -#define SIM_SCGC5_PORTB ((uint32_t)0x00000400) /*!< Port B Clock Gate Control */ -#define SIM_SCGC5_PORTA ((uint32_t)0x00000200) /*!< Port A Clock Gate Control */ -#define SIM_SCGC5_TSI ((uint32_t)0x00000020) /*!< TSI Access Control */ -#define SIM_SCGC5_LPTIMER ((uint32_t)0x00000001) /*!< Low Power Timer Access Control */ - -/******* Bits definition for SIM_SCGC6 register ************/ -#define SIM_SCGC6_RTC ((uint32_t)0x20000000) /*!< RTC Access Control */ -#define SIM_SCGC6_ADC0 ((uint32_t)0x08000000) /*!< ADC0 Clock Gate Control */ -#define SIM_SCGC6_FTM1 ((uint32_t)0x02000000) /*!< FTM1 Clock Gate Control */ -#define SIM_SCGC6_FTM0 ((uint32_t)0x01000000) /*!< FTM0 Clock Gate Control */ -#define SIM_SCGC6_PIT ((uint32_t)0x00800000) /*!< PIT Clock Gate Control */ -#define SIM_SCGC6_PDB ((uint32_t)0x00400000) /*!< PDB Clock Gate Control */ -#define SIM_SCGC6_USBDCD ((uint32_t)0x00200000) /*!< USB DCD Clock Gate Control */ -#define SIM_SCGC6_CRC ((uint32_t)0x00040000) /*!< Low Power Timer Access Control */ -#define SIM_SCGC6_I2S ((uint32_t)0x00008000) /*!< CRC Clock Gate Control */ -#define SIM_SCGC6_SPI1 ((uint32_t)0x00002000) /*!< SPI1 Clock Gate Control */ -#define SIM_SCGC6_SPI0 ((uint32_t)0x00001000) /*!< SPI0 Clock Gate Control */ -#define SIM_SCGC6_FCAN0 ((uint32_t)0x00000010) /*!< FlexCAN 0 Clock Gate Control */ -#define SIM_SCGC6_DMAMUX ((uint32_t)0x00000002) /*!< DMA Mux Clock Gate Control */ -#define SIM_SCGC6_FTFL ((uint32_t)0x00000001) /*!< Flash Memory Clock Gate Control */ - -/******* Bits definition for SIM_SCGC6 register ************/ -#define SIM_SCGC7_DMA ((uint32_t)0x00000002) /*!< DMA Clock Gate Control */ - -/****** Bits definition for SIM_CLKDIV1 register ***********/ -#define SIM_CLKDIV1_OUTDIV1_SHIFT 28 -#define SIM_CLKDIV1_OUTDIV1_MASK ((uint32_t)((uint32_t)0xF << SIM_CLKDIV1_OUTDIV1_SHIFT)) -#define SIM_CLKDIV1_OUTDIV1(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV1_SHIFT) & SIM_CLKDIV1_OUTDIV1_MASK)) -#define SIM_CLKDIV1_OUTDIV2_SHIFT 24 -#define SIM_CLKDIV1_OUTDIV2_MASK ((uint32_t)((uint32_t)0xF << SIM_CLKDIV1_OUTDIV2_SHIFT)) -#define SIM_CLKDIV1_OUTDIV2(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV2_SHIFT) & SIM_CLKDIV1_OUTDIV2_MASK)) -#define SIM_CLKDIV1_OUTDIV4_SHIFT 16 -#define SIM_CLKDIV1_OUTDIV4_MASK ((uint32_t)((uint32_t)0x7 << SIM_CLKDIV1_OUTDIV4_SHIFT)) -#define SIM_CLKDIV1_OUTDIV4(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV1_OUTDIV4_SHIFT) & SIM_CLKDIV1_OUTDIV4_MASK)) - -/****** Bits definition for SIM_CLKDIV2 register ***********/ -#define SIM_CLKDIV2_USBDIV_SHIFT 1 -#define SIM_CLKDIV2_USBDIV_MASK ((uint32_t)((uint32_t)0x7 << SIM_CLKDIV2_USBDIV_SHIFT)) -#define SIM_CLKDIV2_USBDIV(x) ((uint32_t)(((uint32_t)(x) << SIM_CLKDIV2_USBDIV_SHIFT) & SIM_CLKDIV2_USBDIV_MASK)) -#define SIM_CLKDIV2_USBFRAC ((uint32_t)0x00000001) - -#endif diff --git a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20xx.h b/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20xx.h deleted file mode 100644 index 38855aa..0000000 --- a/ChibiOS_16.1.5/community/os/common/ext/CMSIS/KINETIS/k20xx.h +++ /dev/null @@ -1,2319 +0,0 @@ -/* - * Copyright (C) 2014-2016 Fabio Utzig, http://fabioutzig.com - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -#ifndef _K20xx_H_ -#define _K20xx_H_ - -/* - * ============================================================== - * ---------- Interrupt Number Definition ----------------------- - * ============================================================== - */ - -/* Device dependent */ - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/** - * @brief K20x Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -#define __MPU_PRESENT 0 -#define __NVIC_PRIO_BITS 4 -#define __Vendor_SysTickConfig 0 - -#include "core_cm4.h" /* Cortex-M4 processor and core peripherals */ - -/* Device dependent -typedef struct -{ - __IO uint32_t SOPT1; - __IO uint32_t SOPT1CFG; - uint32_t RESERVED0[1023]; - __IO uint32_t SOPT2; - uint32_t RESERVED1[1]; - __IO uint32_t SOPT4; - __IO uint32_t SOPT5; - uint32_t RESERVED2[1]; - __IO uint32_t SOPT7; - uint32_t RESERVED3[2]; - __I uint32_t SDID; - uint32_t RESERVED4[3]; - __IO uint32_t SCGC4; - __IO uint32_t SCGC5; - __IO uint32_t SCGC6; - __IO uint32_t SCGC7; - __IO uint32_t CLKDIV1; - __IO uint32_t CLKDIV2; - __I uint32_t FCFG1; - __I uint32_t FCFG2; - __I uint32_t UIDH; - __I uint32_t UIDMH; - __I uint32_t UIDML; - __I uint32_t UIDL; -} SIM_TypeDef; -*/ - -typedef struct -{ - __IO uint8_t PE1; - __IO uint8_t PE2; - __IO uint8_t PE3; - __IO uint8_t PE4; - __IO uint8_t ME; - __IO uint8_t F1; - __IO uint8_t F2; - __I uint8_t F3; - __IO uint8_t FILT1; - __IO uint8_t FILT2; -} LLWU_TypeDef; - -typedef struct -{ - __IO uint32_t PCR[32]; - __O uint32_t GPCLR; - __O uint32_t GPCHR; - uint32_t RESERVED0[6]; - __IO uint32_t ISFR; -} PORT_TypeDef; - -typedef struct -{ - __IO uint8_t C1; - __IO uint8_t C2; - __IO uint8_t C3; - __IO uint8_t C4; - __IO uint8_t C5; - __IO uint8_t C6; - __I uint8_t S; - uint8_t RESERVED0[1]; - __IO uint8_t SC; - uint8_t RESERVED1[1]; - __IO uint8_t ATCVH; - __IO uint8_t ATCVL; - __IO uint8_t C7; - __IO uint8_t C8; -} MCG_TypeDef; - -typedef struct -{ - __IO uint8_t CR; -} OSC_TypeDef; - -typedef struct { - uint32_t SADDR; /* TCD Source Address */ - uint16_t SOFF; /* TCD Signed Source Address Offset */ - uint16_t ATTR; /* TCD Transfer Attributes */ - union { - uint32_t NBYTES_MLNO; /* TCD Minor Byte Count (Minor Loop Disabled) */ - uint32_t NBYTES_MLOFFNO; /* TCD Signed Minor Loop Offset (Minor Loop Enabled and Offset Disabled) */ - uint32_t NBYTES_MLOFFYES; /* TCD Signed Minor Loop Offset (Minor Loop and Offset Enabled) */ - }; - uint32_t SLAST; /* TCD Last Source Address Adjustment */ - uint32_t DADDR; /* TCD Destination Address */ - uint16_t DOFF; /* TCD Signed Destination Address Offset */ - union { - uint16_t CITER_ELINKNO; /* TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled) */ - uint16_t CITER_ELINKYES; /* TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled) */ - }; - uint32_t DLASTSGA; /* TCD Last Destination Address Adjustment/Scatter Gather Address */ - uint16_t CSR; /* TCD Control and Status */ - union { - uint16_t BITER_ELINKNO; /* TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled) */ - uint16_t BITER_ELINKYES; /* TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled) */ - }; -} DMA_TCD_TypeDef; - -/** DMA - Peripheral register structure */ -typedef struct { - __IO uint32_t CR; /* Control Register */ - __IO uint32_t ES; /* Error Status Register */ - __IO uint8_t RESERVED_0[4]; - __IO uint32_t ERQ; /* Enable Request Register */ - __IO uint8_t RESERVED_1[4]; - __IO uint32_t EEI; /* Enable Error Interrupt Register */ - __IO uint8_t CEEI; /* Clear Enable Error Interrupt Register */ - __IO uint8_t SEEI; /* Set Enable Error Interrupt Register */ - __IO uint8_t CERQ; /* Clear Enable Request Register */ - __IO uint8_t SERQ; /* Set Enable Request Register */ - __IO uint8_t CDNE; /* Clear DONE Status Bit Register */ - __IO uint8_t SSRT; /* Set START Bit Register */ - __IO uint8_t CERR; /* Clear Error Register */ - __IO uint8_t CINT; /* Clear Interrupt Request Register */ - __IO uint8_t RESERVED_2[4]; - __IO uint32_t INT; /* Interrupt Request Register */ - __IO uint8_t RESERVED_3[4]; - __IO uint32_t ERR; /* Error Register */ - __IO uint8_t RESERVED_4[4]; - __IO uint32_t HRS; /* Hardware Request Status Register */ - __IO uint8_t RESERVED_5[200]; - __IO uint8_t DCHPRI3; /* Channel 3 Priority Register */ - __IO uint8_t DCHPRI2; /* Channel 2 Priority Register */ - __IO uint8_t DCHPRI1; /* Channel 1 Priority Register */ - __IO uint8_t DCHPRI0; /* Channel 0 Priority Register */ - __IO uint8_t RESERVED_6[3836]; - DMA_TCD_TypeDef TCD[4]; -} DMA_TypeDef; - -typedef struct -{ - __IO uint8_t CHCFG[4]; -} DMAMUX_TypeDef; - -/** PIT - Peripheral register structure */ -typedef struct { - __IO uint32_t MCR; /* PIT Module Control Register */ - uint8_t RESERVED0[252]; - struct PIT_CHANNEL { - __IO uint32_t LDVAL; /* Timer Load Value Register */ - __IO uint32_t CVAL; /* Current Timer Value Register */ - __IO uint32_t TCTRL; /* Timer Control Register */ - __IO uint32_t TFLG; /* Timer Flag Register */ - } CHANNEL[4]; -} PIT_TypeDef; - -typedef struct -{ - __IO uint32_t SC; /* Status and Control */ - __IO uint32_t CNT; /* Counter */ - __IO uint32_t MOD; /* Modulo */ - struct FTM_Channel { - __IO uint32_t CnSC; /* Channel Status and Control */ - __IO uint32_t CnV; /* Channel Value */ - } CHANNEL[8]; - __IO uint32_t CNTIN; /* Counter Initial Value */ - __IO uint32_t STATUS; /* Capture and Compare Status */ - __IO uint32_t MODE; /* Features Mode Selection */ - __IO uint32_t SYNC; /* Synchronization */ - __IO uint32_t OUTINIT; /* Initial State for Channels Output */ - __IO uint32_t OUTMASK; /* Output Mask */ - __IO uint32_t COMBINE; /* Function for Linked Channels */ - __IO uint32_t DEADTIME; /* Deadtime Insertion Control */ - __IO uint32_t EXTTRIG; /* FTM External Trigger */ - __IO uint32_t POL; /* Channels Polarity */ - __IO uint32_t FMS; /* Fault Mode Status */ - __IO uint32_t FILTER; /* Input Capture Filter Control */ - __IO uint32_t FLTCTRL; /* Fault Control */ - __IO uint32_t QDCTRL; /* Quadrature Decode Control and Status */ - __IO uint32_t CONF; /* Configuration */ - __IO uint32_t FTLPOL; /* FTM Fault Input Polarity */ - __IO uint32_t SYNCONF; /* Synchronization Configuration */ - __IO uint32_t INVCTRL; /* FTM Inverting Control */ - __IO uint32_t SWOCTRL; /* FTM Software Output Control */ - __IO uint32_t PWMLOAD; /* FTM PWM Load */ -} FTM_TypeDef; - -typedef struct -{ - __IO uint32_t SC1A; // offset: 0x00 - __IO uint32_t SC1B; // offset: 0x04 - __IO uint32_t CFG1; // offset: 0x08 - __IO uint32_t CFG2; // offset: 0x0C - __I uint32_t RA; // offset: 0x10 - __I uint32_t RB; // offset: 0x14 - __IO uint32_t CV1; // offset: 0x18 - __IO uint32_t CV2; // offset: 0x1C - __IO uint32_t SC2; // offset: 0x20 - __IO uint32_t SC3; // offset: 0x24 - __IO uint32_t OFS; // offset: 0x28 - __IO uint32_t PG; // offset: 0x2C - __IO uint32_t MG; // offset: 0x30 - __IO uint32_t CLPD; // offset: 0x34 - __IO uint32_t CLPS; // offset: 0x38 - __IO uint32_t CLP4; // offset: 0x3C - __IO uint32_t CLP3; // offset: 0x40 - __IO uint32_t CLP2; // offset: 0x44 - __IO uint32_t CLP1; // offset: 0x48 - __IO uint32_t CLP0; // offset: 0x4C - uint32_t RESERVED0[1]; // offset: 0x50 - __IO uint32_t CLMD; // offset: 0x54 - __IO uint32_t CLMS; // offset: 0x58 - __IO uint32_t CLM4; // offset: 0x5C - __IO uint32_t CLM3; // offset: 0x60 - __IO uint32_t CLM2; // offset: 0x64 - __IO uint32_t CLM1; // offset: 0x68 - __IO uint32_t CLM0; // offset: 0x6C -} ADC_TypeDef; - -typedef struct -{ - __IO uint32_t CSR; - __IO uint32_t PSR; - __IO uint32_t CMR; - __I uint32_t CNR; -} LPTMR_TypeDef; - -typedef struct -{ - __IO uint32_t GENCS; - __IO uint32_t DATA; - __IO uint32_t TSHD; -} TSI_TypeDef; - -typedef struct -{ - __IO uint32_t PDOR; - __IO uint32_t PSOR; - __IO uint32_t PCOR; - __IO uint32_t PTOR; - __IO uint32_t PDIR; - __IO uint32_t PDDR; -} GPIO_TypeDef; - -/** SPI - Peripheral register structure */ -typedef struct { - __IO uint32_t MCR; /**< DSPI Module Configuration Register, offset: 0x0 */ - uint32_t RESERVED0[1]; - __IO uint32_t TCR; /**< DSPI Transfer Count Register, offset: 0x8 */ - union { /* offset: 0xC */ - __IO uint32_t CTAR[2]; /**< DSPI Clock and Transfer Attributes Register (In Master Mode), array offset: 0xC, array step: 0x4 */ - __IO uint32_t CTAR_SLAVE[1]; /**< DSPI Clock and Transfer Attributes Register (In Slave Mode), array offset: 0xC, array step: 0x4 */ - }; - uint32_t RESERVED1[6]; - __IO uint32_t SR; /**< DSPI Status Register, offset: 0x2C */ - __IO uint32_t RSER; /**< DSPI DMA/Interrupt Request Select and Enable Register, offset: 0x30 */ - union { /* offset: 0x34 */ - __IO uint32_t PUSHR; /**< DSPI PUSH TX FIFO Register In Master Mode, offset: 0x34 */ - __IO uint32_t PUSHR_SLAVE; /**< DSPI PUSH TX FIFO Register In Slave Mode, offset: 0x34 */ - }; - __I uint32_t POPR; /**< DSPI POP RX FIFO Register, offset: 0x38 */ - __I uint32_t TXFR[4]; /**< DSPI Transmit FIFO Registers, offset: 0x3C */ - uint32_t RESERVED2[12]; - __I uint32_t RXFR[4]; /**< DSPI Receive FIFO Registers, offset: 0x7C */ -} SPI_TypeDef; - -typedef struct -{ - __IO uint8_t A1; - __IO uint8_t F; - __IO uint8_t C1; - __IO uint8_t S; - __IO uint8_t D; - __IO uint8_t C2; - __IO uint8_t FLT; - __IO uint8_t RA; - __IO uint8_t SMB; - __IO uint8_t A2; - __IO uint8_t SLTH; - __IO uint8_t SLTL; -} I2C_TypeDef; - -typedef struct -{ - __IO uint8_t BDH; - __IO uint8_t BDL; - __IO uint8_t C1; - __IO uint8_t C2; - __I uint8_t S1; - __IO uint8_t S2; - __IO uint8_t C3; - __IO uint8_t D; - __IO uint8_t MA1; - __IO uint8_t MA2; - __IO uint8_t C4; - __IO uint8_t C5; - __I uint8_t ED; - __IO uint8_t MODEM; - __IO uint8_t IR; - uint8_t RESERVED0[1]; - __IO uint8_t PFIFO; - __IO uint8_t CFIFO; - __IO uint8_t SFIFO; - __IO uint8_t TWFIFO; - __I uint8_t TCFIFO; - __IO uint8_t RWFIFO; - __I uint8_t RCFIFO; - uint8_t RESERVED1[1]; - __IO uint8_t C7816; - __IO uint8_t IE7816; - __IO uint8_t IS7816; - union { - __IO uint8_t WP7816T0; - __IO uint8_t WP7816T1; - }; - __IO uint8_t WN7816; - __IO uint8_t WF7816; - __IO uint8_t ET7816; - __IO uint8_t TL7816; - uint8_t RESERVED2[2]; - __IO uint8_t C6; - __IO uint8_t PCTH; - __IO uint8_t PCTL; - __IO uint8_t B1T; - __IO uint8_t SDTH; - __IO uint8_t SDTL; - __IO uint8_t PRE; - __IO uint8_t TPL; - __IO uint8_t IE; - __IO uint8_t WB; - __IO uint8_t S3; - __IO uint8_t S4; - __I uint8_t RPL; - __I uint8_t RPREL; - __IO uint8_t CPW; - __IO uint8_t RIDT; - __IO uint8_t TIDT; -} UART_TypeDef; - -typedef struct -{ - __IO uint8_t LVDSC1; - __IO uint8_t LVDSC2; - __IO uint8_t REGSC; -} PMC_TypeDef; - -typedef struct -{ - __IO uint16_t STCTRLH; - __IO uint16_t STCTRLL; - __IO uint16_t TOVALH; - __IO uint16_t TOVALL; - __IO uint16_t WINH; - __IO uint16_t WINL; - __IO uint16_t REFRESH; - __IO uint16_t UNLOCK; - __IO uint16_t TMROUTH; - __IO uint16_t TMROUTL; - __IO uint16_t RSTCNT; - __IO uint16_t PRESC; -} WDOG_TypeDef; - -typedef struct { - __I uint8_t PERID; // 0x00 - uint8_t RESERVED0[3]; - __I uint8_t IDCOMP; // 0x04 - uint8_t RESERVED1[3]; - __I uint8_t REV; // 0x08 - uint8_t RESERVED2[3]; - __I uint8_t ADDINFO; // 0x0C - uint8_t RESERVED3[3]; - __IO uint8_t OTGISTAT; // 0x10 - uint8_t RESERVED4[3]; - __IO uint8_t OTGICR; // 0x14 - uint8_t RESERVED5[3]; - __IO uint8_t OTGSTAT; // 0x18 - uint8_t RESERVED6[3]; - __IO uint8_t OTGCTL; // 0x1C - uint8_t RESERVED7[99]; - __IO uint8_t ISTAT; // 0x80 - uint8_t RESERVED8[3]; - __IO uint8_t INTEN; // 0x84 - uint8_t RESERVED9[3]; - __IO uint8_t ERRSTAT; // 0x88 - uint8_t RESERVED10[3]; - __IO uint8_t ERREN; // 0x8C - uint8_t RESERVED11[3]; - __I uint8_t STAT; // 0x90 - uint8_t RESERVED12[3]; - __IO uint8_t CTL; // 0x94 - uint8_t RESERVED13[3]; - __IO uint8_t ADDR; // 0x98 - uint8_t RESERVED14[3]; - __IO uint8_t BDTPAGE1; // 0x9C - uint8_t RESERVED15[3]; - __IO uint8_t FRMNUML; // 0xA0 - uint8_t RESERVED16[3]; - __IO uint8_t FRMNUMH; // 0xA4 - uint8_t RESERVED17[3]; - __IO uint8_t TOKEN; // 0xA8 - uint8_t RESERVED18[3]; - __IO uint8_t SOFTHLD; // 0xAC - uint8_t RESERVED19[3]; - __IO uint8_t BDTPAGE2; // 0xB0 - uint8_t RESERVED20[3]; - __IO uint8_t BDTPAGE3; // 0xB4 - uint8_t RESERVED21[11]; - struct { - __IO uint8_t V; // 0xC0 - uint8_t RESERVED[3]; - } ENDPT[16]; - __IO uint8_t USBCTRL; // 0x100 - uint8_t RESERVED22[3]; - __I uint8_t OBSERVE; // 0x104 - uint8_t RESERVED23[3]; - __IO uint8_t CONTROL; // 0x108 - uint8_t RESERVED24[3]; - __IO uint8_t USBTRC0; // 0x10C - uint8_t RESERVED25[7]; - __IO uint8_t USBFRMADJUST; // 0x114 -} USBOTG_TypeDef; - -typedef struct -{ - __IO uint8_t FSTAT; - __IO uint8_t FCNFG; - __I uint8_t FSEC; - __I uint8_t FOPT; - __IO uint8_t FCCOB3; - __IO uint8_t FCCOB2; - __IO uint8_t FCCOB1; - __IO uint8_t FCCOB0; - __IO uint8_t FCCOB7; - __IO uint8_t FCCOB6; - __IO uint8_t FCCOB5; - __IO uint8_t FCCOB4; - __IO uint8_t FCCOBB; - __IO uint8_t FCCOBA; - __IO uint8_t FCCOB9; - __IO uint8_t FCCOB8; - __IO uint8_t FPROT3; - __IO uint8_t FPROT2; - __IO uint8_t FPROT1; - __IO uint8_t FPROT0; - uint8_t RESERVED0[2]; - __IO uint8_t FEPROT; - __IO uint8_t FDPROT; -} FTFL_TypeDef; - -/****************************************************************/ -/* Peripheral memory map */ -/****************************************************************/ - - /* Device dependent */ - -/****************************************************************/ -/* Peripheral declaration */ -/****************************************************************/ - - /* Device dependent */ - -/****************************************************************/ -/* Peripheral Registers Bits Definition */ -/****************************************************************/ - -/****************************************************************/ -/* */ -/* System Integration Module (SIM) */ -/* */ -/****************************************************************/ - - /* Device dependent */ - -/****************************************************************/ -/* */ -/* Low-Leakage Wakeup Unit (LLWU) */ -/* */ -/****************************************************************/ -/********** Bits definition for LLWU_PE1 register *************/ -#define LLWU_PE1_WUPE3_SHIFT 6 /*!< Wakeup Pin Enable for LLWU_P3 (shift) */ -#define LLWU_PE1_WUPE3_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE1_WUPE3_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P3 (mask) */ -#define LLWU_PE1_WUPE3(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE1_WUPE3_SHIFT) & LLWU_PE1_WUPE3_MASK)) /*!< Wakeup Pin Enable for LLWU_P3 */ -#define LLWU_PE1_WUPE2_SHIFT 4 /*!< Wakeup Pin Enable for LLWU_P2 (shift) */ -#define LLWU_PE1_WUPE2_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE1_WUPE2_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P2 (mask) */ -#define LLWU_PE1_WUPE2(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE1_WUPE2_SHIFT) & LLWU_PE1_WUPE2_MASK)) /*!< Wakeup Pin Enable for LLWU_P2 */ -#define LLWU_PE1_WUPE1_SHIFT 2 /*!< Wakeup Pin Enable for LLWU_P1 (shift) */ -#define LLWU_PE1_WUPE1_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE1_WUPE1_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P1 (mask) */ -#define LLWU_PE1_WUPE1(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE1_WUPE1_SHIFT) & LLWU_PE1_WUPE1_MASK)) /*!< Wakeup Pin Enable for LLWU_P1 */ -#define LLWU_PE1_WUPE0_SHIFT 0 /*!< Wakeup Pin Enable for LLWU_P0 (shift) */ -#define LLWU_PE1_WUPE0_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE1_WUPE0_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P0 (mask) */ -#define LLWU_PE1_WUPE0(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE1_WUPE0_SHIFT) & LLWU_PE1_WUPE0_MASK)) /*!< Wakeup Pin Enable for LLWU_P0 */ - -/********** Bits definition for LLWU_PE2 register *************/ -#define LLWU_PE2_WUPE7_SHIFT 6 /*!< Wakeup Pin Enable for LLWU_P7 (shift) */ -#define LLWU_PE2_WUPE7_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE2_WUPE7_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P7 (mask) */ -#define LLWU_PE2_WUPE7(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE2_WUPE7_SHIFT) & LLWU_PE2_WUPE7_MASK)) /*!< Wakeup Pin Enable for LLWU_P7 */ -#define LLWU_PE2_WUPE6_SHIFT 4 /*!< Wakeup Pin Enable for LLWU_P6 (shift) */ -#define LLWU_PE2_WUPE6_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE2_WUPE6_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P6 (mask) */ -#define LLWU_PE2_WUPE6(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE2_WUPE6_SHIFT) & LLWU_PE2_WUPE6_MASK)) /*!< Wakeup Pin Enable for LLWU_P6 */ -#define LLWU_PE2_WUPE5_SHIFT 2 /*!< Wakeup Pin Enable for LLWU_P5 (shift) */ -#define LLWU_PE2_WUPE5_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE2_WUPE5_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P5 (mask) */ -#define LLWU_PE2_WUPE5(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE2_WUPE5_SHIFT) & LLWU_PE2_WUPE5_MASK)) /*!< Wakeup Pin Enable for LLWU_P5 */ -#define LLWU_PE2_WUPE4_SHIFT 0 /*!< Wakeup Pin Enable for LLWU_P4 (shift) */ -#define LLWU_PE2_WUPE4_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE2_WUPE4_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P4 (mask) */ -#define LLWU_PE2_WUPE4(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE2_WUPE4_SHIFT) & LLWU_PE2_WUPE4_MASK)) /*!< Wakeup Pin Enable for LLWU_P4 */ - -/********** Bits definition for LLWU_PE3 register *************/ -#define LLWU_PE3_WUPE11_SHIFT 6 /*!< Wakeup Pin Enable for LLWU_P11 (shift) */ -#define LLWU_PE3_WUPE11_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE3_WUPE11_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P11 (mask) */ -#define LLWU_PE3_WUPE11(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE3_WUPE11_SHIFT) & LLWU_PE3_WUPE11_MASK)) /*!< Wakeup Pin Enable for LLWU_P11 */ -#define LLWU_PE3_WUPE10_SHIFT 4 /*!< Wakeup Pin Enable for LLWU_P10 (shift) */ -#define LLWU_PE3_WUPE10_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE3_WUPE10_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P10 (mask) */ -#define LLWU_PE3_WUPE10(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE3_WUPE10_SHIFT) & LLWU_PE3_WUPE10_MASK)) /*!< Wakeup Pin Enable for LLWU_P10 */ -#define LLWU_PE3_WUPE13_SHIFT 2 /*!< Wakeup Pin Enable for LLWU_P9 (shift) */ -#define LLWU_PE3_WUPE13_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE3_WUPE13_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P9 (mask) */ -#define LLWU_PE3_WUPE13(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE3_WUPE13_SHIFT) & LLWU_PE3_WUPE13_MASK)) /*!< Wakeup Pin Enable for LLWU_P9 */ -#define LLWU_PE3_WUPE8_SHIFT 0 /*!< Wakeup Pin Enable for LLWU_P8 (shift) */ -#define LLWU_PE3_WUPE8_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE3_WUPE8_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P8 (mask) */ -#define LLWU_PE3_WUPE8(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE3_WUPE8_SHIFT) & LLWU_PE3_WUPE8_MASK)) /*!< Wakeup Pin Enable for LLWU_P8 */ - -/********** Bits definition for LLWU_PE4 register *************/ -#define LLWU_PE4_WUPE15_SHIFT 6 /*!< Wakeup Pin Enable for LLWU_P15 (shift) */ -#define LLWU_PE4_WUPE15_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE4_WUPE15_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P15 (mask) */ -#define LLWU_PE4_WUPE15(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE4_WUPE15_SHIFT) & LLWU_PE4_WUPE15_MASK)) /*!< Wakeup Pin Enable for LLWU_P15 */ -#define LLWU_PE4_WUPE14_SHIFT 4 /*!< Wakeup Pin Enable for LLWU_P14 (shift) */ -#define LLWU_PE4_WUPE14_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE4_WUPE14_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P14 (mask) */ -#define LLWU_PE4_WUPE14(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE4_WUPE14_SHIFT) & LLWU_PE4_WUPE14_MASK)) /*!< Wakeup Pin Enable for LLWU_P14 */ -#define LLWU_PE4_WUPE13_SHIFT 2 /*!< Wakeup Pin Enable for LLWU_P13 (shift) */ -#define LLWU_PE4_WUPE13_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE4_WUPE13_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P13 (mask) */ -#define LLWU_PE4_WUPE13(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE4_WUPE13_SHIFT) & LLWU_PE4_WUPE13_MASK)) /*!< Wakeup Pin Enable for LLWU_P13 */ -#define LLWU_PE4_WUPE12_SHIFT 0 /*!< Wakeup Pin Enable for LLWU_P12 (shift) */ -#define LLWU_PE4_WUPE12_MASK ((uint8_t)((uint8_t)0x03 << LLWU_PE4_WUPE12_SHIFT)) /*!< Wakeup Pin Enable for LLWU_P12 (mask) */ -#define LLWU_PE4_WUPE12(x) ((uint8_t)(((uint8_t)(x) << LLWU_PE4_WUPE12_SHIFT) & LLWU_PE4_WUPE12_MASK)) /*!< Wakeup Pin Enable for LLWU_P12 */ - -/********** Bits definition for LLWU_ME register *************/ -#define LLWU_ME_WUME7 ((uint8_t)((uint8_t)1 << 7)) /*!< Wakeup Module Enable for Module 7 */ -#define LLWU_ME_WUME6 ((uint8_t)((uint8_t)1 << 6)) /*!< Wakeup Module Enable for Module 6 */ -#define LLWU_ME_WUME5 ((uint8_t)((uint8_t)1 << 5)) /*!< Wakeup Module Enable for Module 5 */ -#define LLWU_ME_WUME4 ((uint8_t)((uint8_t)1 << 4)) /*!< Wakeup Module Enable for Module 4 */ -#define LLWU_ME_WUME3 ((uint8_t)((uint8_t)1 << 3)) /*!< Wakeup Module Enable for Module 3 */ -#define LLWU_ME_WUME2 ((uint8_t)((uint8_t)1 << 2)) /*!< Wakeup Module Enable for Module 2 */ -#define LLWU_ME_WUME1 ((uint8_t)((uint8_t)1 << 1)) /*!< Wakeup Module Enable for Module 1 */ -#define LLWU_ME_WUME0 ((uint8_t)((uint8_t)1 << 0)) /*!< Wakeup Module Enable for Module 0 */ - -/********** Bits definition for LLWU_F1 register *************/ -#define LLWU_F1_WUF7 ((uint8_t)((uint8_t)1 << 7)) /*!< Wakeup Flag for LLWU_P7 */ -#define LLWU_F1_WUF6 ((uint8_t)((uint8_t)1 << 6)) /*!< Wakeup Flag for LLWU_P6 */ -#define LLWU_F1_WUF5 ((uint8_t)((uint8_t)1 << 5)) /*!< Wakeup Flag for LLWU_P5 */ -#define LLWU_F1_WUF4 ((uint8_t)((uint8_t)1 << 4)) /*!< Wakeup Flag for LLWU_P4 */ -#define LLWU_F1_WUF3 ((uint8_t)((uint8_t)1 << 3)) /*!< Wakeup Flag for LLWU_P3 */ -#define LLWU_F1_WUF2 ((uint8_t)((uint8_t)1 << 2)) /*!< Wakeup Flag for LLWU_P2 */ -#define LLWU_F1_WUF1 ((uint8_t)((uint8_t)1 << 1)) /*!< Wakeup Flag for LLWU_P1 */ -#define LLWU_F1_WUF0 ((uint8_t)((uint8_t)1 << 0)) /*!< Wakeup Flag for LLWU_P0 */ - -/********** Bits definition for LLWU_F2 register *************/ -#define LLWU_F2_WUF15 ((uint8_t)((uint8_t)1 << 7)) /*!< Wakeup Flag for LLWU_P15 */ -#define LLWU_F2_WUF14 ((uint8_t)((uint8_t)1 << 6)) /*!< Wakeup Flag for LLWU_P14 */ -#define LLWU_F2_WUF13 ((uint8_t)((uint8_t)1 << 5)) /*!< Wakeup Flag for LLWU_P13 */ -#define LLWU_F2_WUF12 ((uint8_t)((uint8_t)1 << 4)) /*!< Wakeup Flag for LLWU_P12 */ -#define LLWU_F2_WUF11 ((uint8_t)((uint8_t)1 << 3)) /*!< Wakeup Flag for LLWU_P11 */ -#define LLWU_F2_WUF10 ((uint8_t)((uint8_t)1 << 2)) /*!< Wakeup Flag for LLWU_P10 */ -#define LLWU_F2_WUF9 ((uint8_t)((uint8_t)1 << 1)) /*!< Wakeup Flag for LLWU_P9 */ -#define LLWU_F2_WUF8 ((uint8_t)((uint8_t)1 << 0)) /*!< Wakeup Flag for LLWU_P8 */ - -/********** Bits definition for LLWU_F3 register *************/ -#define LLWU_F3_MWUF7 ((uint8_t)((uint8_t)1 << 7)) /*!< Wakeup Flag for Module 7 */ -#define LLWU_F3_MWUF6 ((uint8_t)((uint8_t)1 << 6)) /*!< Wakeup Flag for Module 6 */ -#define LLWU_F3_MWUF5 ((uint8_t)((uint8_t)1 << 5)) /*!< Wakeup Flag for Module 5 */ -#define LLWU_F3_MWUF4 ((uint8_t)((uint8_t)1 << 4)) /*!< Wakeup Flag for Module 4 */ -#define LLWU_F3_MWUF3 ((uint8_t)((uint8_t)1 << 3)) /*!< Wakeup Flag for Module 3 */ -#define LLWU_F3_MWUF2 ((uint8_t)((uint8_t)1 << 2)) /*!< Wakeup Flag for Module 2 */ -#define LLWU_F3_MWUF1 ((uint8_t)((uint8_t)1 << 1)) /*!< Wakeup Flag for Module 1 */ -#define LLWU_F3_MWUF0 ((uint8_t)((uint8_t)1 << 0)) /*!< Wakeup Flag for Module 0 */ - -/********** Bits definition for LLWU_FILT1 register *************/ -#define LLWU_FILT1_FILTF ((uint8_t)((uint8_t)1 << 7)) /*!< Filter Detect Flag */ -#define LLWU_FILT1_FILTE_SHIFT 5 /*!< Digital Filter on External Pin (shift) */ -#define LLWU_FILT1_FILTE_MASK ((uint8_t)((uint8_t)0x03 << LLWU_FILT1_FILTE_SHIFT)) /*!< Digital Filter on External Pin (mask) */ -#define LLWU_FILT1_FILTE(x) ((uint8_t)(((uint8_t)(x) << LLWU_FILT1_FILTE_SHIFT) & LLWU_FILT1_FILTE_MASK)) /*!< Digital Filter on External Pin */ -#define LLWU_FILT1_FILTE_DISABLED LLWU_FILT1_FILTE(0) /*!< Filter disabled */ -#define LLWU_FILT1_FILTE_POSEDGE LLWU_FILT1_FILTE(1) /*!< Filter posedge detect enabled */ -#define LLWU_FILT1_FILTE_NEGEDGE LLWU_FILT1_FILTE(2) /*!< Filter negedge detect enabled */ -#define LLWU_FILT1_FILTE_ANYEDGE LLWU_FILT1_FILTE(3) /*!< Filter any edge detect enabled */ -#define LLWU_FILT1_FILTSEL_SHIFT 0 /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) (shift) */ -#define LLWU_FILT1_FILTSEL_MASK ((uint8_t)((uint8_t)0x0F << LLWU_FILT1_FILTSEL_SHIFT)) /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) (mask) */ -#define LLWU_FILT1_FILTSEL(x) ((uint8_t)(((uint8_t)(x) << LLWU_FILT1_FILTSEL_SHIFT) & LLWU_FILT1_FILTSEL_MASK)) /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) */ - -/********** Bits definition for LLWU_FILT2 register *************/ -#define LLWU_FILT2_FILTF ((uint8_t)((uint8_t)1 << 7)) /*!< Filter Detect Flag */ -#define LLWU_FILT2_FILTE_SHIFT 5 /*!< Digital Filter on External Pin (shift) */ -#define LLWU_FILT2_FILTE_MASK ((uint8_t)((uint8_t)0x03 << LLWU_FILT2_FILTE_SHIFT)) /*!< Digital Filter on External Pin (mask) */ -#define LLWU_FILT2_FILTE(x) ((uint8_t)(((uint8_t)(x) << LLWU_FILT2_FILTE_SHIFT) & LLWU_FILT2_FILTE_MASK)) /*!< Digital Filter on External Pin */ -#define LLWU_FILT2_FILTE_DISABLED LLWU_FILT2_FILTE(0) /*!< Filter disabled */ -#define LLWU_FILT2_FILTE_POSEDGE LLWU_FILT2_FILTE(1) /*!< Filter posedge detect enabled */ -#define LLWU_FILT2_FILTE_NEGEDGE LLWU_FILT2_FILTE(2) /*!< Filter negedge detect enabled */ -#define LLWU_FILT2_FILTE_ANYEDGE LLWU_FILT2_FILTE(3) /*!< Filter any edge detect enabled */ -#define LLWU_FILT2_FILTSEL_SHIFT 0 /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) (shift) */ -#define LLWU_FILT2_FILTSEL_MASK ((uint8_t)((uint8_t)0x0F << LLWU_FILT2_FILTSEL_SHIFT)) /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) (mask) */ -#define LLWU_FILT2_FILTSEL(x) ((uint8_t)(((uint8_t)(x) << LLWU_FILT2_FILTSEL_SHIFT) & LLWU_FILT2_FILTSEL_MASK)) /*!< Filter Pin Select (LLWU_P0 ... LLWU_P15) */ - -/****************************************************************/ -/* */ -/* Port Control and interrupts (PORT) */ -/* */ -/****************************************************************/ -/******** Bits definition for PORTx_PCRn register *************/ -#define PORTx_PCRn_ISF ((uint32_t)0x01000000) /*!< Interrupt Status Flag */ -#define PORTx_PCRn_IRQC_SHIFT 16 -#define PORTx_PCRn_IRQC_MASK ((uint32_t)((uint32_t)0xF << PORTx_PCRn_IRQC_SHIFT)) -#define PORTx_PCRn_IRQC(x) ((uint32_t)(((uint32_t)(x) << PORTx_PCRn_IRQC_SHIFT) & PORTx_PCRn_IRQC_MASK)) -#define PORTx_PCRn_LK ((uint32_t)0x00008000) /*!< Lock Register */ -#define PORTx_PCRn_MUX_SHIFT 8 /*!< Pin Mux Control (shift) */ -#define PORTx_PCRn_MUX_MASK ((uint32_t)((uint32_t)0x7 << PORTx_PCRn_MUX_SHIFT)) /*!< Pin Mux Control (mask) */ -#define PORTx_PCRn_MUX(x) ((uint32_t)(((uint32_t)(x) << PORTx_PCRn_MUX_SHIFT) & PORTx_PCRn_MUX_MASK)) /*!< Pin Mux Control */ -#define PORTx_PCRn_DSE ((uint32_t)0x00000040) /*!< Drive Strength Enable */ -#define PORTx_PCRn_ODE ((uint32_t)0x00000020) /*!< Open Drain Enable */ -#define PORTx_PCRn_PFE ((uint32_t)0x00000010) /*!< Passive Filter Enable */ -#define PORTx_PCRn_SRE ((uint32_t)0x00000004) /*!< Slew Rate Enable */ -#define PORTx_PCRn_PE ((uint32_t)0x00000002) /*!< Pull Enable */ -#define PORTx_PCRn_PS ((uint32_t)0x00000001) /*!< Pull Select */ - -/****************************************************************/ -/* */ -/* Oscillator (OSC) */ -/* */ -/****************************************************************/ -/*********** Bits definition for OSC_CR register **************/ -#define OSC_CR_ERCLKEN ((uint8_t)0x80) /*!< External Reference Enable */ -#define OSC_CR_EREFSTEN ((uint8_t)0x20) /*!< External Reference Stop Enable */ -#define OSC_CR_SC2P ((uint8_t)0x08) /*!< Oscillator 2pF Capacitor Load Configure */ -#define OSC_CR_SC4P ((uint8_t)0x04) /*!< Oscillator 4pF Capacitor Load Configure */ -#define OSC_CR_SC8P ((uint8_t)0x02) /*!< Oscillator 8pF Capacitor Load Configure */ -#define OSC_CR_SC16P ((uint8_t)0x01) /*!< Oscillator 16pF Capacitor Load Configure */ - -/****************************************************************/ -/* */ -/* Direct Memory Access (DMA) */ -/* */ -/****************************************************************/ -/* ---------------------------------------------------------------------------- - -- DMA - Register accessor macros - ---------------------------------------------------------------------------- */ - -/*! - * @addtogroup DMA_Register_Accessor_Macros DMA - Register accessor macros - * @{ - */ - - -/* DMA - Register accessors */ -#define DMA_CR_REG(base) ((base)->CR) -#define DMA_ES_REG(base) ((base)->ES) -#define DMA_ERQ_REG(base) ((base)->ERQ) -#define DMA_EEI_REG(base) ((base)->EEI) -#define DMA_CEEI_REG(base) ((base)->CEEI) -#define DMA_SEEI_REG(base) ((base)->SEEI) -#define DMA_CERQ_REG(base) ((base)->CERQ) -#define DMA_SERQ_REG(base) ((base)->SERQ) -#define DMA_CDNE_REG(base) ((base)->CDNE) -#define DMA_SSRT_REG(base) ((base)->SSRT) -#define DMA_CERR_REG(base) ((base)->CERR) -#define DMA_CINT_REG(base) ((base)->CINT) -#define DMA_INT_REG(base) ((base)->INT) -#define DMA_ERR_REG(base) ((base)->ERR) -#define DMA_HRS_REG(base) ((base)->HRS) -#define DMA_DCHPRI3_REG(base) ((base)->DCHPRI3) -#define DMA_DCHPRI2_REG(base) ((base)->DCHPRI2) -#define DMA_DCHPRI1_REG(base) ((base)->DCHPRI1) -#define DMA_DCHPRI0_REG(base) ((base)->DCHPRI0) -#define DMA_SADDR_REG(base,index) ((base)->TCD[index].SADDR) -#define DMA_SOFF_REG(base,index) ((base)->TCD[index].SOFF) -#define DMA_ATTR_REG(base,index) ((base)->TCD[index].ATTR) -#define DMA_NBYTES_MLNO_REG(base,index) ((base)->TCD[index].NBYTES_MLNO) -#define DMA_NBYTES_MLOFFNO_REG(base,index) ((base)->TCD[index].NBYTES_MLOFFNO) -#define DMA_NBYTES_MLOFFYES_REG(base,index) ((base)->TCD[index].NBYTES_MLOFFYES) -#define DMA_SLAST_REG(base,index) ((base)->TCD[index].SLAST) -#define DMA_DADDR_REG(base,index) ((base)->TCD[index].DADDR) -#define DMA_DOFF_REG(base,index) ((base)->TCD[index].DOFF) -#define DMA_CITER_ELINKNO_REG(base,index) ((base)->TCD[index].CITER_ELINKNO) -#define DMA_CITER_ELINKYES_REG(base,index) ((base)->TCD[index].CITER_ELINKYES) -#define DMA_DLAST_SGA_REG(base,index) ((base)->TCD[index].DLAST_SGA) -#define DMA_CSR_REG(base,index) ((base)->TCD[index].CSR) -#define DMA_BITER_ELINKNO_REG(base,index) ((base)->TCD[index].BITER_ELINKNO) -#define DMA_BITER_ELINKYES_REG(base,index) ((base)->TCD[index].BITER_ELINKYES) - -/*! - * @} - */ /* end of group DMA_Register_Accessor_Macros */ - - -/* ---------------------------------------------------------------------------- - -- DMA Register Masks - ---------------------------------------------------------------------------- */ - -/*! - * @addtogroup DMA_Register_Masks DMA Register Masks - * @{ - */ - -/* CR Bit Fields */ -#define DMA_CR_EDBG_MASK 0x2u -#define DMA_CR_EDBG_SHIFT 1 -#define DMA_CR_ERCA_MASK 0x4u -#define DMA_CR_ERCA_SHIFT 2 -#define DMA_CR_HOE_MASK 0x10u -#define DMA_CR_HOE_SHIFT 4 -#define DMA_CR_HALT_MASK 0x20u -#define DMA_CR_HALT_SHIFT 5 -#define DMA_CR_CLM_MASK 0x40u -#define DMA_CR_CLM_SHIFT 6 -#define DMA_CR_EMLM_MASK 0x80u -#define DMA_CR_EMLM_SHIFT 7 -#define DMA_CR_ECX_MASK 0x10000u -#define DMA_CR_ECX_SHIFT 16 -#define DMA_CR_CX_MASK 0x20000u -#define DMA_CR_CX_SHIFT 17 -/* ES Bit Fields */ -#define DMA_ES_DBE_MASK 0x1u -#define DMA_ES_DBE_SHIFT 0 -#define DMA_ES_SBE_MASK 0x2u -#define DMA_ES_SBE_SHIFT 1 -#define DMA_ES_SGE_MASK 0x4u -#define DMA_ES_SGE_SHIFT 2 -#define DMA_ES_NCE_MASK 0x8u -#define DMA_ES_NCE_SHIFT 3 -#define DMA_ES_DOE_MASK 0x10u -#define DMA_ES_DOE_SHIFT 4 -#define DMA_ES_DAE_MASK 0x20u -#define DMA_ES_DAE_SHIFT 5 -#define DMA_ES_SOE_MASK 0x40u -#define DMA_ES_SOE_SHIFT 6 -#define DMA_ES_SAE_MASK 0x80u -#define DMA_ES_SAE_SHIFT 7 -#define DMA_ES_ERRCHN_MASK 0xF00u -#define DMA_ES_ERRCHN_SHIFT 8 -#define DMA_ES_ERRCHN(x) (((uint32_t)(((uint32_t)(x))<. -*/ - -/* - * ST32F103x8 memory setup. - */ -MEMORY -{ - flash : org = 0x08000000, len = 64k - ram0 : org = 0x20000000, len = 20k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F103xC.ld b/ChibiOS_16.1.5/community/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F103xC.ld deleted file mode 100644 index 705a44f..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/ARMCMx/compilers/GCC/ld/STM32F103xC.ld +++ /dev/null @@ -1,50 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103xC memory setup. - */ -MEMORY -{ - flash : org = 0x08000000, len = 256k - ram0 : org = 0x20000000, len = 48k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.c b/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.c deleted file mode 100644 index 7a8d7f2..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MSP430X/nilcore.c - * @brief MSP430X port code. - * - * @addtogroup MSP430X_CORE - * @{ - */ - -#include "ch.h" - -/*===========================================================================*/ -/* Module local definitions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module exported variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module local types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module local variables. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module local functions. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module exported functions. */ -/*===========================================================================*/ - -/** - * @brief Performs a context switch between two threads. - * @details This is the most critical code in any port, this function - * is responsible for the context switch between 2 threads. - * @note The implementation of this code affects directly the context - * switch performance so optimize here as much as you can. - * - * @param[in] ntp the thread to be switched in - * @param[in] otp the thread to be switched out - */ -#if !(__GNUC__ < 6 && __GNUC_MINOR__ < 4) || defined(__OPTIMIZE__) -__attribute__((naked)) -#endif -void _port_switch(thread_t *ntp, thread_t *otp) { -#if (__GNUC__ < 6 && __GNUC_MINOR__ < 4) && !defined(__OPTIMIZE__) - asm volatile ("add #4, r1"); -#endif - (void)(ntp); - (void)(otp); -#if defined(__MSP430X_LARGE__) - asm volatile ("pushm.a #7, R10"); - asm volatile ("mova r1, @R13"); - asm volatile ("mova @R12, r1"); - asm volatile ("popm.a #7, R10"); - asm volatile ("reta"); -#else - asm volatile ("pushm.w #7, R10"); - asm volatile ("mov r1, @R13"); - asm volatile ("mov @R12, r1"); - asm volatile ("popm.w #7, R10"); - asm volatile ("ret"); -#endif -} - -/** - * @brief Start a thread by invoking its work function. - * @details If the work function returns @p chThdExit() is automatically - * invoked. - */ -void _port_thread_start(void) { - - /* See PORT_SETUP_CONTEXT in nilcore.h */ - chSysUnlock(); -#if defined(__MSP430X_LARGE__) - asm volatile ("mova R5, R12"); - asm volatile ("calla R4"); -#else - asm volatile ("mov R5, R12"); - asm volatile ("call R4"); -#endif - chSysHalt(0); -} -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.h b/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.h deleted file mode 100644 index 09f87c4..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore.h +++ /dev/null @@ -1,437 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MSP430X/nilcore.h - * @brief MSP430X port macros and structures. - * - * @addtogroup MSP430X_CORE - * @{ - */ - -#ifndef CHCORE_H -#define CHCORE_H - -#include -#include - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -/** - * @name Architecture and Compiler - * @{ - */ -/** - * @brief Macro defining the port architecture. - */ -#define PORT_ARCHITECTURE_MSP430X - -/** - * @brief Name of the implemented architecture. - */ -#define PORT_ARCHITECTURE_NAME "MSP430X" - -/** - * @brief Name of the architecture variant. - */ -#define PORT_CORE_VARIANT_NAME "MSP430Xv2" - -/* The following code is not processed when the file is included from an - * asm module because those intrinsic macrosa re not necessarily defined - * by the assembler too.*/ -#if !defined(_FROM_ASM_) - -/** - * @brief Compiler name and version. - */ -#if defined(__GNUC__) || defined(__DOXYGEN__) -#define PORT_COMPILER_NAME "GCC " __VERSION__ - -#else -#error "unsupported compiler" -#endif - -#endif /* !defined(_FROM_ASM_) */ -/** - * @brief Port-specific information string. - */ -#define PORT_INFO "16 bits code addressing" - -/** - * @brief This port supports a realtime counter. - */ -#define PORT_SUPPORTS_RT FALSE -/** @} */ - -/*===========================================================================*/ -/* Module pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @brief Stack size for the system idle thread. - * @details This size depends on the idle thread implementation, usually - * the idle thread should take no more space than those reserved - * by @p PORT_INT_REQUIRED_STACK. - * @note In this port it is set to 8. - */ -#if !defined(PORT_IDLE_THREAD_STACK_SIZE) || defined(__DOXYGEN__) -#define PORT_IDLE_THREAD_STACK_SIZE 8 -#endif - -/** - * @brief Per-thread stack overhead for interrupts servicing. - * @details This constant is used in the calculation of the correct working - * area size. - * @note In this port the default is 32 bytes per thread. - */ -#if !defined(PORT_INT_REQUIRED_STACK) || defined(__DOXYGEN__) -#define PORT_INT_REQUIRED_STACK 32 -#endif - -/** - * @brief Enables an alternative timer implementation. - * @details Usually the port uses a timer interface defined in the file - * @p nilcore_timer.h, if this option is enabled then the file - * @p nilcore_timer_alt.h is included instead. - */ -#if !defined(PORT_USE_ALT_TIMER) -#define PORT_USE_ALT_TIMER FALSE -#endif - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module data structures and types. */ -/*===========================================================================*/ - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/** - * @brief Type of stack and memory alignment enforcement. - */ -typedef uint16_t stkalign_t; - -/** - * @brief Type of natural register size - depends on memory model. - */ -#if defined(__MSP430X_LARGE__) -typedef unsigned __int20 reg_t; -#else -typedef uint16_t reg_t; -#endif - -/** - * @brief Natural alignment constant. - * @note It is the minimum alignment for pointer-size variables. - */ -#define PORT_NATURAL_ALIGN 2U - -/** - * @brief Stack alignment constant. - * @note It is the alignement required for the stack pointer. - */ -#define PORT_STACK_ALIGN 2U - -/** - * @brief Working Areas alignment constant. - * @note It is the alignment to be enforced for thread working areas. - */ -#define PORT_WORKING_AREA_ALIGN 2U -/** @} */ - -/** - * @brief System saved context. - * @details This structure represents the inner stack frame during a context - * switching. - */ -struct port_intctx { - reg_t r4; - reg_t r5; - reg_t r6; - reg_t r7; - reg_t r8; - reg_t r9; - reg_t r10; - reg_t r0; /* program counter */ -}; - -/** - * @brief Platform dependent part of the @p thread_t structure. - * @details This structure usually contains just the saved stack pointer - * defined as a pointer to a @p port_intctx structure. - */ -struct port_context { - struct port_intctx *sp; -}; - -#endif /* !defined(_FROM_ASM_) */ - -/*===========================================================================*/ -/* Module macros. */ -/*===========================================================================*/ - -/** - * @brief Platform dependent thread stack setup. - * @details This code usually setup the context switching frame represented - * by an @p port_intctx structure. - */ -#define PORT_SETUP_CONTEXT(tp, wbase, wtop, pf, arg) { \ - (tp)->ctx.sp = (struct port_intctx*)(((uint8_t *)(wtop)) - \ - sizeof(struct port_intctx)); \ - (tp)->ctx.sp->r4 = (reg_t)pf; \ - (tp)->ctx.sp->r5 = (reg_t)arg; \ - (tp)->ctx.sp->r0 = (reg_t)_port_thread_start; \ -} - -/** - * @brief Static working area allocation. - * @details This macro is used to allocate a static thread working area - * aligned as both position and size. - * - * @param[in] s the name to be assigned to the stack array - * @param[in] n the stack size to be assigned to the thread - */ -#define PORT_WORKING_AREA(s, n) \ - stkalign_t s[THD_WORKING_AREA_SIZE(n) / sizeof (stkalign_t)] - -/** - * @brief Computes the thread working area global size. - * @note There is no need to perform alignments in this macro. - */ -#define PORT_WA_SIZE(n) ((sizeof(struct port_intctx) - 1) + \ - (n) + (PORT_INT_REQUIRED_STACK)) - -/** - * @brief IRQ prologue code. - * @details This macro must be inserted at the start of all IRQ handlers - * enabled to invoke system APIs. - */ -#define PORT_IRQ_PROLOGUE() - -/** - * @brief IRQ epilogue code. - * @details This macro must be inserted at the end of all IRQ handlers - * enabled to invoke system APIs. - */ -#define PORT_IRQ_EPILOGUE() chSchRescheduleS() - -/** - * @brief IRQ handler function declaration. - * @note @p id can be a function name or a vector number depending on the - * port implementation. - */ -#define PORT_IRQ_HANDLER(id) __attribute__ ((interrupt(id))) \ - void ISR_ ## id (void) - -/** - * @brief Fast IRQ handler function declaration. - * @note @p id can be a function name or a vector number depending on the - * port implementation. - */ -#define PORT_FAST_IRQ_HANDLER(id) PORT_IRQ_HANDLER(id) - -/** - * @brief Performs a context switch between two threads. - * @details This is the most critical code in any port, this function - * is responsible for the context switch between 2 threads. - * @note The implementation of this code affects directly the context - * switch performance so optimize here as much as you can. - * - * @param[in] ntp the thread to be switched in - * @param[in] otp the thread to be switched out - */ -#define port_switch(ntp, otp) _port_switch(ntp, otp) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -#ifdef __cplusplus -extern "C" { -#endif - void _port_irq_epilogue(void); - void _port_switch(thread_t *ntp, thread_t *otp); - void _port_thread_start(void); -#ifdef __cplusplus -} -#endif - -#endif /* !defined(_FROM_ASM_) */ - -/*===========================================================================*/ -/* Module inline functions. */ -/*===========================================================================*/ - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/** - * @brief Port-related initialization code. - */ -static inline void port_init(void) { - -} - -/** - * @brief Returns a word encoding the current interrupts status. - * - * @return The interrupts status. - */ -static inline syssts_t port_get_irq_status(void) { - - return __get_SR_register(); -} - -/** - * @brief Checks the interrupt status. - * - * @param[in] sts the interrupt status word - * - * @return The interrupt status. - * @retvel false the word specified a disabled interrupts status. - * @retvel true the word specified an enabled interrupts status. - */ -static inline bool port_irq_enabled(syssts_t sts) { - - return sts & GIE; -} - -/** - * @brief Determines the current execution context. - * - * @return The execution context. - * @retval false not running in ISR mode. - * @retval true running in ISR mode. - */ -static inline bool port_is_isr_context(void) { - /* Efficiency would be enhanced by not doing this, - * because of implementation details */ - return __get_SR_register() & GIE; -} - -/** - * @brief Kernel-lock action. - */ -static inline void port_lock(void) { - - _disable_interrupts(); - asm volatile("nop"); -} - -/** - * @brief Kernel-unlock action. - */ -static inline void port_unlock(void) { - asm volatile("nop"); - _enable_interrupts(); -} - -/** - * @brief Kernel-lock action from an interrupt handler. - * @note This function is empty in this port. - */ -static inline void port_lock_from_isr(void) { - -} - -/** - * @brief Kernel-unlock action from an interrupt handler. - * @note This function is empty in this port. - */ -static inline void port_unlock_from_isr(void) { - -} - -/** - * @brief Disables all the interrupt sources. - */ -static inline void port_disable(void) { - - _disable_interrupts(); - asm volatile("nop"); -} - -/** - * @brief Disables the interrupt sources below kernel-level priority. - */ -static inline void port_suspend(void) { - - _disable_interrupts(); - asm volatile("nop"); -} - -/** - * @brief Enables all the interrupt sources. - */ -static inline void port_enable(void) { - - asm volatile("nop"); - _enable_interrupts(); -} - -/** - * @brief Enters an architecture-dependent IRQ-waiting mode. - * @details The function is meant to return when an interrupt becomes pending. - * The simplest implementation is an empty function or macro but this - * would not take advantage of architecture-specific power saving - * modes. - */ -static inline void port_wait_for_interrupt(void) { - -} - -/** - * @brief Returns the current value of the realtime counter. - * - * @return The realtime counter value. - */ -static inline rtcnt_t port_rt_get_counter_value(void) { - /* TODO implement realtime counter */ - return 0; -} - -#endif /* !defined(_FROM_ASM_) */ - -/*===========================================================================*/ -/* Module late inclusions. */ -/*===========================================================================*/ - -#if !defined(_FROM_ASM_) - -#if CH_CFG_ST_TIMEDELTA > 0 -#if !PORT_USE_ALT_TIMER -#include "chcore_timer.h" -#else /* PORT_USE_ALT_TIMER */ -#include "chcore_timer_alt.h" -#endif /* PORT_USE_ALT_TIMER */ -#endif /* CH_CFG_ST_TIMEDELTA > 0 */ - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* CHCORE_H */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore_timer.h b/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore_timer.h deleted file mode 100644 index 87ea514..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/chcore_timer.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MSP430X/chcore_timer.h - * @brief System timer header file. - * - * @addtogroup MSP430X_TIMER - * @{ - */ - -#ifndef CHCORE_TIMER_H -#define CHCORE_TIMER_H - -#include "hal_st.h" - -/*===========================================================================*/ -/* Module constants. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module pre-compile time settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module data structures and types. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module macros. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* Module inline functions. */ -/*===========================================================================*/ - -/** - * @brief Starts the alarm. - * @note Makes sure that no spurious alarms are triggered after - * this call. - * - * @param[in] abstime the time to be set for the first alarm - * - * @notapi - */ -static inline void port_timer_start_alarm(systime_t abstime) { - - stStartAlarm(abstime); -} - -/** - * @brief Stops the alarm interrupt. - * - * @notapi - */ -static inline void port_timer_stop_alarm(void) { - stStopAlarm(); -} - -/** - * @brief Sets the alarm time. - * - * @param[in] abstime the time to be set for the next alarm - * - * @notapi - */ -static inline void port_timer_set_alarm(systime_t abstime) { - - stSetAlarm(abstime); -} - -/** - * @brief Returns the system time. - * - * @return The system time. - * - * @notapi - */ -static inline systime_t port_timer_get_time(void) { - - return stGetCounter(); -} - -/** - * @brief Returns the current alarm time. - * - * @return The currently set alarm time. - * - * @notapi - */ -static inline systime_t port_timer_get_alarm(void) { - - return stGetAlarm(); -} - -#endif /* CHCORE_TIMER_H */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/chtypes.h b/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/chtypes.h deleted file mode 100644 index 46a074c..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/chtypes.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - ChibiOS/HAL - Copyright (C) 2016 Andrew Wygle aka awygle - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file MSP430X/compilers/GCC/chtypes.h - * @brief MSP430X port system types. - * - * @addtogroup MSP430X_GCC_CORE - * @{ - */ - -#ifndef CHTYPES_H -#define CHTYPES_H - -#include -#include -#include - -/** - * @name Common constants - */ -/** - * @brief Generic 'false' boolean constant. - */ -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif - -/** - * @brief Generic 'true' boolean constant. - */ -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif -/** @} */ - -/** - * @name Kernel types - * @{ - */ -typedef uint16_t rtcnt_t; /**< Realtime counter. */ -typedef uint64_t rttime_t; /**< Realtime accumulator. */ -typedef uint16_t syssts_t; /**< System status word. */ -typedef uint8_t tmode_t; /**< Thread flags. */ -typedef uint8_t tstate_t; /**< Thread state. */ -typedef uint8_t trefs_t; /**< Thread references counter. */ -typedef uint8_t tslices_t; /**< Thread time slices counter.*/ -typedef uint8_t tprio_t; /**< Thread priority. */ -typedef int16_t msg_t; /**< Inter-thread message. */ -typedef int32_t eventid_t; /**< Numeric event identifier. */ -typedef uint8_t eventmask_t; /**< Mask of event identifiers. */ -typedef int16_t cnt_t; /**< Generic signed counter. */ -typedef uint16_t ucnt_t; /**< Generic unsigned counter. */ - -/** - * @brief ROM constant modifier. - * @note It is set to use the "const" keyword in this port. - */ -#define ROMCONST const - -/** - * @brief Makes functions not inlineable. - * @note If the compiler does not support such attribute then the - * realtime counter precision could be degraded. - */ -#define NOINLINE __attribute__((noinline)) - -/** - * @brief Optimized thread function declaration macro. - */ -#define PORT_THD_FUNCTION(tname, arg) \ - void tname(void *arg) - -/** - * @brief Packed variable specifier. - */ -#define PACKED_VAR __attribute__((packed)) - -/** - * @brief Memory alignment enforcement for variables. - */ -#define ALIGNED_VAR(n) __attribute__((aligned(n))) - -/** - * @brief Size of a pointer. - * @note To be used where the sizeof operator cannot be used, preprocessor - * expressions for example. - */ -#define SIZEOF_PTR 4 - -/** - * @brief True if alignment is low-high in current architecture. - */ -#define REVERSE_ORDER 1 - -#endif /* CHTYPES_H */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/mk/port.mk b/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/mk/port.mk deleted file mode 100644 index 0ef5378..0000000 --- a/ChibiOS_16.1.5/community/os/common/ports/MSP430X/compilers/GCC/mk/port.mk +++ /dev/null @@ -1,7 +0,0 @@ -# List of the ChibiOS/RT MSP430X port files. -PORTSRC = ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X/chcore.c - -PORTASM = - -PORTINC = ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X \ - ${CHIBIOS_CONTRIB}/os/common/ports/MSP430X/compilers/GCC diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld deleted file mode 100644 index 1725c78..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * MK20DX128 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x100 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 128k - 0x410 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFE000, len = 16k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld deleted file mode 100644 index 986de7c..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR3.ld +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * MK20DX128 memory setup (3k bootloader section). - */ -MEMORY -{ - flash0 : org = 0x00000c00, len = 128k - 0xc00 - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFE000, len = 16k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld deleted file mode 100644 index f00dc37..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX128BLDR4.ld +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * MK20DX128 memory setup (4k bootloader section). - */ -MEMORY -{ - flash0 : org = 0x00001000, len = 128k - 0x1000 - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFE000, len = 16k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld deleted file mode 100644 index 66bc6b8..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * MK20DX256 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x400 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 256k - 0x410 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFF8000, len = 64k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld deleted file mode 100644 index 20c3000..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MK20DX256BLDR8.ld +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * MK20DX256 memory setup (8k bootloader section). - */ -MEMORY -{ - flash0 : org = 0x00002000, len = 256k - 0x2000 - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFF8000, len = 64k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld deleted file mode 100644 index 6527edc..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL26Z64.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * KL26Z64 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x100 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 64k - 0x410 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFF800, len = 8k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld \ No newline at end of file diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld deleted file mode 100644 index f0f107a..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL27Z256.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * KL27Z256 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x100 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 256k - 0x410 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFE000, len = 32k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld deleted file mode 100644 index e2a5e4a..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/MKL2xZ128.ld +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com - * (C) 2016 flabbergast - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - */ - -/* - * KL2xZ128 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 0x100 - flash1 : org = 0x00000400, len = 0x10 - flash2 : org = 0x00000410, len = 128k - 0x410 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x1FFFF000, len = 16k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* Flash region for the configuration bytes.*/ -SECTIONS -{ - .cfmprotect : ALIGN(4) SUBALIGN(4) - { - KEEP(*(.cfmconfig)) - } > flash1 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash2); -REGION_ALIAS("XTORS_FLASH_LMA", flash2); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash2); -REGION_ALIAS("TEXT_FLASH_LMA", flash2); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash2); -REGION_ALIAS("RODATA_FLASH_LMA", flash2); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash2); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash2); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts.*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash2); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for the default heap.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -/* Generic rules inclusion.*/ -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld deleted file mode 100644 index d4db7d4..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/NRF51822.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * NRF51822 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 256k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 32k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld deleted file mode 100644 index da05e8a..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xC3.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C123xC3 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 32k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 12k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld deleted file mode 100644 index 1a1c89e..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xD5.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C123xD5 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 64k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 24k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld deleted file mode 100644 index 254cb3a..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xE6.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C123xE6 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 128k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 32k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld deleted file mode 100644 index f73f9ec..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C123xH6.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C123xH6 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 256k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 32k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld deleted file mode 100644 index 0463ba0..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xKC.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C129xKC memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 512k - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 256k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld deleted file mode 100644 index f1846ca..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/ld/TM4C129xNC.ld +++ /dev/null @@ -1,84 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * TM4C123xH6 memory setup. - */ -MEMORY -{ - flash0 : org = 0x00000000, len = 1m - flash1 : org = 0x00000000, len = 0 - flash2 : org = 0x00000000, len = 0 - flash3 : org = 0x00000000, len = 0 - flash4 : org = 0x00000000, len = 0 - flash5 : org = 0x00000000, len = 0 - flash6 : org = 0x00000000, len = 0 - flash7 : org = 0x00000000, len = 0 - ram0 : org = 0x20000000, len = 256k - ram1 : org = 0x00000000, len = 0 - ram2 : org = 0x00000000, len = 0 - ram3 : org = 0x00000000, len = 0 - ram4 : org = 0x00000000, len = 0 - ram5 : org = 0x00000000, len = 0 - ram6 : org = 0x00000000, len = 0 - ram7 : org = 0x00000000, len = 0 -} - -/* For each data/text section two region are defined, a virtual region - and a load region (_LMA suffix).*/ - -/* Flash region to be used for exception vectors.*/ -REGION_ALIAS("VECTORS_FLASH", flash0); -REGION_ALIAS("VECTORS_FLASH_LMA", flash0); - -/* Flash region to be used for constructors and destructors.*/ -REGION_ALIAS("XTORS_FLASH", flash0); -REGION_ALIAS("XTORS_FLASH_LMA", flash0); - -/* Flash region to be used for code text.*/ -REGION_ALIAS("TEXT_FLASH", flash0); -REGION_ALIAS("TEXT_FLASH_LMA", flash0); - -/* Flash region to be used for read only data.*/ -REGION_ALIAS("RODATA_FLASH", flash0); -REGION_ALIAS("RODATA_FLASH_LMA", flash0); - -/* Flash region to be used for various.*/ -REGION_ALIAS("VARIOUS_FLASH", flash0); -REGION_ALIAS("VARIOUS_FLASH_LMA", flash0); - -/* Flash region to be used for RAM(n) initialization data.*/ -REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0); - -/* RAM region to be used for Main stack. This stack accommodates the processing - of all exceptions and interrupts*/ -REGION_ALIAS("MAIN_STACK_RAM", ram0); - -/* RAM region to be used for the process stack. This is the stack used by - the main() function.*/ -REGION_ALIAS("PROCESS_STACK_RAM", ram0); - -/* RAM region to be used for data segment.*/ -REGION_ALIAS("DATA_RAM", ram0); -REGION_ALIAS("DATA_RAM_LMA", flash0); - -/* RAM region to be used for BSS segment.*/ -REGION_ALIAS("BSS_RAM", ram0); - -/* RAM region to be used for HEAP segment.*/ -REGION_ALIAS("HEAP_RAM", ram0); - -INCLUDE rules.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk deleted file mode 100644 index 0c2ec7d..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk +++ /dev/null @@ -1,12 +0,0 @@ -# List of the ChibiOS generic K20x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c - -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S - -STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ - $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x \ - $(CHIBIOS)/os/common/ext/CMSIS/include \ - $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk deleted file mode 100644 index 7ab25de..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk +++ /dev/null @@ -1,3 +0,0 @@ -include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk - -STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x5 diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk deleted file mode 100644 index 3c8ea09..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x7.mk +++ /dev/null @@ -1,3 +0,0 @@ -include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk - -STARTUPINC += $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/K20x7 diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk deleted file mode 100644 index ca67f10..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk +++ /dev/null @@ -1,12 +0,0 @@ -# List of the ChibiOS generic KL2x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c - -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S - -STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ - $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/KL2x \ - $(CHIBIOS)/os/common/ext/CMSIS/include \ - $(CHIBIOS_CONTRIB)/os/common/ext/CMSIS/KINETIS - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk deleted file mode 100644 index f005ce0..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf51.mk +++ /dev/null @@ -1,10 +0,0 @@ -# List of the ChibiOS generic NRF51 startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c - -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v6m.S - -STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF51822 \ - $(CHIBIOS)/os/common/ext/CMSIS/include - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk deleted file mode 100644 index e9c97e5..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS generic TM4C123x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c - -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S - -STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ - $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/TM4C123x \ - $(CHIBIOS)/os/common/ext/CMSIS/include - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk deleted file mode 100644 index e151434..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c129x.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS generic TM4C129x startup and CMSIS files. -STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \ - $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c - -STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S - -STARTUPINC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC \ - $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/TM4C129x \ - $(CHIBIOS)/os/common/ext/CMSIS/include - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x5/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x5/cmparams.h deleted file mode 100644 index 8aebbc0..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x5/cmparams.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio. - (C) 2015 RedoX https://github.com/RedoXyde - (C) 2016 flabbergast - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file GCC/ARMCMx/K20x5/cmparams.h - * @brief ARM Cortex-M4 parameters for the Kinetis K20x5. - * - * @defgroup ARMCMx_K20x5 Kinetis K20x5 Specific Parameters - * @ingroup ARMCMx_SPECIFIC - * @details This file contains the Cortex-M4 specific parameters for the - * Kinetis K20x5 platform. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 4 - -/** - * @brief Systick unit presence. - */ -#define CORTEX_HAS_ST TRUE - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU FALSE - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 4 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 48 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "k20x5.h" - -#if CORTEX_MODEL != __CORTEX_M -#error "CMSIS __CORTEX_M mismatch" -#endif - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x7/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x7/cmparams.h deleted file mode 100644 index afb3053..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/K20x7/cmparams.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio. - (C) 2015 RedoX https://github.com/RedoXyde - (C) 2016 flabbergast - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file GCC/ARMCMx/K20x7/cmparams.h - * @brief ARM Cortex-M4 parameters for the Kinetis K20x7. - * - * @defgroup ARMCMx_K20x7 Kinetis K20x7 Specific Parameters - * @ingroup ARMCMx_SPECIFIC - * @details This file contains the Cortex-M4 specific parameters for the - * Kinetis K20x7 platform. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 4 - -/** - * @brief Systick unit presence. - */ -#define CORTEX_HAS_ST TRUE - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU FALSE - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 4 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 96 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "k20x7.h" - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/KL2x/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/KL2x/cmparams.h deleted file mode 100644 index 93a7055..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/KL2x/cmparams.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio. - (C) 2015 RedoX https://github.com/RedoXyde - (C) 2016 flabbergast - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file KL2x/cmparams.h - * @brief ARM Cortex-M0+ parameters for the Kinetis KL2x family. - * - * @defgroup ARMCMx_KL2x Kinetis KL2x Specific Parameters - * @ingroup ARMCMx_SPECIFIC - * @details This file contains the Cortex-M0+ specific parameters for the - * Kinetis KL2x platform. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 0 - -/** - * @brief Systick unit presence. - */ -#define CORTEX_HAS_ST TRUE - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU FALSE - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 2 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 32 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* If the device type is not externally defined, for example from the Makefile, - then a file named board.h is included. This file must contain a device - definition compatible with the vendor include file.*/ -#if !defined (KL25) && !defined (KL26) && \ - !defined (KL27Zxxx) && !defined (KL27Zxx) -#include "board.h" -#endif - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "kl2xz.h" - -#if CORTEX_MODEL != __CORTEX_M -#error "CMSIS __CORTEX_M mismatch" -#endif - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h deleted file mode 100644 index 126acf6..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/NRF51822/cmparams.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - Copyright (C) 2015 Fabio Utzig - - This file is part of ChibiOS. - - ChibiOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file NRF51822/cmparams.h - * @brief ARM Cortex-M0 parameters for the Nordic Semi NRF51822 family. - * - * @defgroup ARMCMx_NRF51x Nordic semiconductor NRF51x. - * @ingroup ARMCMx_SPECIFIC - * @details This file contains the Cortex-M0 specific parameters for the - * NRF51x platform. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 0 - -/** - * @brief Memory Protection unit presence. - */ -#define CORTEX_HAS_MPU 1 - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU 0 - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 2 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 32 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "nrf51.h" - -#if CORTEX_MODEL != __CORTEX_M -#error "CMSIS __CORTEX_M mismatch" -#endif - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** @} */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h deleted file mode 100644 index 933e111..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C123x/cmparams.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file TM4C123x/cmparams.h - * @brief ARM Cortex-M4 parameters for the TM4C123x. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 4 - -/** - * @brief Memory Protection unit presence. - */ -#define CORTEX_HAS_MPU 1 - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU 1 - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 3 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 144 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* If the device type is not externally defined, for example from the Makefile, - then a file named board.h is included. This file must contain a device - definition compatible with the include file.*/ -#if !defined(TM4C1230C3PM) && !defined(TM4C1230D5PM) && \ - !defined(TM4C1230E6PM) && !defined(TM4C1230H6PM) && \ - !defined(TM4C1231C3PM) && !defined(TM4C1231D5PM) && \ - !defined(TM4C1231D5PZ) && !defined(TM4C1231E6PM) && \ - !defined(TM4C1231E6PZ) && !defined(TM4C1231H6PGE) && \ - !defined(TM4C1231H6PM) && !defined(TM4C1231H6PZ) && \ - !defined(TM4C1232C3PM) && !defined(TM4C1232D5PM) && \ - !defined(TM4C1232E6PM) && !defined(TM4C1232H6PM) && \ - !defined(TM4C1233C3PM) && !defined(TM4C1233D5PM) && \ - !defined(TM4C1233D5PZ) && !defined(TM4C1233E6PM) && \ - !defined(TM4C1233E6PZ) && !defined(TM4C1233H6PGE) && \ - !defined(TM4C1233H6PM) && !defined(TM4C1233H6PZ) && \ - !defined(TM4C1236D5PM) && !defined(TM4C1236E6PM) && \ - !defined(TM4C1236H6PM) && !defined(TM4C1237D5PM) && \ - !defined(TM4C1237D5PZ) && !defined(TM4C1237E6PM) && \ - !defined(TM4C1237E6PZ) && !defined(TM4C1237H6PGE) && \ - !defined(TM4C1237H6PM) && !defined(TM4C1237H6PZ) && \ - !defined(TM4C123AE6PM) && !defined(TM4C123AH6PM) && \ - !defined(TM4C123BE6PM) && !defined(TM4C123BE6PZ) && \ - !defined(TM4C123BH6PGE) && !defined(TM4C123BH6PM) && \ - !defined(TM4C123BH6PZ) && !defined(TM4C123BH6ZRB) && \ - !defined(TM4C123FE6PM) && !defined(TM4C123FH6PM) && \ - !defined(TM4C123GE6PM) && !defined(TM4C123GE6PZ) && \ - !defined(TM4C123GH6PGE) && !defined(TM4C123GH6PM) && \ - !defined(TM4C123GH6PZ) && !defined(TM4C123GH6ZRB) && \ - !defined(TM4C123GH5ZXR) -#include "board.h" -#endif - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "tm4c123x.h" - -#if !CORTEX_HAS_MPU != !__MPU_PRESENT -#error "CMSIS __MPU_PRESENT mismatch" -#endif - -#if !CORTEX_HAS_FPU != !__FPU_PRESENT -#error "CMSIS __FPU_PRESENT mismatch" -#endif - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** - * @} - */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h b/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h deleted file mode 100644 index 1d2661d..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - Copyright (C) 2014..2016 Marco Veeneman - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file TM4C129x/cmparams.h - * @brief ARM Cortex-M4 parameters for the TM4C129x. - * @{ - */ - -#ifndef _CMPARAMS_H_ -#define _CMPARAMS_H_ - -/** - * @brief Cortex core model. - */ -#define CORTEX_MODEL 4 - -/** - * @brief Memory Protection unit presence. - */ -#define CORTEX_HAS_MPU 1 - -/** - * @brief Floating Point unit presence. - */ -#define CORTEX_HAS_FPU 1 - -/** - * @brief Number of bits in priority masks. - */ -#define CORTEX_PRIORITY_BITS 3 - -/** - * @brief Number of interrupt vectors. - * @note This number does not include the 16 system vectors and must be - * rounded to a multiple of 8. - */ -#define CORTEX_NUM_VECTORS 112 - -/* The following code is not processed when the file is included from an - asm module.*/ -#if !defined(_FROM_ASM_) - -/* If the device type is not externally defined, for example from the Makefile, - then a file named board.h is included. This file must contain a device - definition compatible with the include file.*/ -#if !defined(TM4C1290NCPDT) && !defined(TM4C1290NCZAD) \ - && !defined(TM4C1292NCPDT) && !defined(TM4C1292NCZAD) \ - && !defined(TM4C1294KCPDT) && !defined(TM4C1294NCPDT) \ - && !defined(TM4C1294NCZAD) && !defined(TM4C1297NCZAD) \ - && !defined(TM4C1299KCZAD) && !defined(TM4C1299NCZAD) \ - && !defined(TM4C129CNCPDT) && !defined(TM4C129CNCZAD) \ - && !defined(TM4C129DNCPDT) && !defined(TM4C129DNCZAD) \ - && !defined(TM4C129EKCPDT) && !defined(TM4C129ENCPDT) \ - && !defined(TM4C129ENCZAD) && !defined(TM4C129LNCZAD) \ - && !defined(TM4C129XKCZAD) && !defined(TM4C129XNCZAD) -#include "board.h" -#endif - -/* Including the device CMSIS header. Note, we are not using the definitions - from this header because we need this file to be usable also from - assembler source files. We verify that the info matches instead.*/ -#include "tm4c129x.h" - -#if !CORTEX_HAS_MPU != !__MPU_PRESENT -#error "CMSIS __MPU_PRESENT mismatch" -#endif - -#if !CORTEX_HAS_FPU != !__FPU_PRESENT -#error "CMSIS __FPU_PRESENT mismatch" -#endif - -#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS -#error "CMSIS __NVIC_PRIO_BITS mismatch" -#endif - -#endif /* !defined(_FROM_ASM_) */ - -#endif /* _CMPARAMS_H_ */ - -/** - * @} - */ diff --git a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld b/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld deleted file mode 100644 index b618455..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969.ld +++ /dev/null @@ -1,390 +0,0 @@ -/* This file supports MSP430FR5969 devices. */ -/* Version: 1.0 */ -/* ChibiOS linker script, for normal executables */ - -OUTPUT_ARCH(msp430) -ENTRY(_start) - -MEMORY { - SFR : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */ - PERIPHERAL_8BIT : ORIGIN = 0x0010, LENGTH = 0x00F0 /* END=0x0100, size 240 */ - PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size 256 */ - RAM : ORIGIN = 0x1C00, LENGTH = 0x0800 /* END=0x23FF, size 2048 */ - INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */ - INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */ - INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */ - INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */ - INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */ - FRAM (rxw) : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */ - VECT1 : ORIGIN = 0xFF90, LENGTH = 0x0002 - VECT2 : ORIGIN = 0xFF92, LENGTH = 0x0002 - VECT3 : ORIGIN = 0xFF94, LENGTH = 0x0002 - VECT4 : ORIGIN = 0xFF96, LENGTH = 0x0002 - VECT5 : ORIGIN = 0xFF98, LENGTH = 0x0002 - VECT6 : ORIGIN = 0xFF9A, LENGTH = 0x0002 - VECT7 : ORIGIN = 0xFF9C, LENGTH = 0x0002 - VECT8 : ORIGIN = 0xFF9E, LENGTH = 0x0002 - VECT9 : ORIGIN = 0xFFA0, LENGTH = 0x0002 - VECT10 : ORIGIN = 0xFFA2, LENGTH = 0x0002 - VECT11 : ORIGIN = 0xFFA4, LENGTH = 0x0002 - VECT12 : ORIGIN = 0xFFA6, LENGTH = 0x0002 - VECT13 : ORIGIN = 0xFFA8, LENGTH = 0x0002 - VECT14 : ORIGIN = 0xFFAA, LENGTH = 0x0002 - VECT15 : ORIGIN = 0xFFAC, LENGTH = 0x0002 - VECT16 : ORIGIN = 0xFFAE, LENGTH = 0x0002 - VECT17 : ORIGIN = 0xFFB0, LENGTH = 0x0002 - VECT18 : ORIGIN = 0xFFB2, LENGTH = 0x0002 - VECT19 : ORIGIN = 0xFFB4, LENGTH = 0x0002 - VECT20 : ORIGIN = 0xFFB6, LENGTH = 0x0002 - VECT21 : ORIGIN = 0xFFB8, LENGTH = 0x0002 - VECT22 : ORIGIN = 0xFFBA, LENGTH = 0x0002 - VECT23 : ORIGIN = 0xFFBC, LENGTH = 0x0002 - VECT24 : ORIGIN = 0xFFBE, LENGTH = 0x0002 - VECT25 : ORIGIN = 0xFFC0, LENGTH = 0x0002 - VECT26 : ORIGIN = 0xFFC2, LENGTH = 0x0002 - VECT27 : ORIGIN = 0xFFC4, LENGTH = 0x0002 - VECT28 : ORIGIN = 0xFFC6, LENGTH = 0x0002 - VECT29 : ORIGIN = 0xFFC8, LENGTH = 0x0002 - VECT30 : ORIGIN = 0xFFCA, LENGTH = 0x0002 - VECT31 : ORIGIN = 0xFFCC, LENGTH = 0x0002 - VECT32 : ORIGIN = 0xFFCE, LENGTH = 0x0002 - VECT33 : ORIGIN = 0xFFD0, LENGTH = 0x0002 - VECT34 : ORIGIN = 0xFFD2, LENGTH = 0x0002 - VECT35 : ORIGIN = 0xFFD4, LENGTH = 0x0002 - VECT36 : ORIGIN = 0xFFD6, LENGTH = 0x0002 - VECT37 : ORIGIN = 0xFFD8, LENGTH = 0x0002 - VECT38 : ORIGIN = 0xFFDA, LENGTH = 0x0002 - VECT39 : ORIGIN = 0xFFDC, LENGTH = 0x0002 - VECT40 : ORIGIN = 0xFFDE, LENGTH = 0x0002 - VECT41 : ORIGIN = 0xFFE0, LENGTH = 0x0002 - VECT42 : ORIGIN = 0xFFE2, LENGTH = 0x0002 - VECT43 : ORIGIN = 0xFFE4, LENGTH = 0x0002 - VECT44 : ORIGIN = 0xFFE6, LENGTH = 0x0002 - VECT45 : ORIGIN = 0xFFE8, LENGTH = 0x0002 - VECT46 : ORIGIN = 0xFFEA, LENGTH = 0x0002 - VECT47 : ORIGIN = 0xFFEC, LENGTH = 0x0002 - VECT48 : ORIGIN = 0xFFEE, LENGTH = 0x0002 - VECT49 : ORIGIN = 0xFFF0, LENGTH = 0x0002 - VECT50 : ORIGIN = 0xFFF2, LENGTH = 0x0002 - VECT51 : ORIGIN = 0xFFF4, LENGTH = 0x0002 - VECT52 : ORIGIN = 0xFFF6, LENGTH = 0x0002 - VECT53 : ORIGIN = 0xFFF8, LENGTH = 0x0002 - VECT54 : ORIGIN = 0xFFFA, LENGTH = 0x0002 - VECT55 : ORIGIN = 0xFFFC, LENGTH = 0x0002 - RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 - BSL : ORIGIN = 0x1000, LENGTH = 0x0800 - HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00003FFF -} - -PHDRS { - vectors PT_LOAD ; - stack PT_LOAD ; - rodata PT_LOAD ; - data PT_LOAD ; - text PT_LOAD ; - upper_rodata PT_LOAD ; - upper_data PT_LOAD ; - upper_text PT_LOAD ; -} - -SECTIONS -{ - __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 :vectors =0x3C00 - __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 =0x3C00 - __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3 =0x3C00 - __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4 =0x3C00 - __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 =0x3C00 - __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 =0x3C00 - __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 =0x3C00 - __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 =0x3C00 - __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9 =0x3C00 - __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10 =0x3C00 - __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11 =0x3C00 - __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 =0x3C00 - __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 =0x3C00 - __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 =0x3C00 - __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15 =0x3C00 - __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16 =0x3C00 - __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17 =0x3C00 - __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18 =0x3C00 - __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19 =0x3C00 - __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20 =0x3C00 - __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21 =0x3C00 - __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22 =0x3C00 - __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23 =0x3C00 - __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24 =0x3C00 - __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25 =0x3C00 - __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26 =0x3C00 - __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27 =0x3C00 - __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) } > VECT28 =0x3C00 - __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) } > VECT29 =0x3C00 - __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) } > VECT30 =0x3C00 - __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_aes256)) } > VECT31 =0x3C00 - __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_rtc)) } > VECT32 =0x3C00 - __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port4)) } > VECT33 =0x3C00 - __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_port3)) } > VECT34 =0x3C00 - __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT35 =0x3C00 - __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT36 =0x3C00 - __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_port2)) } > VECT37 =0x3C00 - __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38 =0x3C00 - __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39 =0x3C00 - __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_port1)) } > VECT40 =0x3C00 - __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT41 =0x3C00 - __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT42 =0x3C00 - __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_dma)) } > VECT43 =0x3C00 - __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT44 =0x3C00 - __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT45 =0x3C00 - __interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT46 =0x3C00 - __interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_adc12)) } > VECT47 =0x3C00 - __interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT48 =0x3C00 - __interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT49 =0x3C00 - __interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_wdt)) } > VECT50 =0x3C00 - __interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT51 =0x3C00 - __interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT52 =0x3C00 - __interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_comp_e)) } > VECT53 =0x3C00 - __interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_unmi)) } > VECT54 =0x3C00 - __interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT55 =0x3C00 - __reset_vector : - { - KEEP (*(__interrupt_vector_56)) - KEEP (*(__interrupt_vector_reset)) - KEEP (*(.resetvec)) - } > RESETVEC - - .stack : - { - __main_thread_stack_base__ = .; - *(.stack) - . += __idle_stack_size__; - PROVIDE (__stack = .); - . = ALIGN(2); - __main_thread_stack_end__ = .; - } > FRAM :stack - - .rodata : - { - . = ALIGN(2); - *(.plt) - *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) - *(.rodata1) - *(.lower.rodata.* .lower.rodata) - - *(.eh_frame_hdr) - KEEP (*(.eh_frame)) - KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) - PROVIDE (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE (__preinit_array_end = .); - PROVIDE (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE (__init_array_end = .); - PROVIDE (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE (__fini_array_end = .); - LONG(0); /* Sentinel. */ - - /* gcc uses crtbegin.o to find the start of the constructors, so - we make sure it is first. Because this is a wildcard, it - doesn't matter if the user does not actually link against - crtbegin.o; the linker won't look for a file to match a - wildcard. The wildcard also means that it doesn't matter which - directory crtbegin.o is in. */ - KEEP (*crtbegin*.o(.ctors)) - - /* We don't want to include the .ctor section from from the - crtend.o file until after the sorted ctors. The .ctor section - from the crtend file contains the end of ctors marker and it - must be last */ - KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - - KEEP (*crtbegin*.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } > FRAM :rodata - - .data : - { - . = ALIGN(2); - PROVIDE (__datastart = .); - - KEEP (*(.jcr)) - *(.data.rel.ro.local) *(.data.rel.ro*) - *(.dynamic) - - *(.data .data.* .gnu.linkonce.d.*) - KEEP (*(.gnu.linkonce.d.*personality*)) - SORT(CONSTRUCTORS) - *(.data1) - *(.got.plt) *(.got) - - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - . = ALIGN(2); - *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) - - . = ALIGN(2); - *(.lower.data.* .lower.data) - . = ALIGN(2); - - _edata = .; - PROVIDE (edata = .); - PROVIDE (__dataend = .); - } > FRAM :data - - /* Note that crt0 assumes this is a multiple of two; all the - start/stop symbols are also assumed word-aligned. */ - PROVIDE(__romdatastart = LOADADDR(.data)); - PROVIDE (__romdatacopysize = SIZEOF(.data)); - - .bss : - { - . = ALIGN(2); - PROVIDE (__bssstart = .); - *(.dynbss) - *(.sbss .sbss.*) - *(.bss .bss.* .gnu.linkonce.b.*) - *(.lower.bss.* .lower.bss) - . = ALIGN(2); - *(COMMON) - PROVIDE (__bssend = .); - } > FRAM - PROVIDE (__bsssize = SIZEOF(.bss)); - - /* This section contains data that is not initialised at startup. */ - .noinit (NOLOAD) : - { - . = ALIGN(2); - PROVIDE (__noinit_start = .); - *(.noinit) - . = ALIGN(2); - PROVIDE (__noinit_end = .); - } > FRAM /* Because I think this has to go right above .bss */ - - _end = .; - PROVIDE (end = .); - - .text : - { - PROVIDE (_start = .); - - . = ALIGN(2); - KEEP (*(SORT(.crt_*))) - - . = ALIGN(2); - KEEP (*(.lowtext)) - - . = ALIGN(2); - *(.lower.text.* .lower.text) - - . = ALIGN(2); - *(.text .stub .text.* .gnu.linkonce.t.* .text:*) - - KEEP (*(.text.*personality*)) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.interp .hash .dynsym .dynstr .gnu.version*) - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - . = ALIGN(2); - KEEP (*(.init)) - KEEP (*(.fini)) - KEEP (*(.tm_clone_table)) - } > FRAM :text - - .upper.rodata : - { - *(.upper.rodata.* .upper.rodata) - } > HIFRAM :upper_rodata - - .upper.data : - { - __upper_data_init = LOADADDR (.upper.data); - /* Status word. */ - SHORT(1); - __high_datastart = .; - *(.upper.data.* .upper.data) - __high_dataend = .; - } > HIFRAM :upper_data - - __rom_highdatacopysize = SIZEOF(.upper.data) - 2; - __rom_highdatastart = LOADADDR(.upper.data) + 2; - - .upper.bss : - { - . = ALIGN(2); - __high_bssstart = .; - *(.upper.bss.* .upper.bss) - . = ALIGN(2); - __high_bssend = .; - } > HIFRAM - - .upper.text : - { - . = ALIGN(2); - *(.upper.text.* .upper.text) - } > HIFRAM :upper_text - - .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ - .infoB : {} > INFOB - .infoC : {} > INFOC - .infoD : {} > INFOD - - /* The rest are all not normally part of the runtime image. */ - - .MP430.attributes 0 : - { - KEEP (*(.MSP430.attributes)) - KEEP (*(.gnu.attributes)) - KEEP (*(__TI_build_attributes)) - } - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1. */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions. */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2. */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2. */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions. */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* DWARF 3 */ - .debug_pubtypes 0 : { *(.debug_pubtypes) } - .debug_ranges 0 : { *(.debug_ranges) } - /* DWARF Extension. */ - .debug_macro 0 : { *(.debug_macro) } - - /DISCARD/ : { *(.note.GNU-stack) } -} - -INCLUDE msp430fr5969_symbols.ld diff --git a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld b/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld deleted file mode 100644 index b3cd9ce..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr6989.ld +++ /dev/null @@ -1,437 +0,0 @@ -/* This file supports MSP430FR6989 devices. */ -/* Version: 1.188 */ -/* ChibiOS linker script, for normal executables */ - -OUTPUT_ARCH(msp430) -ENTRY(_start) - -MEMORY { - TINYRAM : ORIGIN = 0x0006, LENGTH = 0x001A - BSL : ORIGIN = 0x1000, LENGTH = 0x0800 - RAM : ORIGIN = 0x1C00, LENGTH = 0x0800 /* END=0x23FF, size 2048 */ - INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */ - INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */ - INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */ - INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */ - INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */ - FRAM (rxw) : ORIGIN = 0x4400, LENGTH = 0xBB80 /* END=0xFF7F, size 48000 */ - HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00013FFF - VECT1 : ORIGIN = 0xFF90, LENGTH = 0x0002 - VECT2 : ORIGIN = 0xFF92, LENGTH = 0x0002 - VECT3 : ORIGIN = 0xFF94, LENGTH = 0x0002 - VECT4 : ORIGIN = 0xFF96, LENGTH = 0x0002 - VECT5 : ORIGIN = 0xFF98, LENGTH = 0x0002 - VECT6 : ORIGIN = 0xFF9A, LENGTH = 0x0002 - VECT7 : ORIGIN = 0xFF9C, LENGTH = 0x0002 - VECT8 : ORIGIN = 0xFF9E, LENGTH = 0x0002 - VECT9 : ORIGIN = 0xFFA0, LENGTH = 0x0002 - VECT10 : ORIGIN = 0xFFA2, LENGTH = 0x0002 - VECT11 : ORIGIN = 0xFFA4, LENGTH = 0x0002 - VECT12 : ORIGIN = 0xFFA6, LENGTH = 0x0002 - VECT13 : ORIGIN = 0xFFA8, LENGTH = 0x0002 - VECT14 : ORIGIN = 0xFFAA, LENGTH = 0x0002 - VECT15 : ORIGIN = 0xFFAC, LENGTH = 0x0002 - VECT16 : ORIGIN = 0xFFAE, LENGTH = 0x0002 - VECT17 : ORIGIN = 0xFFB0, LENGTH = 0x0002 - VECT18 : ORIGIN = 0xFFB2, LENGTH = 0x0002 - VECT19 : ORIGIN = 0xFFB4, LENGTH = 0x0002 - VECT20 : ORIGIN = 0xFFB6, LENGTH = 0x0002 - VECT21 : ORIGIN = 0xFFB8, LENGTH = 0x0002 - VECT22 : ORIGIN = 0xFFBA, LENGTH = 0x0002 - VECT23 : ORIGIN = 0xFFBC, LENGTH = 0x0002 - VECT24 : ORIGIN = 0xFFBE, LENGTH = 0x0002 - VECT25 : ORIGIN = 0xFFC0, LENGTH = 0x0002 - VECT26 : ORIGIN = 0xFFC2, LENGTH = 0x0002 - VECT27 : ORIGIN = 0xFFC4, LENGTH = 0x0002 - VECT28 : ORIGIN = 0xFFC6, LENGTH = 0x0002 - VECT29 : ORIGIN = 0xFFC8, LENGTH = 0x0002 - VECT30 : ORIGIN = 0xFFCA, LENGTH = 0x0002 - VECT31 : ORIGIN = 0xFFCC, LENGTH = 0x0002 - VECT32 : ORIGIN = 0xFFCE, LENGTH = 0x0002 - VECT33 : ORIGIN = 0xFFD0, LENGTH = 0x0002 - VECT34 : ORIGIN = 0xFFD2, LENGTH = 0x0002 - VECT35 : ORIGIN = 0xFFD4, LENGTH = 0x0002 - VECT36 : ORIGIN = 0xFFD6, LENGTH = 0x0002 - VECT37 : ORIGIN = 0xFFD8, LENGTH = 0x0002 - VECT38 : ORIGIN = 0xFFDA, LENGTH = 0x0002 - VECT39 : ORIGIN = 0xFFDC, LENGTH = 0x0002 - VECT40 : ORIGIN = 0xFFDE, LENGTH = 0x0002 - VECT41 : ORIGIN = 0xFFE0, LENGTH = 0x0002 - VECT42 : ORIGIN = 0xFFE2, LENGTH = 0x0002 - VECT43 : ORIGIN = 0xFFE4, LENGTH = 0x0002 - VECT44 : ORIGIN = 0xFFE6, LENGTH = 0x0002 - VECT45 : ORIGIN = 0xFFE8, LENGTH = 0x0002 - VECT46 : ORIGIN = 0xFFEA, LENGTH = 0x0002 - VECT47 : ORIGIN = 0xFFEC, LENGTH = 0x0002 - VECT48 : ORIGIN = 0xFFEE, LENGTH = 0x0002 - VECT49 : ORIGIN = 0xFFF0, LENGTH = 0x0002 - VECT50 : ORIGIN = 0xFFF2, LENGTH = 0x0002 - VECT51 : ORIGIN = 0xFFF4, LENGTH = 0x0002 - VECT52 : ORIGIN = 0xFFF6, LENGTH = 0x0002 - VECT53 : ORIGIN = 0xFFF8, LENGTH = 0x0002 - VECT54 : ORIGIN = 0xFFFA, LENGTH = 0x0002 - VECT55 : ORIGIN = 0xFFFC, LENGTH = 0x0002 - RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002 -} - -PHDRS { - vectors PT_LOAD ; - stack PT_LOAD ; - rodata PT_LOAD ; - data PT_LOAD ; - text PT_LOAD ; - upper_rodata PT_LOAD ; - upper_data PT_LOAD ; - upper_text PT_LOAD ; -} - -SECTIONS -{ - __interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1 :vectors - __interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2 - __interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3 - __interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4 - __interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5 - __interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6 - __interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7 - __interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8 - __interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9 - __interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10 - __interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11 - __interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12 - __interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13 - __interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14 - __interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15 - __interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16 - __interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17 - __interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18 - __interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19 - __interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) } > VECT20 - __interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) } > VECT21 - __interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) } > VECT22 - __interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) } > VECT23 - __interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) } > VECT24 - __interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) } > VECT25 - __interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) } > VECT26 - __interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) } > VECT27 - __interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_aes256)) } > VECT28 - __interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_rtc)) } > VECT29 - __interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_lcd_c)) } > VECT30 - __interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_port4)) } > VECT31 - __interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_port3)) } > VECT32 - __interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT33 - __interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT34 - __interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_port2)) } > VECT35 - __interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT36 - __interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT37 - __interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_port1)) } > VECT38 - __interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT39 - __interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT40 - __interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_dma)) } > VECT41 - __interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_usci_b1)) } > VECT42 - __interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_usci_a1)) } > VECT43 - __interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT44 - __interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT45 - __interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_adc12)) } > VECT46 - __interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_usci_b0)) } > VECT47 - __interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_usci_a0)) } > VECT48 - __interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_escan_if)) } > VECT49 - __interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_wdt)) } > VECT50 - __interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT51 - __interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT52 - __interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_comp_e)) } > VECT53 - __interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_unmi)) } > VECT54 - __interrupt_vector_55 : { KEEP (*(__interrupt_vector_55)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT55 - __reset_vector : - { - KEEP (*(__interrupt_vector_56)) - KEEP (*(__interrupt_vector_reset)) - KEEP (*(.resetvec)) - } > RESETVEC - - .stack : - { - __main_thread_stack_base__ = .; - *(.stack) - . += __idle_stack_size__; - PROVIDE (__stack = .); - . = ALIGN(2); - __main_thread_stack_end__ = .; - } > FRAM :stack - - .rodata : - { - . = ALIGN(2); - *(.plt) - *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*) - *(.rodata1) - *(.lower.rodata.* .lower.rodata) - KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) - PROVIDE (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE (__preinit_array_end = .); - PROVIDE (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE (__init_array_end = .); - PROVIDE (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE (__fini_array_end = .); - } > FRAM :rodata - - /* Note: This is a separate .rodata section for sections which are - read only but which older linkers treat as read-write. - This prevents older linkers from marking the entire .rodata - section as read-write. */ - .rodata2 : - { - . = ALIGN(2); - *(.eh_frame_hdr) - KEEP (*(.eh_frame)) - - /* gcc uses crtbegin.o to find the start of the constructors, so - we make sure it is first. Because this is a wildcard, it - doesn't matter if the user does not actually link against - crtbegin.o; the linker won't look for a file to match a - wildcard. The wildcard also means that it doesn't matter which - directory crtbegin.o is in. */ - KEEP (*crtbegin*.o(.ctors)) - - /* We don't want to include the .ctor section from from the - crtend.o file until after the sorted ctors. The .ctor section - from the crtend file contains the end of ctors marker and it - must be last */ - KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - - KEEP (*crtbegin*.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } > FRAM - - .data : - { - . = ALIGN(2); - PROVIDE (__datastart = .); - - KEEP (*(.jcr)) - *(.data.rel.ro.local) *(.data.rel.ro*) - *(.dynamic) - - *(.data .data.* .gnu.linkonce.d.*) - KEEP (*(.gnu.linkonce.d.*personality*)) - SORT(CONSTRUCTORS) - *(.data1) - *(.got.plt) *(.got) - - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - . = ALIGN(2); - *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1) - - . = ALIGN(2); - *(.lower.data.* .lower.data) - . = ALIGN(2); - - _edata = .; - PROVIDE (edata = .); - PROVIDE (__dataend = .); - } > FRAM :data - - /* Note that crt0 assumes this is a multiple of two; all the - start/stop symbols are also assumed word-aligned. */ - PROVIDE(__romdatastart = LOADADDR(.data)); - PROVIDE (__romdatacopysize = SIZEOF(.data)); - - .bss : - { - . = ALIGN(2); - PROVIDE (__bssstart = .); - *(.dynbss) - *(.sbss .sbss.*) - *(.bss .bss.* .gnu.linkonce.b.*) - *(.lower.bss.* .lower.bss) - . = ALIGN(2); - *(COMMON) - PROVIDE (__bssend = .); - } > FRAM - PROVIDE (__bsssize = SIZEOF(.bss)); - - /* This section contains data that is not initialised during load - or application reset. */ - .noinit (NOLOAD) : - { - . = ALIGN(2); - PROVIDE (__noinit_start = .); - *(.noinit) - . = ALIGN(2); - PROVIDE (__noinit_end = .); - } > FRAM :text - - _end = .; - PROVIDE (end = .); - - .text : - { - PROVIDE (_start = .); - - . = ALIGN(2); - KEEP (*(SORT(.crt_*))) - - . = ALIGN(2); - KEEP (*(.lowtext)) - - . = ALIGN(2); - *(.lower.text.* .lower.text) - - . = ALIGN(2); - *(.text .stub .text.* .gnu.linkonce.t.* .text:*) - - KEEP (*(.text.*personality*)) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.interp .hash .dynsym .dynstr .gnu.version*) - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - . = ALIGN(2); - KEEP (*(.init)) - KEEP (*(.fini)) - KEEP (*(.tm_clone_table)) - } > FRAM - - .upper.rodata : - { - *(.upper.rodata.* .upper.rodata) - } > HIFRAM :upper_rodata - - /* This section contains data that is initialised during load - but not on application reset. */ - .persistent : - { - . = ALIGN(2); - PROVIDE (__persistent_start = .); - *(.persistent) - . = ALIGN(2); - PROVIDE (__persistent_end = .); - } > HIFRAM :upper_data - - .upper.data : - { - __upper_data_init = LOADADDR (.upper.data); - /* Status word. */ - SHORT(1); - __high_datastart = .; - *(.upper.data.* .upper.data) - __high_dataend = .; - } > HIFRAM - - __rom_highdatacopysize = SIZEOF(.upper.data) - 2; - __rom_highdatastart = LOADADDR(.upper.data) + 2; - - .upper.bss : - { - . = ALIGN(2); - __high_bssstart = .; - *(.upper.bss.* .upper.bss) - . = ALIGN(2); - __high_bssend = .; - __high_bsssize = SIZEOF(.upper.bss); - } > HIFRAM - - .upper.text : - { - . = ALIGN(2); - *(.upper.text.* .upper.text) - } > HIFRAM :upper_text - - /* We create this section so that "end" will always be in the - RAM region (matching .stack below), even if the .bss - section is empty. */ - .heap (NOLOAD) : - { - . = ALIGN(2); - __heap_start__ = .; - _end = __heap_start__; - PROVIDE (end = .); - KEEP (*(.heap)) - _end = .; - PROVIDE (end = .); - /* This word is here so that the section is not empty, and thus - not discarded by the linker. The actual value does not matter - and is ignored. */ - LONG(0); - __heap_end__ = .; - __HeapLimit = __heap_end__; - } > RAM - /* WARNING: Do not place anything in RAM here. - The heap section must be the last section in RAM and the stack - section must be placed at the very end of the RAM region. */ - - .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ - .infoB : {} > INFOB - .infoC : {} > INFOC - .infoD : {} > INFOD - - /* The rest are all not normally part of the runtime image. */ - - .MP430.attributes 0 : - { - KEEP (*(.MSP430.attributes)) - KEEP (*(.gnu.attributes)) - KEEP (*(__TI_build_attributes)) - } - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1. */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions. */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2. */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2. */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions. */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* DWARF 3 */ - .debug_pubtypes 0 : { *(.debug_pubtypes) } - .debug_ranges 0 : { *(.debug_ranges) } - /* DWARF Extension. */ - .debug_macro 0 : { *(.debug_macro) } - - /DISCARD/ : { *(.note.GNU-stack) } -} - - -/****************************************************************************/ -/* Include peripherals memory map */ -/****************************************************************************/ - -INCLUDE msp430fr6989_symbols.ld - diff --git a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk b/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk deleted file mode 100644 index 9c063cd..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/mk/startup_msp430fr5xxx.mk +++ /dev/null @@ -1,10 +0,0 @@ -# List of the ChibiOS generic MSP430X startup and linker files. -STARTUPSRC = -#$(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/vectors.c - -STARTUPASM = - -STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC - -STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/MSP430X/compilers/GCC/ld - diff --git a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/rules.mk b/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/rules.mk deleted file mode 100644 index a431b96..0000000 --- a/ChibiOS_16.1.5/community/os/common/startup/MSP430X/compilers/GCC/rules.mk +++ /dev/null @@ -1,269 +0,0 @@ -# ARM Cortex-Mx common makefile scripts and rules. - -############################################################################## -# Processing options coming from the upper Makefile. -# - -# Compiler options -OPT = $(USE_OPT) -COPT = $(USE_COPT) -CPPOPT = $(USE_CPPOPT) - -# Garbage collection -ifeq ($(USE_LINK_GC),yes) - OPT += -ffunction-sections -fdata-sections -fno-common - LDOPT := ,--gc-sections -else - LDOPT := -endif - -# Linker extra options -ifneq ($(USE_LDOPT),) - LDOPT := $(LDOPT),$(USE_LDOPT) -endif - -# Link time optimizations -ifeq ($(USE_LTO),yes) - OPT += -flto -endif - -# HWMULT-related options -ifeq ($(USE_HWMULT),) - USE_HWMULT = none -endif -ifneq ($(USE_HWMULT),none) - OPT += -mhwmult=$(USE_HWMULT) -endif - -# Idle thread stack size -ifeq ($(USE_IDLE_STACKSIZE),) - LDOPT := $(LDOPT),--defsym=__idle_stack_size__=0x40 -else - LDOPT := $(LDOPT),--defsym=__idle_stack_size__=$(USE_IDLE_STACKSIZE) -endif - -# Output directory and files -ifeq ($(BUILDDIR),) - BUILDDIR = build -endif -ifeq ($(BUILDDIR),.) - BUILDDIR = build -endif -OUTFILES = $(BUILDDIR)/$(PROJECT).elf \ - $(BUILDDIR)/$(PROJECT).hex \ - $(BUILDDIR)/$(PROJECT).bin \ - $(BUILDDIR)/$(PROJECT).dmp \ - $(BUILDDIR)/$(PROJECT).list - -ifdef SREC - OUTFILES += $(BUILDDIR)/$(PROJECT).srec -endif - -# Source files groups and paths -ACSRC = $(CSRC) -ACPPSRC = $(CPPSRC) -ASRC = $(CSRC)$(CPPSRC) -SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC))) - -# Various directories -OBJDIR = $(BUILDDIR)/obj -LSTDIR = $(BUILDDIR)/lst - -# Object files groups -ACOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACSRC:.c=.o))) -ACPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ACPPSRC:.cpp=.o))) -ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) -ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o))) -OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) - -# Paths -IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR)) -LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) - -# Macros -DEFS = $(DDEFS) $(UDEFS) -ADEFS = $(DADEFS) $(UADEFS) - -# Libs -LIBS = $(DLIBS) $(ULIBS) - -# Various settings -MCFLAGS = -mmcu=$(MCU) $(MOPT) -ODFLAGS = -x --syms -ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS) -ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS) -CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS) -CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS) -LDFLAGS = $(MCFLAGS) $(OPT) -minrt $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,--script=$(LDSCRIPT)$(LDOPT) - -# Temporary specfile to deal with messed-up msp430-elf default spec file -SPECFILE := $(shell mktemp -u) - -# Generate dependency information -ASFLAGS += -MD -MP -MF .dep/$(@F).d -CFLAGS += -MD -MP -MF .dep/$(@F).d -CPPFLAGS += -MD -MP -MF .dep/$(@F).d - -# Paths where to search for sources -VPATH = $(SRCPATHS) - -# -# Makefile rules -# - -all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK - -PRE_MAKE_ALL_RULE_HOOK: - -POST_MAKE_ALL_RULE_HOOK: - -$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR) - -$(BUILDDIR): -ifneq ($(USE_VERBOSE_COMPILE),yes) - @echo Compiler Options - @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o - @echo -endif - @mkdir -p $(BUILDDIR) - -$(OBJDIR): - @mkdir -p $(OBJDIR) - -$(LSTDIR): - @mkdir -p $(LSTDIR) - -$(ACPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile -ifeq ($(USE_VERBOSE_COMPILE),yes) - @echo - $(CPPC) -c $(CPPFLAGS) $(AOPT) -I. $(IINCDIR) $< -o $@ -else - @echo Compiling $( $(SPECFILE) - sed -i 's/%{!T.*}//' $(SPECFILE) - -$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT) $(SPECFILE) -ifeq ($(USE_VERBOSE_COMPILE),yes) - @echo - $(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@ -else - @echo Linking $@ - @$(LD) $(LDFLAGS) -specs=$(SPECFILE) $(OBJS) $(LIBS) -o $@ -endif - -%.hex: %.elf -ifeq ($(USE_VERBOSE_COMPILE),yes) - $(HEX) $< $@ -else - @echo Creating $@ - @$(HEX) $< $@ -endif - -%.bin: %.elf -ifeq ($(USE_VERBOSE_COMPILE),yes) - $(BIN) $< $@ -else - @echo Creating $@ - @$(BIN) $< $@ -endif - -%.srec: %.elf -ifdef SREC - ifeq ($(USE_VERBOSE_COMPILE),yes) - $(SREC) $< $@ - else - @echo Creating $@ - @$(SREC) $< $@ - endif -endif - -%.dmp: %.elf -ifeq ($(USE_VERBOSE_COMPILE),yes) - $(OD) $(ODFLAGS) $< > $@ - $(SZ) $< -else - @echo Creating $@ - @$(OD) $(ODFLAGS) $< > $@ - @echo - @$(SZ) $< -endif - -%.list: %.elf -ifeq ($(USE_VERBOSE_COMPILE),yes) - $(OD) -S $< > $@ -else - @echo Creating $@ - @$(OD) -S $< > $@ - @echo - @echo Done -endif - -lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a - -$(BUILDDIR)/lib$(PROJECT).a: $(OBJS) - @$(AR) -r $@ $^ - @echo - @echo Done - -clean: - @echo Cleaning - -rm -fR .dep $(BUILDDIR) - @echo - @echo Done - -# -# Include the dependency files, should be the last of the makefile -# --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) - -# *** EOF *** -- cgit v1.2.3