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-rw-r--r--firmware/STM32F10x.ld100
1 files changed, 100 insertions, 0 deletions
diff --git a/firmware/STM32F10x.ld b/firmware/STM32F10x.ld
new file mode 100644
index 0000000..e6caa0d
--- /dev/null
+++ b/firmware/STM32F10x.ld
@@ -0,0 +1,100 @@
+/* Memory space definitions */
+MEMORY {
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
+ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K
+}
+
+/* Higher address of the user mode stack */
+EXTERN ( _estack );
+PROVIDE ( _estack = ORIGIN(RAM) + LENGTH(RAM) );
+
+/* This sends all unreferenced IRQHandlers to reset. */
+PROVIDE ( ISR_SWI = 0 );
+PROVIDE ( ISR_IRQ = 0 );
+PROVIDE ( ISR_Prefetch = 0 );
+PROVIDE ( ISR_Abort = 0 );
+PROVIDE ( ISR_FIQ = 0 );
+
+PROVIDE ( ISR_NMI = 0 );
+PROVIDE ( ISR_HardFault = 0 );
+PROVIDE ( ISR_MemManage = 0 );
+PROVIDE ( ISR_BusFault = 0 );
+PROVIDE ( ISR_UsageFault = 0 );
+
+PROVIDE ( ISR_SVC = 0 );
+PROVIDE ( ISR_DebugMon = 0 );
+PROVIDE ( ISR_PendSV = 0 );
+PROVIDE ( ISR_SysTick = 0 );
+
+PROVIDE ( ISR_WWDG = 0 );
+PROVIDE ( ISR_PVD = 0 );
+PROVIDE ( ISR_TAMPER = 0 );
+PROVIDE ( ISR_RTC = 0 );
+PROVIDE ( ISR_FLASH = 0 );
+PROVIDE ( ISR_RCC = 0 );
+PROVIDE ( ISR_EXTI0 = 0 );
+PROVIDE ( ISR_EXTI1 = 0 );
+PROVIDE ( ISR_EXTI2 = 0 );
+PROVIDE ( ISR_EXTI3 = 0 );
+PROVIDE ( ISR_EXTI4 = 0 );
+PROVIDE ( ISR_DMAChannel1 = 0 );
+PROVIDE ( ISR_DMAChannel2 = 0 );
+PROVIDE ( ISR_DMAChannel3 = 0 );
+PROVIDE ( ISR_DMAChannel4 = 0 );
+PROVIDE ( ISR_DMAChannel5 = 0 );
+PROVIDE ( ISR_DMAChannel6 = 0 );
+PROVIDE ( ISR_DMAChannel7 = 0 );
+PROVIDE ( ISR_DMA1_Channel1 = 0 );
+PROVIDE ( ISR_DMA1_Channel2 = 0 );
+PROVIDE ( ISR_DMA1_Channel3 = 0 );
+PROVIDE ( ISR_DMA1_Channel4 = 0 );
+PROVIDE ( ISR_DMA1_Channel5 = 0 );
+PROVIDE ( ISR_DMA1_Channel6 = 0 );
+PROVIDE ( ISR_DMA1_Channel7 = 0 );
+PROVIDE ( ISR_ADC = 0 );
+PROVIDE ( ISR_ADC1_2 = 0 );
+PROVIDE ( ISR_USB_HP_CAN_TX = 0 );
+PROVIDE ( ISR_USB_HP_CAN1_TX = 0 );
+PROVIDE ( ISR_USB_LP_CAN_RX0 = 0 );
+PROVIDE ( ISR_USB_LP_CAN1_RX0 = 0 );
+PROVIDE ( ISR_CAN_RX1 = 0 );
+PROVIDE ( ISR_CAN1_RX1 = 0 );
+PROVIDE ( ISR_CAN_SCE = 0 );
+PROVIDE ( ISR_CAN1_SCE = 0 );
+PROVIDE ( ISR_EXTI9_5 = 0 );
+PROVIDE ( ISR_TIM1_BRK = 0 );
+PROVIDE ( ISR_TIM1_UP = 0 );
+PROVIDE ( ISR_TIM1_TRG_COM = 0 );
+PROVIDE ( ISR_TIM1_CC = 0 );
+PROVIDE ( ISR_TIM2 = 0 );
+PROVIDE ( ISR_TIM3 = 0 );
+PROVIDE ( ISR_TIM4 = 0 );
+PROVIDE ( ISR_I2C1_EV = 0 );
+PROVIDE ( ISR_I2C1_ER = 0 );
+PROVIDE ( ISR_I2C2_EV = 0 );
+PROVIDE ( ISR_I2C2_ER = 0 );
+PROVIDE ( ISR_SPI1 = 0 );
+PROVIDE ( ISR_SPI2 = 0 );
+PROVIDE ( ISR_USART1 = 0 );
+PROVIDE ( ISR_USART2 = 0 );
+PROVIDE ( ISR_USART3 = 0 );
+PROVIDE ( ISR_EXTI15_10 = 0 );
+PROVIDE ( ISR_RTCAlarm = 0 );
+PROVIDE ( ISR_USBWakeUp = 0 );
+PROVIDE ( ISR_TIM8_BRK = 0 );
+PROVIDE ( ISR_TIM8_UP = 0 );
+PROVIDE ( ISR_TIM8_TRG_COM = 0 );
+PROVIDE ( ISR_TIM8_CC = 0 );
+PROVIDE ( ISR_ADC3 = 0 );
+PROVIDE ( ISR_FSMC = 0 );
+PROVIDE ( ISR_SDIO = 0 );
+PROVIDE ( ISR_TIM5 = 0 );
+PROVIDE ( ISR_SPI3 = 0 );
+PROVIDE ( ISR_UART4 = 0 );
+PROVIDE ( ISR_UART5 = 0 );
+PROVIDE ( ISR_TIM6 = 0 );
+PROVIDE ( ISR_TIM7 = 0 );
+PROVIDE ( ISR_DMA2_Channel1 = 0 );
+PROVIDE ( ISR_DMA2_Channel2 = 0 );
+PROVIDE ( ISR_DMA2_Channel3 = 0 );
+PROVIDE ( ISR_DMA2_Channel4_5 = 0 );