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/**
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* Alee Forth: A portable and concise Forth implementation in modern C++.
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* Copyright (C) 2023 Clyne Sullivan <clyne@bitgloo.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "alee.hpp"
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#include "libalee/ctype.hpp"
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#include "lzss.h"
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static const
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#include "msp430fr2476_all.h"
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#include <cstring>
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#include <msp430.h>
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#include "splitmemdictrw.hpp"
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static char strbuf[80];
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static void readchar(State& state);
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static void serput(int c);
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static void serputs(const char *s);
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static void printint(DoubleCell n, char *buf, int base);
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static Error findword(State&, Word);
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static void initGPIO();
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static void initClock();
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static void initUART();
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static void Software_Trim();
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#define MCLK_FREQ_MHZ (8) // MCLK = 8MHz
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#define ALEE_RODICTSIZE (7000)
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__attribute__((section(".lodict")))
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#include "core.fth.h"
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static bool exitLpm;
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static Addr isr_list[24] = {};
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static SplitMemDictRW<ALEE_RODICTSIZE, 32767> dict (alee_dat, 0x10000);
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int main()
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{
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WDTCTL = WDTPW | WDTHOLD;
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initGPIO();
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initClock();
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initUART();
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SYSCFG0 = FRWPPW;
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(void)alee_dat_len;
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State state (dict, readchar);
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Parser::customParse = findword;
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serputs("alee forth\n\r");
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auto ptr = strbuf;
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while (1) {
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if (UCA0IFG & UCRXIFG) {
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auto c = static_cast<char>(UCA0RXBUF);
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serput(c);
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if (c == '\r') {
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*ptr = '\0';
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serputs("\n\r");
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if (auto r = Parser::parse(state, strbuf); r == Error::none) {
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serputs(state.compiling() ? " compiled" : " ok");
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} else {
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switch (r) {
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case Error::noword:
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serputs("unknown word...");
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break;
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default:
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serputs("error...");
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break;
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}
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}
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serputs("\n\r");
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ptr = strbuf;
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} else if (c == '\b') {
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if (ptr > strbuf)
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--ptr;
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} else if (ptr < strbuf + sizeof(strbuf)) {
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if (c >= 'A' && c <= 'Z')
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c += 32;
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*ptr++ = c;
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}
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}
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}
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}
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void readchar(State& state)
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{
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auto idx = state.dict.read(Dictionary::Input);
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Addr addr = Dictionary::Input + sizeof(Cell) + idx;
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while (!(UCA0IFG & UCRXIFG));
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auto c = static_cast<uint8_t>(UCA0RXBUF);
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if (isupper(c))
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c += 32;
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state.dict.writebyte(addr, c ? c : ' ');
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}
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void serput(int c)
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{
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while (!(UCA0IFG & UCTXIFG));
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UCA0TXBUF = static_cast<char>(c);
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}
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void serputs(const char *s)
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{
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while (*s)
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serput(*s++);
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}
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void printint(DoubleCell n, char *buf, int base)
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{
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static const char digit[] = "0123456789ABCDEF";
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char *ptr = buf;
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bool neg = n < 0;
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if (neg)
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n = -n;
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do {
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*ptr++ = digit[n % base];
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} while ((n /= base));
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if (neg)
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serput('-');
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do {
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serput(*--ptr);
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} while (ptr > buf);
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serput(' ');
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}
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void user_sys(State& state)
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{
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switch (state.pop()) {
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case 0: // .
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printint(state.pop(), strbuf, state.dict.read(Dictionary::Base));
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break;
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case 1: // unused
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state.push(static_cast<Addr>(state.dict.capacity() - state.dict.here()));
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break;
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case 2: // emit
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serput(state.pop());
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break;
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case 10:
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{ auto index = state.pop() - 20;
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isr_list[index] = state.pop(); }
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break;
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case 11:
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{ auto addr = state.pop();
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*reinterpret_cast<uint8_t *>(addr) = state.pop() & 0xFFu; }
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break;
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case 12:
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state.push(*reinterpret_cast<uint8_t *>(state.pop()));
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break;
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case 13:
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{ auto addr = state.pop();
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*reinterpret_cast<uint16_t *>(addr) = state.pop() & 0xFFFFu; }
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break;
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case 14:
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state.push(*reinterpret_cast<uint16_t *>(state.pop()));
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break;
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case 15:
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_bis_SR_register(state.pop());
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break;
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case 16:
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_bic_SR_register(state.pop());
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break;
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case 17:
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exitLpm |= true;
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break;
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default:
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break;
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}
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}
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#define LZSS_MAGIC_SEPARATOR (0xFB)
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static char lzword[32];
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static int lzwlen;
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static char lzbuf[32];
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static char *lzptr;
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Error findword(State& state, Word word)
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{
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char *ptr = lzword;
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for (auto it = word.begin(&state.dict); it != word.end(&state.dict); ++it) {
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*ptr = *it;
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if (islower(*ptr))
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*ptr -= 32;
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++ptr;
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}
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lzwlen = (int)(ptr - lzword);
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lzptr = lzbuf;
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lzssinit(msp430fr2476_all_lzss, msp430fr2476_all_lzss_len);
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auto ret = decode([](int c) {
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if (c != LZSS_MAGIC_SEPARATOR) {
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*lzptr++ = (char)c;
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} else {
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if (lzwlen == lzptr - lzbuf - 2 && strncmp(lzword, lzbuf, lzptr - lzbuf - 2) == 0) {
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lzwlen = (*(lzptr - 2) << 8) | *(lzptr - 1);
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return 1;
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} else {
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lzptr = lzbuf;
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}
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}
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return 0;
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});
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if (ret == EOF) {
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return Error::noword;
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} else {
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Parser::processLiteral(state, (Cell)lzwlen);
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return Error::none;
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}
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}
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void initGPIO()
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{
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// Unnecessary, but done by TI example
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P1DIR = 0xFF; P2DIR = 0xFF;
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P1REN = 0xFF; P2REN = 0xFF;
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P1OUT = 0x00; P2OUT = 0x00;
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// Set LED pins to outputs
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P6DIR |= BIT0 | BIT1 | BIT2;
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P6OUT |= BIT0 | BIT1 | BIT2;
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P5DIR |= BIT5 | BIT6 | BIT7;
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P5OUT |= BIT5 | BIT6 | BIT7;
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// Setup buttons w/ pullups
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P3DIR &= ~BIT4; P3REN |= BIT4; P3OUT |= BIT4;
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P2DIR &= ~BIT3; P2REN |= BIT3; P2OUT |= BIT3;
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// Allow GPIO configurations to be applied
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PM5CTL0 &= ~LOCKLPM5;
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// Safety measure, prevent unwarranted interrupts
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P5IFG = 0;
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P6IFG = 0;
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}
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void initClock()
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{
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__bis_SR_register(SCG0); // disable FLL
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CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
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CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
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CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
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__delay_cycles(3);
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__bic_SR_register(SCG0); // enable FLL
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Software_Trim(); // Software Trim to get the best DCOFTRIM value
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CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
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// default DCODIV as MCLK and SMCLK source
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}
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void initUART()
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{
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// Configure UART pins
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P5SEL0 |= BIT1 | BIT2; // set 2-UART pin as second function
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SYSCFG3|=USCIA0RMP; //Set the remapping source
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// Configure UART
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UCA0CTLW0 |= UCSWRST;
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UCA0CTLW0 |= UCSSEL__SMCLK;
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// Baud Rate calculation
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// 8000000/(16*9600) = 52.083
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// Fractional portion = 0.083
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// User's Guide Table 17-4: UCBRSx = 0x49
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// UCBRFx = int ( (52.083-52)*16) = 1
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UCA0BR0 = 52; // 8000000/16/9600
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UCA0BR1 = 0x00;
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UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;
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UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
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}
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void Software_Trim()
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{
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unsigned int oldDcoTap = 0xffff;
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unsigned int newDcoTap = 0xffff;
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unsigned int newDcoDelta = 0xffff;
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unsigned int bestDcoDelta = 0xffff;
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unsigned int csCtl0Copy = 0;
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unsigned int csCtl1Copy = 0;
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unsigned int csCtl0Read = 0;
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unsigned int csCtl1Read = 0;
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unsigned int dcoFreqTrim = 3;
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unsigned char endLoop = 0;
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do
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{
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CSCTL0 = 0x100; // DCO Tap = 256
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do
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{
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CSCTL7 &= ~DCOFFG; // Clear DCO fault flag
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}while (CSCTL7 & DCOFFG); // Test DCO fault flag
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__delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
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// Suggest to wait 24 cycles of divided FLL reference clock
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while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));
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csCtl0Read = CSCTL0; // Read CSCTL0
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csCtl1Read = CSCTL1; // Read CSCTL1
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oldDcoTap = newDcoTap; // Record DCOTAP value of last time
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newDcoTap = csCtl0Read & 0x01ff; // Get DCOTAP value of this time
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dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value
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if(newDcoTap < 256) // DCOTAP < 256
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{
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newDcoDelta = 256 - newDcoTap; // Delta value between DCPTAP and 256
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if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
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endLoop = 1; // Stop while loop
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else
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{
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dcoFreqTrim--;
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CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
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}
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}
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else // DCOTAP >= 256
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{
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newDcoDelta = newDcoTap - 256; // Delta value between DCPTAP and 256
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if(oldDcoTap < 256) // DCOTAP cross 256
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endLoop = 1; // Stop while loop
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else
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{
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dcoFreqTrim++;
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CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
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}
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}
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if(newDcoDelta < bestDcoDelta) // Record DCOTAP closest to 256
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{
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csCtl0Copy = csCtl0Read;
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csCtl1Copy = csCtl1Read;
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bestDcoDelta = newDcoDelta;
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}
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}while(endLoop == 0); // Poll until endLoop == 1
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CSCTL0 = csCtl0Copy; // Reload locked DCOTAP
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CSCTL1 = csCtl1Copy; // Reload locked DCOFTRIM
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while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
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}
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bool alee_isr_handle(unsigned index)
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{
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const Addr isr = isr_list[index];
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if (isr != 0) {
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State isrstate (dict, readchar);
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exitLpm = false;
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isrstate.execute(isr);
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return exitLpm;
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}
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return false;
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}
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#define DEFINE_ISR(VVV, III) \
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__attribute__((interrupt(VVV))) \
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void VVV##_ISR() { \
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if (alee_isr_handle(III)) \
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_low_power_mode_off_on_exit(); }
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DEFINE_ISR(ECOMP0_VECTOR, 0)
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DEFINE_ISR(PORT6_VECTOR, 1)
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DEFINE_ISR(PORT5_VECTOR, 2)
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DEFINE_ISR(PORT4_VECTOR, 3)
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DEFINE_ISR(PORT3_VECTOR, 4)
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DEFINE_ISR(PORT2_VECTOR, 5)
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DEFINE_ISR(PORT1_VECTOR, 6)
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DEFINE_ISR(ADC_VECTOR, 7)
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DEFINE_ISR(EUSCI_B1_VECTOR, 8)
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DEFINE_ISR(EUSCI_B0_VECTOR, 9)
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DEFINE_ISR(EUSCI_A1_VECTOR, 10)
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DEFINE_ISR(EUSCI_A0_VECTOR, 11)
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DEFINE_ISR(WDT_VECTOR, 12)
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DEFINE_ISR(RTC_VECTOR, 13)
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DEFINE_ISR(TIMER0_B1_VECTOR, 14)
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DEFINE_ISR(TIMER0_B0_VECTOR, 15)
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DEFINE_ISR(TIMER3_A1_VECTOR, 16)
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DEFINE_ISR(TIMER3_A0_VECTOR, 17)
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DEFINE_ISR(TIMER2_A1_VECTOR, 18)
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DEFINE_ISR(TIMER2_A0_VECTOR, 19)
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DEFINE_ISR(TIMER1_A1_VECTOR, 20)
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DEFINE_ISR(TIMER1_A0_VECTOR, 21)
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DEFINE_ISR(TIMER0_A1_VECTOR, 22)
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DEFINE_ISR(TIMER0_A0_VECTOR, 23)
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