msp430: add uart example
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fbaf08aa6c
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GPG Key ID:
1B74EE6C49C96795
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\ UART example, 9600 baud, pins D0/1
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: uart-init ( -- )
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bit5 bit6 or p2sel0 byte set
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ucswrst uca1ctlw0 reg set
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ucssel__smclk uca1ctlw0 reg set
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52 uca1brw reg!
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18688 ucos16 or ucbrf0 or uca1mctlw reg!
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ucswrst uca1ctlw0 reg clear
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;
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: uart-emit ( n -- )
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uca1txbuf byte!
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;
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: uart-type ( c-addr u -- )
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0 do
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dup c@ uart-emit char+ loop
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drop
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;
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/* --COPYRIGHT--,BSD_EX
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* Copyright (c) 2018, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************
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*
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* MSP430 CODE EXAMPLE DISCLAIMER
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*
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* MSP430 code examples are self-contained low-level programs that typically
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* demonstrate a single peripheral function or device feature in a highly
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* concise manner. For this the code may rely on the device's power-on default
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* register values and settings such as the clock configuration and care must
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* be taken when combining code from several examples to avoid potential side
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* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware
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* for an API functional library-approach to peripheral configuration.
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*
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* --/COPYRIGHT--*/
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//******************************************************************************
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// MSP430FR267x Demo - eUSCI_A0 UART echo at 9600 baud using BRCLK = 8MHz.
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//
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// Description: This demo echoes back characters received via a PC serial port.
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// SMCLK/ DCO is used as a clock source and the device is put in LPM3
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// The auto-clock enable feature is used by the eUSCI and SMCLK is turned off
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// when the UART is idle and turned on when a receive edge is detected.
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// Note that level shifter hardware is needed to shift between RS232 and MSP
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// voltage levels.
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//
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// The example code shows proper initialization of registers
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// and interrupts to receive and transmit data.
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// To test code in LPM3, disconnect the debugger.
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//
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// ACLK = REFO = 32768Hz, MCLK = DCODIV = SMCLK = 8MHz.
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//
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// MSP430FR2676
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// -----------------
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// /|\| |
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// | | |
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// --|RST |
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// | |
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// | |
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// | P5.2/UCA0TXD|----> PC (echo)
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// | P5.1/UCA0RXD|<---- PC
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// | |
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//
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// Longyu Fang
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// Texas Instruments Inc.
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// August 2018
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// Built with IAR Embedded Workbench v7.12.1 & Code Composer Studio v8.1.0
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//******************************************************************************
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#include <msp430.h>
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void Init_GPIO();
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void Software_Trim(); // Software Trim to get the best DCOFTRIM value
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#define MCLK_FREQ_MHZ 8 // MCLK = 8MHz
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int main(void)
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{
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WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
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// Configure GPIO
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Init_GPIO();
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PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
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// to activate 1previously configured port settings
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__bis_SR_register(SCG0); // disable FLL
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CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source
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CSCTL1 = DCOFTRIMEN_1 | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHz
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CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
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__delay_cycles(3);
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__bic_SR_register(SCG0); // enable FLL
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Software_Trim(); // Software Trim to get the best DCOFTRIM value
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CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
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// default DCODIV as MCLK and SMCLK source
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// Configure UART pins
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P5SEL0 |= BIT1 | BIT2; // set 2-UART pin as second function
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SYSCFG3|=USCIA0RMP; //Set the remapping source
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// Configure UART
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UCA0CTLW0 |= UCSWRST;
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UCA0CTLW0 |= UCSSEL__SMCLK;
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// Baud Rate calculation
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// 8000000/(16*9600) = 52.083
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// Fractional portion = 0.083
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// User's Guide Table 17-4: UCBRSx = 0x49
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// UCBRFx = int ( (52.083-52)*16) = 1
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UCA0BR0 = 52; // 8000000/16/9600
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UCA0BR1 = 0x00;
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UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;
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UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
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UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
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__bis_SR_register(LPM3_bits|GIE); // Enter LPM3, interrupts enabled
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__no_operation(); // For debugger
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}
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void Software_Trim()
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{
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unsigned int oldDcoTap = 0xffff;
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unsigned int newDcoTap = 0xffff;
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unsigned int newDcoDelta = 0xffff;
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unsigned int bestDcoDelta = 0xffff;
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unsigned int csCtl0Copy = 0;
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unsigned int csCtl1Copy = 0;
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unsigned int csCtl0Read = 0;
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unsigned int csCtl1Read = 0;
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unsigned int dcoFreqTrim = 3;
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unsigned char endLoop = 0;
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do
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{
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CSCTL0 = 0x100; // DCO Tap = 256
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do
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{
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CSCTL7 &= ~DCOFFG; // Clear DCO fault flag
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}while (CSCTL7 & DCOFFG); // Test DCO fault flag
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__delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable
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// Suggest to wait 24 cycles of divided FLL reference clock
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while((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));
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csCtl0Read = CSCTL0; // Read CSCTL0
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csCtl1Read = CSCTL1; // Read CSCTL1
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oldDcoTap = newDcoTap; // Record DCOTAP value of last time
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newDcoTap = csCtl0Read & 0x01ff; // Get DCOTAP value of this time
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dcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM value
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if(newDcoTap < 256) // DCOTAP < 256
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{
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newDcoDelta = 256 - newDcoTap; // Delta value between DCPTAP and 256
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if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256
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endLoop = 1; // Stop while loop
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else
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{
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dcoFreqTrim--;
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CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
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}
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}
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else // DCOTAP >= 256
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{
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newDcoDelta = newDcoTap - 256; // Delta value between DCPTAP and 256
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if(oldDcoTap < 256) // DCOTAP cross 256
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endLoop = 1; // Stop while loop
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else
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{
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dcoFreqTrim++;
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CSCTL1 = (csCtl1Read & (~DCOFTRIM)) | (dcoFreqTrim<<4);
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}
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}
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if(newDcoDelta < bestDcoDelta) // Record DCOTAP closest to 256
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{
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csCtl0Copy = csCtl0Read;
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csCtl1Copy = csCtl1Read;
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bestDcoDelta = newDcoDelta;
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}
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}while(endLoop == 0); // Poll until endLoop == 1
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CSCTL0 = csCtl0Copy; // Reload locked DCOTAP
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CSCTL1 = csCtl1Copy; // Reload locked DCOFTRIM
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while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
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}
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#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
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#pragma vector=USCI_A0_VECTOR
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__interrupt void USCI_A0_ISR(void)
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#elif defined(__GNUC__)
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void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
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#else
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#error Compiler not supported!
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#endif
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{
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switch(__even_in_range(UCA0IV,USCI_UART_UCTXCPTIFG))
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{
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case USCI_NONE: break;
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case USCI_UART_UCRXIFG:
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while(!(UCA0IFG&UCTXIFG));
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UCA0TXBUF = UCA0RXBUF;
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__no_operation();
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break;
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case USCI_UART_UCTXIFG: break;
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case USCI_UART_UCSTTIFG: break;
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case USCI_UART_UCTXCPTIFG: break;
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default: break;
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}
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}
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void Init_GPIO()
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{
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P1DIR = 0xFF; P2DIR = 0xFF;
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P1REN = 0xFF; P2REN = 0xFF;
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P1OUT = 0x00; P2OUT = 0x00;
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}
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