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364 lines
17 KiB
Plaintext
364 lines
17 KiB
Plaintext
/* ============================================================================ */
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/* Copyright (c) 2021, Texas Instruments Incorporated */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following conditions */
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/* are met: */
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/* */
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/* * Redistributions of source code must retain the above copyright */
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/* notice, this list of conditions and the following disclaimer. */
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/* */
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/* * Redistributions in binary form must reproduce the above copyright */
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/* notice, this list of conditions and the following disclaimer in the */
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/* documentation and/or other materials provided with the distribution. */
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/* */
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/* * Neither the name of Texas Instruments Incorporated nor the names of */
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/* its contributors may be used to endorse or promote products derived */
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/* from this software without specific prior written permission. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
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/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
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/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
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/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
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/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
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/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
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/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
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/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ============================================================================ */
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/* This file supports MSP430FR2476 devices. */
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/* Version: 1.212 */
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/* Default linker script, for normal executables */
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OUTPUT_ARCH(msp430)
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ENTRY(_start)
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MEMORY {
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TINYRAM : ORIGIN = 0x0006, LENGTH = 0x001A /* END=0x001F, size 26 */
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BSL0 : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x17FF, size 2048 */
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TLVMEM : ORIGIN = 0x1A00, LENGTH = 0x0200 /* END=0x1BFF, size 512 */
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BOOTCODE : ORIGIN = 0x1C00, LENGTH = 0x0400 /* END=0x1FFF, size 1024 */
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ROMLIB : ORIGIN = 0xC0000, LENGTH = 0x4000 /* END=0xC3FFF, size 16384 */
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BSL1 : ORIGIN = 0xFFC00, LENGTH = 0x0400 /* END=0xFFFFF, size 1024 */
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RAM : ORIGIN = 0x2000, LENGTH = 0x2000 /* END=0x3FFF, size 8192 */
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INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 */
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FRAM (rwx) : ORIGIN = 0x8000, LENGTH = 0x7F80 /* END=0xFF7F, size 32640 */
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HIFRAM (rxw) : ORIGIN = 0x10000, LENGTH = 0x00007FFF
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JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004
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BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004
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BSLCONFIGURATIONSIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0002
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BSLCONFIGURATION : ORIGIN = 0xFF8A, LENGTH = 0x0002
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BSLI2CADDRESS : ORIGIN = 0xFFA0, LENGTH = 0x0002
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VECT0 : ORIGIN = 0xFFA2, LENGTH = 0x0002
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VECT1 : ORIGIN = 0xFFA4, LENGTH = 0x0002
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VECT2 : ORIGIN = 0xFFA6, LENGTH = 0x0002
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VECT3 : ORIGIN = 0xFFA8, LENGTH = 0x0002
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VECT4 : ORIGIN = 0xFFAA, LENGTH = 0x0002
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VECT5 : ORIGIN = 0xFFAC, LENGTH = 0x0002
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VECT6 : ORIGIN = 0xFFAE, LENGTH = 0x0002
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VECT7 : ORIGIN = 0xFFB0, LENGTH = 0x0002
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VECT8 : ORIGIN = 0xFFB2, LENGTH = 0x0002
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VECT9 : ORIGIN = 0xFFB4, LENGTH = 0x0002
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VECT10 : ORIGIN = 0xFFB6, LENGTH = 0x0002
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VECT11 : ORIGIN = 0xFFB8, LENGTH = 0x0002
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VECT12 : ORIGIN = 0xFFBA, LENGTH = 0x0002
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VECT13 : ORIGIN = 0xFFBC, LENGTH = 0x0002
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VECT14 : ORIGIN = 0xFFBE, LENGTH = 0x0002
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VECT15 : ORIGIN = 0xFFC0, LENGTH = 0x0002
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VECT16 : ORIGIN = 0xFFC2, LENGTH = 0x0002
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VECT17 : ORIGIN = 0xFFC4, LENGTH = 0x0002
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VECT18 : ORIGIN = 0xFFC6, LENGTH = 0x0002
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VECT19 : ORIGIN = 0xFFC8, LENGTH = 0x0002
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VECT20 : ORIGIN = 0xFFCA, LENGTH = 0x0002
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VECT21 : ORIGIN = 0xFFCC, LENGTH = 0x0002
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VECT22 : ORIGIN = 0xFFCE, LENGTH = 0x0002
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VECT23 : ORIGIN = 0xFFD0, LENGTH = 0x0002
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VECT24 : ORIGIN = 0xFFD2, LENGTH = 0x0002
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VECT25 : ORIGIN = 0xFFD4, LENGTH = 0x0002
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VECT26 : ORIGIN = 0xFFD6, LENGTH = 0x0002
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VECT27 : ORIGIN = 0xFFD8, LENGTH = 0x0002
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VECT28 : ORIGIN = 0xFFDA, LENGTH = 0x0002
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VECT29 : ORIGIN = 0xFFDC, LENGTH = 0x0002
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VECT30 : ORIGIN = 0xFFDE, LENGTH = 0x0002
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VECT31 : ORIGIN = 0xFFE0, LENGTH = 0x0002
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VECT32 : ORIGIN = 0xFFE2, LENGTH = 0x0002
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VECT33 : ORIGIN = 0xFFE4, LENGTH = 0x0002
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VECT34 : ORIGIN = 0xFFE6, LENGTH = 0x0002
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VECT35 : ORIGIN = 0xFFE8, LENGTH = 0x0002
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VECT36 : ORIGIN = 0xFFEA, LENGTH = 0x0002
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VECT37 : ORIGIN = 0xFFEC, LENGTH = 0x0002
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VECT38 : ORIGIN = 0xFFEE, LENGTH = 0x0002
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VECT39 : ORIGIN = 0xFFF0, LENGTH = 0x0002
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VECT40 : ORIGIN = 0xFFF2, LENGTH = 0x0002
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VECT41 : ORIGIN = 0xFFF4, LENGTH = 0x0002
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VECT42 : ORIGIN = 0xFFF6, LENGTH = 0x0002
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VECT43 : ORIGIN = 0xFFF8, LENGTH = 0x0002
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VECT44 : ORIGIN = 0xFFFA, LENGTH = 0x0002
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VECT45 : ORIGIN = 0xFFFC, LENGTH = 0x0002
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RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
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}
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SECTIONS
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{
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.jtagsignature : {} > JTAGSIGNATURE
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.bslsignature : {} > BSLSIGNATURE
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.bslconfigsignature : {} > BSLCONFIGURATIONSIGNATURE
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.bslconfig : {} > BSLCONFIGURATION
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.bsli2caddress : {} > BSLI2CADDRESS
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__interrupt_vector_0 : { KEEP (*(__interrupt_vector_0 )) } > VECT0
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__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
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__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
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__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
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__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
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__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
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__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
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__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
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__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
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__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
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__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
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__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
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__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
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__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
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__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
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__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
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__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
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__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
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__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18
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__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) } > VECT19
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__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_ecomp0)) } > VECT20
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__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_port6)) } > VECT21
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__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_port5)) } > VECT22
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__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_port4)) } > VECT23
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__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_port3)) } > VECT24
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__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_port2)) } > VECT25
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__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port1)) } > VECT26
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__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_adc)) } > VECT27
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__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT28
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__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT29
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__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT30
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__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT31
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__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_wdt)) } > VECT32
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__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_rtc)) } > VECT33
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__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT34
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__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT35
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__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT36
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__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT37
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__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT38
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__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT39
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__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40
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__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41
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__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT42
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__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT43
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__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_unmi)) } > VECT44
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__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT45
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__reset_vector :
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{
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KEEP (*(__interrupt_vector_46))
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KEEP (*(__interrupt_vector_reset))
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KEEP (*(.resetvec))
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} > RESETVEC
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.rodata :
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{
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. = ALIGN(2);
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*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
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*(.rodata1)
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} > FRAM
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/* Note: This is a separate .rodata section for sections which are
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read only but which older linkers treat as read-write.
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This prevents older linkers from marking the entire .rodata
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section as read-write. */
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.rodata2 :
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{
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. = ALIGN(2);
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PROVIDE (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE (__preinit_array_end = .);
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. = ALIGN(2);
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PROVIDE (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE (__init_array_end = .);
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. = ALIGN(2);
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PROVIDE (__fini_array_start = .);
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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PROVIDE (__fini_array_end = .);
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. = ALIGN(2);
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/* gcc uses crtbegin.o to find the start of the constructors, so
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we make sure it is first. Because this is a wildcard, it
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doesn't matter if the user does not actually link against
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crtbegin.o; the linker won't look for a file to match a
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wildcard. The wildcard also means that it doesn't matter which
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directory crtbegin.o is in. */
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KEEP (*crtbegin*.o(.ctors))
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/* We don't want to include the .ctor section from the crtend.o
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file until after the sorted ctors. The .ctor section from
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the crtend file contains the end of ctors marker and it must
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be last */
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KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin*.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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} > FRAM
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.tinyram : {} > TINYRAM
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.data :
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{
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. = ALIGN(2);
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PROVIDE (__datastart = .);
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*(.data .data.* .gnu.linkonce.d.*)
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KEEP (*(.gnu.linkonce.d.*personality*))
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SORT(CONSTRUCTORS)
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*(.data1)
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/* We want the small data sections together, so single-instruction offsets
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can access them all, and initialized data all before uninitialized, so
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we can shorten the on-disk segment size. */
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. = ALIGN(2);
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*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
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. = ALIGN(2);
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_edata = .;
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PROVIDE (edata = .);
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PROVIDE (__dataend = .);
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} > RAM AT> FRAM
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/* Note that crt0 assumes this is a multiple of two; all the
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start/stop symbols are also assumed word-aligned. */
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PROVIDE(__romdatastart = LOADADDR(.data));
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PROVIDE (__romdatacopysize = SIZEOF(.data));
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.bss :
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{
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. = ALIGN(2);
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PROVIDE (__bssstart = .);
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*(.sbss .sbss.*)
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*(.bss .bss.* .gnu.linkonce.b.*)
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. = ALIGN(2);
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*(COMMON)
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PROVIDE (__bssend = .);
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} > RAM
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PROVIDE (__bsssize = SIZEOF(.bss));
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/* This section contains data that is not initialised during load
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or application reset. */
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.noinit (NOLOAD) :
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{
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. = ALIGN(2);
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PROVIDE (__noinit_start = .);
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*(.noinit)
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. = ALIGN(2);
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PROVIDE (__noinit_end = .);
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} > RAM
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.stack (ORIGIN (RAM) + LENGTH(RAM)) :
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{
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PROVIDE (__stack = .);
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*(.stack)
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}
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.hidict :
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{
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. = ALIGN(2);
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*(.hidict)
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} > HIFRAM
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.text :
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{
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PROVIDE (_start = .);
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. = ALIGN(2);
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KEEP (*(SORT(.crt_*)))
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. = ALIGN(2);
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*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
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. = ALIGN(2);
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KEEP (*(.init))
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KEEP (*(.fini))
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KEEP (*(.tm_clone_table))
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} > FRAM
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.lodict :
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{
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. = ALIGN(2);
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*(.lodict)
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} > FRAM
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.info (NOLOAD) : {} > INFOMEM /* MSP430 INFO FLASH MEMORY SEGMENTS */
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/* The rest are all not normally part of the runtime image. */
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.MSP430.attributes 0 :
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{
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KEEP (*(.MSP430.attributes))
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KEEP (*(.gnu.attributes))
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KEEP (*(__TI_build_attributes))
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1. */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions. */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2. */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2. */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions. */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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/* DWARF 3 */
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.debug_pubtypes 0 : { *(.debug_pubtypes) }
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.debug_ranges 0 : { *(.debug_ranges) }
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/* DWARF Extension. */
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.debug_macro 0 : { *(.debug_macro) }
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/DISCARD/ : { *(.note.GNU-stack .debug_loclists) }
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}
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/****************************************************************************/
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/* Include peripherals memory map */
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/****************************************************************************/
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INCLUDE msp430fr2476_symbols.ld
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