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75 lines
1.6 KiB
Forth
75 lines
1.6 KiB
Forth
: vector! 10 sys ;
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: byte! 11 sys ;
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: byte@ 12 sys ;
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: reg! 13 sys ;
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: reg@ 14 sys ;
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: sr+ 15 sys ;
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: sr- 16 sys ;
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: lpm-exit 17 sys ;
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: reg [ ' reg@ ' reg! ] literal literal ;
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: byte [ ' byte@ ' byte! ] literal literal ;
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: set ( b r reg/byte -- )
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>r over r> execute >r rot r> | -rot execute ;
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: clear ( b r reg/byte -- )
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>r over r> execute >r rot invert r> & -rot execute ;
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: toggle ( b r reg/byte -- )
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>r over r> execute >r rot r> ^ -rot execute ;
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create _outs p1out , p2out , p3out , p4out , p5out , p6out ,
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create _ins p1in , p2in , p3in , p4in , p5in , p6in ,
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create _dirs p1dir , p2dir , p3dir , p4dir , p5dir , p6dir ,
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create _sel0 p1sel0 , p2sel0 , p3sel0 , p4sel0 , p5sel0 , p6sel0 ,
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create _sel1 p1sel1 , p2sel1 , p3sel1 , p4sel1 , p5sel1 , p6sel1 ,
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1 constant output
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0 constant input
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: pin-mode ( output? pin port -- )
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rot >r cells _dirs + @ byte r> if set else clear then ;
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: pin-set ( high? pin port -- )
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rot >r cells _outs + @ byte r> if set else clear then ;
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: pin-get ( pin port -- high? )
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cells _ins + @ byte@ swap and 0 > ;
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: analog-init
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adcon adcsht_2 or adcctl0 reg set
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adcshp adcctl1 reg set
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adcres adcctl2 reg clear
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adcres_2 adcctl2 reg set
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adcie0 adcie reg set ;
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: D0 bit5 1 ;
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: D1 bit6 1 ;
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: D2 bit1 2 ;
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: D3 bit4 1 ;
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: D4 bit7 2 ;
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: D5 bit0 3 ;
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: D6 bit1 3 ;
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: D7 bit7 3 ;
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: D8 bit6 3 ;
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: D9 bit5 3 ;
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: D10 bit4 4 ;
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: D11 bit2 2 ;
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: D12 bit6 2 ;
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: D13 bit5 2 ;
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: A0 bit0 0 ;
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: A1 bit1 0 ;
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: A2 bit5 0 ;
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: A3 bit6 0 ;
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: A4 bit2 0 ;
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: A5 bit3 0 ;
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: AREF bit4 0 ;
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: LED1R bit1 5 ;
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: LED1G bit0 5 ;
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: LED1B bit2 5 ;
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: LED2R bit6 4 ;
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: LED2G bit5 4 ;
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: LED2B bit7 4 ;
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