6 Commits (3f4738bd15218dbcef0509ef14da3747b029a5c0)

Author	SHA1	Message	Date
Clyne	3f4738bd15	vdda buffer; vdda for pots; other fixes	1 year ago
Clyne	836b420aec	wip: schematic fixes based on testing	1 year ago
Clyne	834d719434	design finalized; publish pdfs	2 years ago
Clyne	12caf4acd4	pcb design finalization	2 years ago
Clyne	5d91869649	finalize pcb design; add layout file	2 years ago
Clyne	f440728644	initial commit ... * combine all source files into this monorepo * convert all third-party source packages into submodules * small fixes due to changes in latest third-part packages	2 years ago