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authorClyne Sullivan <tullivan99@gmail.com>2017-12-30 16:29:09 -0500
committerClyne Sullivan <tullivan99@gmail.com>2017-12-30 16:29:09 -0500
commitde7c4fb07d1ac0298e7fc62000c35193e221aaae (patch)
tree8e80c957d5b5066d92d943746ce8ef533d666b01 /include
parent5f137a4fd613ccccb31f014481ff45be028cbcdf (diff)
pendsv, clock lib
Diffstat (limited to 'include')
-rw-r--r--include/clock.h16
-rw-r--r--include/stm32l476xx.h24
2 files changed, 40 insertions, 0 deletions
diff --git a/include/clock.h b/include/clock.h
new file mode 100644
index 0000000..9d4b17a
--- /dev/null
+++ b/include/clock.h
@@ -0,0 +1,16 @@
+#ifndef CLOCK_H_
+#define CLOCK_H_
+
+#include <stdint.h>
+
+/**
+ * Sets HCLK (system clock) to 80MHz, the maximum.
+ */
+extern void clock_init(void);
+
+/**
+ * Sleeps for given milliseconds.
+ */
+void delay(uint32_t ms);
+
+#endif // CLOCK_H_
diff --git a/include/stm32l476xx.h b/include/stm32l476xx.h
index af8ef5c..7c6f9e0 100644
--- a/include/stm32l476xx.h
+++ b/include/stm32l476xx.h
@@ -18497,6 +18497,30 @@ typedef struct
#define DFSDM2_IRQHandler DFSDM1_FLT2_IRQHandler
#define DFSDM3_IRQHandler DFSDM1_FLT3_IRQHandler
+/*typedef struct {
+ uint32_t CPUID;
+ uint32_t ICSR;
+ uint32_t VTOR;
+ uint32_t AIRCR;
+ uint32_t SCR;
+ uint32_t CCR;
+ uint32_t SHPR1;
+ uint32_t SHPR2;
+ uint32_t SHPR3;
+ uint32_t SHCRS;
+ uint32_t CFSR;
+ uint32_t HFSR;
+ uint32_t rsvd;
+ uint32_t MMAR;
+ uint32_t BFAR;
+ uint32_t AFSR;
+} __attribute__ ((packed)) SCB_TypeDef;
+
+#define SCB_ADDR (0xE000ED00)
+#define SCB *((SCB_TypeDef *)SCB_ADDR)
+
+#define SCB_ICSR_PENDSVSET (1 << 28)*/
+
#ifdef __cplusplus
}
#endif /* __cplusplus */