Compare commits
2 Commits
master
...
error-chec
| Author | SHA1 | Date | |
|---|---|---|---|
| 2e6001946f | |||
| 922489447f |
2
.gitignore
vendored
2
.gitignore
vendored
@ -1,2 +0,0 @@
|
||||
.*.sw*
|
||||
svd2funreg/main
|
||||
3
.gitmodules
vendored
3
.gitmodules
vendored
@ -1,3 +0,0 @@
|
||||
[submodule "svd2funreg/pugixml"]
|
||||
path = svd2funreg/pugixml
|
||||
url = https://github.com/zeux/pugixml
|
||||
@ -1,7 +0,0 @@
|
||||
all:
|
||||
arm-none-eabi-g++ -mcpu=cortex-m0plus -mthumb -std=c++20 -O1 -I .. \
|
||||
-fno-exceptions -fno-rtti -fdata-sections -ffunction-sections \
|
||||
main.cpp startup_stm32u083xx.s \
|
||||
-o main -T STM32U083xx_FLASH.ld -Wl,-gc-sections
|
||||
arm-none-eabi-objcopy -Oihex main main.hex
|
||||
|
||||
@ -1,187 +0,0 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** @file : LinkerScript.ld
|
||||
**
|
||||
** @author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** @brief : Linker script for STM32U083xx Device from STM32U0 series
|
||||
** 256Kbytes FLASH
|
||||
** 40Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
******************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** Copyright (c) 2023 STMicroelectronics.
|
||||
** All rights reserved.
|
||||
**
|
||||
** This software is licensed under terms that can be found in the LICENSE file
|
||||
** in the root directory of this software component.
|
||||
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
**
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x0; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x100; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "FLASH" Rom type memory */
|
||||
.isr_vector :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data into "FLASH" Rom type memory */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data into "FLASH" Rom type memory */
|
||||
.rodata :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@ -1,32 +0,0 @@
|
||||
#include "stm32u083.hpp"
|
||||
|
||||
int main()
|
||||
{
|
||||
using namespace STM32U083;
|
||||
using LD3 = GPIOC::ODR::OD13;
|
||||
using LD4 = GPIOA::ODR::OD5;
|
||||
using LD5 = GPIOB::ODR::OD2;
|
||||
|
||||
RCC::ALL::set<
|
||||
RCC::IOPENR::GPIOAEN,
|
||||
RCC::IOPENR::GPIOBEN,
|
||||
RCC::IOPENR::GPIOCEN,
|
||||
RCC::APBENR1::USART2EN>();
|
||||
|
||||
GPIOC::MODER::MODE13::write<1>();
|
||||
GPIOA::MODER::MODE5::write<1>();
|
||||
GPIOB::MODER::MODE2::write<1>();
|
||||
|
||||
unsigned i = 0;
|
||||
while (1) {
|
||||
if (i & 1) LD3::set(); else LD3::clear();
|
||||
if (i & 2) LD4::set(); else LD4::clear();
|
||||
if (i & 4) LD5::set(); else LD5::clear();
|
||||
|
||||
for (int j = 0; j < 100000; j++)
|
||||
asm("nop");
|
||||
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,296 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32u083xx.s
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32U083xx device vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2023 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m0plus
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* The STM32U083xx vector table. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IWDG_IRQHandler /* Window watchdog interrupt */
|
||||
.word PVD_PVM_IRQHandler /* PVD/PVM1/PVM2/PVM3 interrupt (combined with EXTI lines 16 and 19 and 20 and 21) */
|
||||
.word RTC_TAMP_IRQHandler /* RTC and TAMP interrupts(combined EXTI lines 19 and 21) */
|
||||
.word FLASH_ECC_IRQHandler /* FLASH global interrupt */
|
||||
.word RCC_CRS_IRQHandler /* RCC and CRS global interrupt */
|
||||
.word EXTI0_1_IRQHandler /* EXTI lines 0 and 1 interrupt */
|
||||
.word EXTI2_3_IRQHandler /* EXTI lines 2 and 3 interrupt */
|
||||
.word EXTI4_15_IRQHandler /* EXTI lines 4 to 15 interrupt */
|
||||
.word USB_DRD_FS_IRQHandler /* USB global interrupt (combined with EXTI line 33) */
|
||||
.word DMA1_Channel1_IRQHandler /* DMA1 channel 1 interrupt */
|
||||
.word DMA1_Channel2_3_IRQHandler /* DMA1 channel 2 and 3 interrupts */
|
||||
.word DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQHandler /* DMA1 channel 4, 5, 6, 7, DMAMUX overrun, DMA2 channel 1, 2, 3, 4, 5 interrupts */
|
||||
.word ADC_COMP1_2_IRQHandler /* ADC and COMP interrupts (ADC combined with EXTI lines 17 and 18) */
|
||||
.word TIM1_BRK_UP_TRG_COM_IRQHandler/* TIM1 break, update, trigger and commutation interrupts */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare interrupt */
|
||||
.word TIM2_IRQHandler /* TIM2 global interrupt */
|
||||
.word TIM3_IRQHandler /* TIM3 global interrupt */
|
||||
.word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, LPTIM1 and DAC global interrupt (combined with EXTI line 29) */
|
||||
.word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 global interrupt (combined with EXTI line 30) */
|
||||
.word TIM15_LPTIM3_IRQHandler /* TIM15 and LPTIM3 global interrupt (combined with EXTI line 29) */
|
||||
.word TIM16_IRQHandler /* TIM16 global interrupt */
|
||||
.word TSC_IRQHandler /* TSC global interrupt */
|
||||
.word LCD_IRQHandler /* LCD global interrupt (combined with EXTI line 32) */
|
||||
.word I2C1_IRQHandler /* I2C1 global interrupt (combined with EXTI line 23) */
|
||||
.word I2C2_3_4_IRQHandler /* I2C2/3/4 global interrupt */
|
||||
.word SPI1_IRQHandler /* SPI1 global interrupt */
|
||||
.word SPI2_3_IRQHandler /* SPI2/3 global interrupt */
|
||||
.word USART1_IRQHandler /* USART1 global interrupt (combined with EXTI line 25) */
|
||||
.word USART2_LPUART2_IRQHandler /* USART2 and LPUART2 global interrupt (combined with EXTI lines 26 and 35) */
|
||||
.word USART3_LPUART1_IRQHandler /* USART3 and LPUART1 global interrupt (combined with EXTI lines 24 and 28) */
|
||||
.word USART4_LPUART3_IRQHandler /* USART4 and LPUART3 global interrupt (combined with EXTI lines 20 and 34) */
|
||||
.word RNG_CRYP_IRQHandler /* RNG and CRYPTO global interrupts */
|
||||
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IWDG_IRQHandler
|
||||
.thumb_set WWDG_IWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_PVM_IRQHandler
|
||||
.thumb_set PVD_PVM_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_TAMP_IRQHandler
|
||||
.thumb_set RTC_TAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_ECC_IRQHandler
|
||||
.thumb_set FLASH_ECC_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_CRS_IRQHandler
|
||||
.thumb_set RCC_CRS_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_1_IRQHandler
|
||||
.thumb_set EXTI0_1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_3_IRQHandler
|
||||
.thumb_set EXTI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_15_IRQHandler
|
||||
.thumb_set EXTI4_15_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_DRD_FS_IRQHandler
|
||||
.thumb_set USB_DRD_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_3_IRQHandler
|
||||
.thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQHandler
|
||||
.thumb_set DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_COMP1_2_IRQHandler
|
||||
.thumb_set ADC_COMP1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_UP_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_LPTIM1_IRQHandler
|
||||
.thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_LPTIM2_IRQHandler
|
||||
.thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM15_LPTIM3_IRQHandler
|
||||
.thumb_set TIM15_LPTIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM16_IRQHandler
|
||||
.thumb_set TIM16_IRQHandler,Default_Handler
|
||||
|
||||
.weak TSC_IRQHandler
|
||||
.thumb_set TSC_IRQHandler,Default_Handler
|
||||
|
||||
.weak LCD_IRQHandler
|
||||
.thumb_set LCD_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_IRQHandler
|
||||
.thumb_set I2C1_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_3_4_IRQHandler
|
||||
.thumb_set I2C2_3_4_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_3_IRQHandler
|
||||
.thumb_set SPI2_3_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_LPUART2_IRQHandler
|
||||
.thumb_set USART2_LPUART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_LPUART1_IRQHandler
|
||||
.thumb_set USART3_LPUART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART4_LPUART3_IRQHandler
|
||||
.thumb_set USART4_LPUART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak RNG_CRYP_IRQHandler
|
||||
.thumb_set RNG_CRYP_IRQHandler,Default_Handler
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
173
funreg.hpp
173
funreg.hpp
@ -14,17 +14,29 @@
|
||||
*/
|
||||
#define FUNREG_ENABLE_EXTERNAL_IO
|
||||
|
||||
/**
|
||||
* Comment to disable compile-time error checks, which are mostly concepts
|
||||
* to verify proper library usage.
|
||||
*/
|
||||
#define FUNREG_ENABLE_ERROR_CHECKS
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#ifdef FUNREG_ENABLE_EXTERNAL_IO
|
||||
#include <type_traits>
|
||||
#endif
|
||||
|
||||
#ifdef FUNREG_ENABLE_ERROR_CHECKS
|
||||
#include <concepts>
|
||||
#endif
|
||||
|
||||
namespace fr {
|
||||
|
||||
// A utility to measure a bit-mask's offset from bit zero.
|
||||
template<auto Mask, unsigned int N = 0>
|
||||
constexpr auto BitOffset = []() constexpr {
|
||||
requires(std::unsigned_integral<decltype(Mask)> &&
|
||||
(N < 8 * sizeof(Mask)))
|
||||
constexpr auto BitOffset = []() constexpr -> unsigned int {
|
||||
if constexpr (Mask & 1)
|
||||
return N;
|
||||
else
|
||||
@ -41,6 +53,7 @@ constexpr auto BitOffset = []() constexpr {
|
||||
* structure as a template.
|
||||
*/
|
||||
template<typename T, uintptr_t Addr>
|
||||
requires(std::unsigned_integral<T>)
|
||||
struct MemoryIO {
|
||||
using type = T;
|
||||
constexpr static auto addr = Addr;
|
||||
@ -60,6 +73,54 @@ struct MemoryIO {
|
||||
}
|
||||
};
|
||||
|
||||
template<typename T>
|
||||
concept IsAccess = requires(typename T::type x) {
|
||||
requires std::same_as<decltype(T::addr), const uintptr_t>;
|
||||
{T::read()} -> std::same_as<typename T::type>;
|
||||
{T::write(x)} -> std::same_as<void>;
|
||||
};
|
||||
|
||||
#ifdef FUNREG_ENABLE_EXTERNAL_IO
|
||||
template<typename Access>
|
||||
requires IsAccess<Access>
|
||||
struct Register;
|
||||
|
||||
template<typename T>
|
||||
concept IsRegister =
|
||||
IsAccess<typename T::access> &&
|
||||
std::same_as<T, Register<typename T::access>>;
|
||||
#else
|
||||
template<typename T, uintptr_t Addr>
|
||||
requires(std::unsigned_integral<T>)
|
||||
class Register;
|
||||
|
||||
template<typename T>
|
||||
concept IsRegister =
|
||||
std::unsigned_integral<typename T::type> &&
|
||||
IsAccess<typename T::Access>;
|
||||
#endif
|
||||
|
||||
template<typename Reg, typename Reg::type Mask>
|
||||
requires IsRegister<Reg>
|
||||
struct RegisterMask;
|
||||
|
||||
template<typename T>
|
||||
concept IsRegisterMask =
|
||||
IsRegister<typename T::reg> &&
|
||||
std::same_as<T, RegisterMask<typename T::reg, T::mask>>;
|
||||
|
||||
template<typename M, typename R>
|
||||
concept UsesRegister =
|
||||
IsRegisterMask<M> &&
|
||||
IsRegister<R> &&
|
||||
std::same_as<typename M::reg, R>;
|
||||
|
||||
template<typename M, typename... Rs>
|
||||
concept UsesSomeRegister =
|
||||
IsRegisterMask<M> &&
|
||||
(IsRegister<Rs>, ...) &&
|
||||
(std::same_as<typename M::reg, Rs> || ...);
|
||||
|
||||
/**
|
||||
* @struct Register
|
||||
* @brief Defines a register, given how to access it.
|
||||
@ -70,16 +131,22 @@ struct MemoryIO {
|
||||
*/
|
||||
#ifdef FUNREG_ENABLE_EXTERNAL_IO
|
||||
template<typename Access>
|
||||
struct Register {
|
||||
requires IsAccess<Access>
|
||||
class Register {
|
||||
public:
|
||||
using access = Access;
|
||||
using T = typename Access::type;
|
||||
constexpr static auto Addr = Access::addr;
|
||||
#else
|
||||
template<typename T, uintptr_t Addr>
|
||||
struct Register {
|
||||
using RegAccess = MemoryIO<T, Addr>;
|
||||
requires(std::unsigned_integral<T>)
|
||||
class Register {
|
||||
public:
|
||||
using Access = MemoryIO<T, Addr>;
|
||||
#endif // FUNREG_ENABLE_EXTERNAL_IO
|
||||
|
||||
using type = T;
|
||||
|
||||
/**
|
||||
* Gets a pointer to the register.
|
||||
*/
|
||||
@ -98,6 +165,8 @@ struct Register {
|
||||
* Sets register bits to '1' according to the given RegisterMasks.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesRegister<Masks, Register<Access>>, ...))
|
||||
static void set() {
|
||||
apply<Masks...>([](auto r, auto m) { return r | m; });
|
||||
}
|
||||
@ -113,6 +182,8 @@ struct Register {
|
||||
* Clears register bits to '0' according to the given RegisterMasks.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesRegister<Masks, Register<Access>>, ...))
|
||||
static void clear() {
|
||||
apply<Masks...>([](auto r, auto m) { return r & ~m; });
|
||||
}
|
||||
@ -128,6 +199,8 @@ struct Register {
|
||||
* Toggles bits in the register according to the given RegisterMasks.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesRegister<Masks, Register<Access>>, ...))
|
||||
static void toggle() {
|
||||
apply<Masks...>([](auto r, auto m) { return r ^m; });
|
||||
}
|
||||
@ -145,6 +218,8 @@ struct Register {
|
||||
* If no masks are given, all register bits are returned.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesRegister<Masks, Register<Access>>, ...))
|
||||
static auto read() {
|
||||
if constexpr (sizeof...(Masks) > 0)
|
||||
return read() & mergeMasks<Masks...>();
|
||||
@ -157,6 +232,8 @@ struct Register {
|
||||
* If no masks are given, tests if the register has a non-zero value.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesRegister<Masks, Register<Access>>, ...))
|
||||
static bool test() {
|
||||
if constexpr (sizeof...(Masks) > 0) {
|
||||
auto mask = mergeMasks<Masks...>();
|
||||
@ -185,14 +262,14 @@ struct Register {
|
||||
}
|
||||
}
|
||||
|
||||
// Below is meant for internal use only.
|
||||
|
||||
// Internal use only.
|
||||
// Applies bit-masks to the register through the provided function.
|
||||
// The provided function receives a pointer to the register's data and a
|
||||
// bit-mask created by merging all provided bit-masks.
|
||||
// All masks meant for this register are merged together; then, `fn`
|
||||
// will receive the register's current value and the mask to carry out
|
||||
// the operation. The result is written back to the register.
|
||||
// If no masks are given, a mask selecting all bits is used.
|
||||
template<typename... Masks>
|
||||
static constexpr void apply(auto fn) {
|
||||
constexpr static void apply(auto fn) {
|
||||
if constexpr (sizeof...(Masks) > 0) {
|
||||
constexpr auto mask = mergeMasks<Masks...>();
|
||||
if constexpr (mask)
|
||||
@ -202,10 +279,11 @@ struct Register {
|
||||
}
|
||||
}
|
||||
|
||||
private:
|
||||
// Takes a list of bit-masks, and returns a merged mask of those which are
|
||||
// meant for this register.
|
||||
template<typename... Masks>
|
||||
static constexpr auto mergeMasks() {
|
||||
constexpr static auto mergeMasks() {
|
||||
if constexpr (sizeof...(Masks) > 0) {
|
||||
if constexpr ((isThis<typename Masks::reg> | ...)) {
|
||||
auto mask =
|
||||
@ -224,20 +302,20 @@ struct Register {
|
||||
#ifdef FUNREG_ENABLE_EXTERNAL_IO
|
||||
// Determines if the given register matches this one.
|
||||
template<typename Reg>
|
||||
requires(IsRegister<Reg>)
|
||||
constexpr static bool isThis = [] {
|
||||
return std::is_same_v<typename Reg::access, access> && Addr == Reg::Addr;
|
||||
}();
|
||||
#else
|
||||
// Determines if the given register matches this one.
|
||||
template<typename Reg>
|
||||
requires(IsRegister<Reg>)
|
||||
constexpr static bool isThis = [] {
|
||||
return Addr == Reg::Addr;
|
||||
}();
|
||||
#endif // FUNREG_ENABLE_EXTERNAL_IO
|
||||
|
||||
Register() = delete;
|
||||
|
||||
using type = T;
|
||||
};
|
||||
|
||||
/**
|
||||
@ -251,6 +329,7 @@ struct Register {
|
||||
* using LED_RED = RegisterMask<GPIO_OUT, (1 << 2)>;
|
||||
*/
|
||||
template<typename Reg, typename Reg::type Mask>
|
||||
requires IsRegister<Reg>
|
||||
struct RegisterMask
|
||||
{
|
||||
using T = typename Reg::type;
|
||||
@ -366,35 +445,36 @@ struct RegisterMask
|
||||
constexpr static auto mask = Mask;
|
||||
};
|
||||
|
||||
///**
|
||||
// * @struct RegisterMaskValue
|
||||
// * @brief Used to name the possible values of a multi-bit bit-mask.
|
||||
// * @tparam Mask The RegisterMask this value is associated with.
|
||||
// * @tparam value The value to be used for the given Mask.
|
||||
// */
|
||||
//template<typename Mask, Mask::T value>
|
||||
//struct RegisterMaskValue
|
||||
//{
|
||||
// /**
|
||||
// * Call this directly to write the value into the register.
|
||||
// * Can also be used in modify() chains.
|
||||
// * @see RegisterMask::write()
|
||||
// * @see Register::modify()
|
||||
// */
|
||||
// using set = typename Mask::write<value>;
|
||||
//
|
||||
// /**
|
||||
// * Call this to clear the value from the register.
|
||||
// */
|
||||
// using clear = typename Mask::clear;
|
||||
//
|
||||
// /**
|
||||
// * Tests if this value is currently set in the register.
|
||||
// */
|
||||
// static bool test() {
|
||||
// return (Mask::read() & Mask::mask) == (value << BitOffset<Mask>);
|
||||
// }
|
||||
//};
|
||||
/**
|
||||
* @struct RegisterMaskValue
|
||||
* @brief Used to name the possible values of a multi-bit bit-mask.
|
||||
* @tparam Mask The RegisterMask this value is associated with.
|
||||
* @tparam value The value to be used for the given Mask.
|
||||
*/
|
||||
template<typename Mask, Mask::T value>
|
||||
requires(IsRegisterMask<Mask>)
|
||||
struct RegisterMaskValue
|
||||
{
|
||||
/**
|
||||
* Call this directly to write the value into the register.
|
||||
* Can also be used in modify() chains.
|
||||
* @see RegisterMask::write()
|
||||
* @see Register::modify()
|
||||
*/
|
||||
using set = typename Mask::write<value>;
|
||||
|
||||
/**
|
||||
* Call this to clear the value from the register.
|
||||
*/
|
||||
using clear = typename Mask::clear;
|
||||
|
||||
/**
|
||||
* Tests if this value is currently set in the register.
|
||||
*/
|
||||
static bool test() {
|
||||
return (Mask::read() & Mask::mask) == (value << BitOffset<Mask>);
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
* @class RegisterGroup
|
||||
@ -406,6 +486,7 @@ struct RegisterMask
|
||||
* each register.
|
||||
*/
|
||||
template<typename... Registers>
|
||||
requires(IsRegister<Registers>, ...)
|
||||
class RegisterGroup
|
||||
{
|
||||
public:
|
||||
@ -415,6 +496,8 @@ public:
|
||||
* only written once.
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesSomeRegister<Masks, Registers...>, ...))
|
||||
static void set() {
|
||||
apply<Masks...>([](auto r, auto m) { return r | m; });
|
||||
}
|
||||
@ -425,6 +508,8 @@ public:
|
||||
* Only reads and writes each register once; see set().
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesSomeRegister<Masks, Registers...>, ...))
|
||||
static void clear() {
|
||||
apply<Masks...>([](auto r, auto m) { return r & ~m; });
|
||||
}
|
||||
@ -435,6 +520,8 @@ public:
|
||||
* Only reads and writes each register once; see set().
|
||||
*/
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesSomeRegister<Masks, Registers...>, ...))
|
||||
static void toggle() {
|
||||
apply<Masks...>([](auto r, auto m) { return r ^ m; });
|
||||
}
|
||||
@ -453,6 +540,8 @@ public:
|
||||
|
||||
private:
|
||||
template<typename... Masks>
|
||||
requires((IsRegisterMask<Masks>, ...) &&
|
||||
(UsesSomeRegister<Masks, Registers...>, ...))
|
||||
static void apply(auto fn) {
|
||||
(Registers::template apply<Masks...>(fn), ...);
|
||||
}
|
||||
@ -465,6 +554,7 @@ private:
|
||||
* register.
|
||||
*/
|
||||
template<typename... RegMasks>
|
||||
requires(IsRegisterMask<RegMasks>, ...)
|
||||
constexpr auto Masks = (RegMasks::mask | ...);
|
||||
|
||||
#ifdef FUNREG_ENABLE_EXTERNAL_IO
|
||||
@ -501,4 +591,3 @@ using MemRegister = Register<T, Addr>;
|
||||
} // namespace fr
|
||||
|
||||
#endif // FUNCTIONAL_REGISTER_IO_H
|
||||
|
||||
|
||||
@ -1,2 +0,0 @@
|
||||
all:
|
||||
g++ -o main main.cpp pugixml/src/pugixml.cpp -I pugixml/src -std=c++20
|
||||
@ -1,14 +0,0 @@
|
||||
# svd2funreg
|
||||
|
||||
This utility parses an SVD file and produces its funreg implementation.
|
||||
|
||||
Compile using `make`, though be sure to fetch the `pugixml` submodule first.
|
||||
|
||||
## Usage
|
||||
|
||||
```
|
||||
./main STM32L476.svd > stm32l476.h
|
||||
```
|
||||
|
||||
Replace the SVD and H files with those of your choosing.
|
||||
|
||||
@ -1,166 +0,0 @@
|
||||
#include "pugixml.hpp"
|
||||
|
||||
#include <cctype>
|
||||
#include <cstdint>
|
||||
#include <cstdlib>
|
||||
#include <iostream>
|
||||
#include <map>
|
||||
#include <string>
|
||||
#include <vector>
|
||||
|
||||
struct Field {
|
||||
std::string reg;
|
||||
std::string name;
|
||||
int offset;
|
||||
int width;
|
||||
|
||||
Field() = default;
|
||||
Field(const char *r, const pugi::xml_node& node);
|
||||
void operator()();
|
||||
};
|
||||
|
||||
struct Register {
|
||||
std::string name;
|
||||
int offset;
|
||||
int size;
|
||||
|
||||
std::vector<Field> fields;
|
||||
|
||||
Register() = default;
|
||||
Register(std::string peri, const pugi::xml_node& node);
|
||||
void operator()(uint32_t base);
|
||||
};
|
||||
|
||||
struct Peripheral {
|
||||
std::string name;
|
||||
std::string group;
|
||||
uint32_t base;
|
||||
|
||||
std::vector<Register> registers;
|
||||
|
||||
Peripheral() = default;
|
||||
Peripheral(const pugi::xml_node& node);
|
||||
Peripheral(const pugi::xml_node& node, const Peripheral& derived);
|
||||
void operator()();
|
||||
};
|
||||
|
||||
std::map<std::string, Peripheral> device;
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
if (argc < 2)
|
||||
return -1;
|
||||
|
||||
pugi::xml_document doc;
|
||||
pugi::xml_parse_result result = doc.load_file(argv[1]);
|
||||
if (!result)
|
||||
return -1;
|
||||
|
||||
for (auto node : doc.child("device")
|
||||
.child("peripherals")
|
||||
.children("peripheral"))
|
||||
{
|
||||
const auto df = node.attribute("derivedFrom");
|
||||
Peripheral p = df ? Peripheral {node, device[df.value()]} : Peripheral {node};
|
||||
|
||||
device[p.name] = p;
|
||||
}
|
||||
|
||||
std::cout << std::hex;
|
||||
std::cout << "#include \"funreg.hpp\"\n\n"
|
||||
<< "namespace " << doc.child("device").child_value("name")
|
||||
<< " {\n"
|
||||
<< " using namespace fr;\n";
|
||||
|
||||
for (auto& [_, p] : device) p();
|
||||
|
||||
std::cout << "}\n";
|
||||
}
|
||||
|
||||
Field::Field(const char *r, const pugi::xml_node& node):
|
||||
reg(r),
|
||||
name(node.child_value("name")),
|
||||
offset(std::strtol(node.child_value("bitOffset"), nullptr, 0)),
|
||||
width(std::strtol(node.child_value("bitWidth"), nullptr, 0))
|
||||
{
|
||||
if (name == reg)
|
||||
name = "val";
|
||||
}
|
||||
|
||||
void Field::operator()()
|
||||
{
|
||||
std::cout << " using " << name << " = RegisterMask<"
|
||||
<< reg << ", (0x" << (1 << width) - 1 << "u << 0x" << offset << "u)>;\n";
|
||||
}
|
||||
|
||||
Register::Register(std::string peri, const pugi::xml_node& node):
|
||||
name(node.child_value("name")),
|
||||
offset(std::strtol(node.child_value("addressOffset"), nullptr, 0)),
|
||||
size(std::strtol(node.child_value("size"), nullptr, 0))
|
||||
{
|
||||
if (isdigit(peri.back())) {
|
||||
if (name.starts_with(name.substr(0, name.size() - 1))
|
||||
&& name.at(peri.size() - 1) == '_')
|
||||
{
|
||||
name = name.substr(peri.size());
|
||||
}
|
||||
} else {
|
||||
if (name.starts_with(name.substr(0, name.size()))
|
||||
&& name.at(peri.size()) == '_')
|
||||
{
|
||||
name = name.substr(peri.size() + 1);
|
||||
}
|
||||
}
|
||||
|
||||
for (auto n : node.child("fields").children("field"))
|
||||
fields.emplace_back(name.c_str(), n);
|
||||
}
|
||||
|
||||
void Register::operator()(uint32_t base)
|
||||
{
|
||||
std::cout << " struct " << name << " : public MemRegister<";
|
||||
switch (size) {
|
||||
case 8: std::cout << "uint8_t, "; break;
|
||||
case 16: std::cout << "uint16_t, "; break;
|
||||
case 32:
|
||||
default: std::cout << "uint32_t, "; break;
|
||||
}
|
||||
std::cout << "0x" << base + offset << "> {\n";
|
||||
|
||||
for (auto& f : fields) f();
|
||||
|
||||
std::cout << " };\n";
|
||||
}
|
||||
|
||||
Peripheral::Peripheral(const pugi::xml_node& node):
|
||||
name(node.child_value("name")),
|
||||
base(std::strtol(node.child_value("baseAddress"), nullptr, 0))
|
||||
{
|
||||
for (auto n : node.child("registers").children("register")) {
|
||||
registers.emplace_back(name, n);
|
||||
group += registers.back().name;
|
||||
group += ", ";
|
||||
}
|
||||
}
|
||||
|
||||
Peripheral::Peripheral(const pugi::xml_node& node, const Peripheral& derived):
|
||||
name(node.child_value("name")),
|
||||
base(std::strtol(node.child_value("baseAddress"), nullptr, 0)),
|
||||
registers(derived.registers)
|
||||
{
|
||||
for (auto& r : registers) {
|
||||
group += r.name;
|
||||
group += ", ";
|
||||
}
|
||||
}
|
||||
|
||||
void Peripheral::operator()()
|
||||
{
|
||||
std::cout << " namespace " << name << " {\n";
|
||||
|
||||
for (auto& r : registers) r(base);
|
||||
|
||||
std::cout << " using ALL = RegisterGroup<" << group.substr(0, group.size() - 2) << ">;\n";
|
||||
std::cout << " }\n";
|
||||
}
|
||||
|
||||
@ -1 +0,0 @@
|
||||
Subproject commit a305d01bc8dd3f3708c4ee80be8c87dfb51e13ad
|
||||
Loading…
x
Reference in New Issue
Block a user