clyne/nucleo-l476rg-examples
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run at 48mhz

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Clyne 2023-04-15 12:50:32 -04:00
parent de6256dd45
commit f2be4e3b45
1 changed files with 6 additions and 1 deletions
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7
02-dac/main.c
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@ -7,6 +7,11 @@ unsigned int adc_read(void);
int main(void)
{
while ((RCC->CR & 0x00000002) == 0) {;} // wait till MSI is ready
FLASH->ACR |= 2; // Add two wait-states for 48MHz operation
RCC->CR = (RCC->CR & ~0x000000F0) | 0x000000B0 | RCC_CR_MSIRGSEL; // Switch to 48 MHz clock
while ((RCC->CR & 0x00000002) == 0) {;} // wait till MSI is ready
adc_init();
// DAC initialization:
@ -29,7 +34,7 @@ int main(void)
yprev = y;
// Add some delay between samples
for (int i = 0; i < 100; ++i);
//for (int i = 0; i < 100; ++i);
}
}