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93 lines
3.2 KiB
C
93 lines
3.2 KiB
C
#include <stm32l476xx.h>
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// Initializes the ADC for reading from channel one.
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void adc_init(void);
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// Does an ADC conversion on channel one and returns the result.
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unsigned int adc_read(void);
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int main(void)
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{
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while ((RCC->CR & 0x00000002) == 0) {;} // wait till MSI is ready
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FLASH->ACR |= 2; // Add two wait-states for 48MHz operation
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RCC->CR = (RCC->CR & ~0x000000F0) | 0x000000B0 | RCC_CR_MSIRGSEL; // Switch to 48 MHz clock
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while ((RCC->CR & 0x00000002) == 0) {;} // wait till MSI is ready
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adc_init();
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// DAC initialization:
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// Enables DAC channel one on PA4
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// Does not configure a hardware or software trigger, so DAC updates
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// when its data register is written.
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RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN;
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RCC->APB1ENR1 |= RCC_APB1ENR1_DAC1EN;
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DAC1->CR = DAC_CR_EN1;
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// Execute a first-order IIR filter in a loop: y[n] = a*y[n-1] + b*x[n]
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const float a = 0.5f;
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const float b = 0.5f;
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unsigned int yprev = 0; // y[n-1]
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while (1) {
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unsigned int x = adc_read();
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unsigned int y = a * yprev + b * x;
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DAC1->DHR12R1 = y;
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yprev = y;
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// Add some delay between samples
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//for (int i = 0; i < 100; ++i);
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}
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}
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void adc_init(void)
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{
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// Use the CCIPR register to select the system clock as a source for the
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// ADC clock, then enable the ADC clock through the AHB.
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RCC->CCIPR &= ~(RCC_CCIPR_ADCSEL_Msk);
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RCC->CCIPR |= 3 << RCC_CCIPR_ADCSEL_Pos;
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RCC->AHB2ENR |= RCC_AHB2ENR_ADCEN;
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// Enable the ADC's internal voltage regulator, with a delay for its
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// startup time.
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// ADVREGEN requires some bits in the CR register to be zero before being
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// set, so we clear CR to zero first.
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ADC1->CR = 0;
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ADC1->CR = ADC_CR_ADVREGEN;
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for (int i = 0; i < 100; ++i);
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// Clear DIFSEL to do single-ended conversions.
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ADC1->DIFSEL = 0;
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// Begin a single-ended calibration and wait for it to complete.
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// If the clock source for the ADC is not correctly configured, the
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// processor may get stuck in the while loop.
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ADC1->CR &= ~(ADC_CR_ADCALDIF); // Select single-ended calibration
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ADC1->CR |= ADC_CR_ADCAL;
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while ((ADC1->CR & ADC_CR_ADCAL) != 0);
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// Enable the ADC and wait for it to be ready.
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ADC1->CR |= ADC_CR_ADEN;
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while ((ADC1->ISR & ADC_ISR_ADRDY) == 0);
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// GPIO pin PC3 will be used as our ADC input.
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// In order: enable the GPIOC clock, set PC3 to analog input mode,
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// connect ADC channel one to its GPIO pin (PC3).
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RCC->AHB2ENR |= RCC_AHB2ENR_GPIOCEN;
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GPIOC->MODER |= 3 << GPIO_MODER_MODE0_Pos;
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GPIOC->ASCR |= 1 << 0;
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// Make channel one the first in the ADC's read sequence.
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// Using '=' here also clears the L field of the register, giving the
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// sequence a length of one.
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ADC1->SQR1 = 1 << ADC_SQR1_SQ1_Pos;
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}
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unsigned int adc_read(void)
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{
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ADC1->CFGR &= ~(ADC_CFGR_CONT); // Single conversion
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ADC1->CR |= ADC_CR_ADSTART; // Start converting
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while ((ADC1->ISR & ADC_ISR_EOC) == 0); // Wait for end-of-conversion
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ADC1->ISR &= ~(ADC_ISR_EOC); // Clear the status flag
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return ADC1->DR; // Read the result
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}
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