diff options
| author | Clyne Sullivan <tullivan99@gmail.com> | 2019-02-28 17:04:22 -0500 |
|---|---|---|
| committer | Clyne Sullivan <tullivan99@gmail.com> | 2019-02-28 17:04:22 -0500 |
| commit | d6869d1ec4bd24cd2c3eafa534f0849b25ec5607 (patch) | |
| tree | 79e54ed27b39c31864895535d11399708d5a45c0 /arduino/cores/nRF5/sysview/Config | |
| parent | 614ee97bf3a2270c413527a7f35c54cbecd9e601 (diff) | |
added basic code
Diffstat (limited to 'arduino/cores/nRF5/sysview/Config')
| -rwxr-xr-x | arduino/cores/nRF5/sysview/Config/Global.h | 102 | ||||
| -rwxr-xr-x | arduino/cores/nRF5/sysview/Config/SEGGER_RTT_Conf.h | 332 | ||||
| -rwxr-xr-x | arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Conf.h | 174 | ||||
| -rwxr-xr-x | arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c | 63 |
4 files changed, 671 insertions, 0 deletions
diff --git a/arduino/cores/nRF5/sysview/Config/Global.h b/arduino/cores/nRF5/sysview/Config/Global.h new file mode 100755 index 0000000..7a819cb --- /dev/null +++ b/arduino/cores/nRF5/sysview/Config/Global.h @@ -0,0 +1,102 @@ +/*********************************************************************
+* SEGGER Microcontroller GmbH & Co. KG *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER SystemView * Real-time application analysis *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+* *
+* SystemView version: V2.52d *
+* *
+**********************************************************************
+----------------------------------------------------------------------
+File : Global.h
+Purpose : Global types
+ In case your application already has a Global.h, you should
+ merge the files. In order to use Segger code, the types
+ U8, U16, U32, I8, I16, I32 need to be defined in Global.h;
+ additional definitions do not hurt.
+---------------------------END-OF-HEADER------------------------------
+*/
+
+#ifndef GLOBAL_H // Guard against multiple inclusion
+#define GLOBAL_H
+
+#define U8 unsigned char
+#define U16 unsigned short
+#define U32 unsigned long
+#define I8 signed char
+#define I16 signed short
+#define I32 signed long
+
+#ifdef _WIN32
+ //
+ // Microsoft VC6 compiler related
+ //
+ #define U64 unsigned __int64
+ #define U128 unsigned __int128
+ #define I64 __int64
+ #define I128 __int128
+ #if _MSC_VER <= 1200
+ #define U64_C(x) x##UI64
+ #else
+ #define U64_C(x) x##ULL
+ #endif
+#else
+ //
+ // C99 compliant compiler
+ //
+ #define U64 unsigned long long
+ #define I64 signed long long
+ #define U64_C(x) x##ULL
+#endif
+
+#endif // Avoid multiple inclusion
+
+/*************************** End of file ****************************/
diff --git a/arduino/cores/nRF5/sysview/Config/SEGGER_RTT_Conf.h b/arduino/cores/nRF5/sysview/Config/SEGGER_RTT_Conf.h new file mode 100755 index 0000000..bc4473d --- /dev/null +++ b/arduino/cores/nRF5/sysview/Config/SEGGER_RTT_Conf.h @@ -0,0 +1,332 @@ +/*********************************************************************
+* SEGGER Microcontroller GmbH & Co. KG *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER SystemView * Real-time application analysis *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+* *
+* SystemView version: V2.52d *
+* *
+**********************************************************************
+---------------------------END-OF-HEADER------------------------------
+File : SEGGER_RTT_Conf.h
+Purpose : Implementation of SEGGER real-time transfer (RTT) which
+ allows real-time communication on targets which support
+ debugger memory accesses while the CPU is running.
+Revision: $Rev: 12706 $
+
+*/
+
+#ifndef SEGGER_RTT_CONF_H
+#define SEGGER_RTT_CONF_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+ #include <intrinsics.h>
+#endif
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+
+#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
+#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
+
+#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
+#define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
+
+#define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
+
+#define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
+
+#define USE_RTT_ASM (0) // Use assembler version of SEGGER_RTT.c when 1
+
+/*********************************************************************
+*
+* RTT memcpy configuration
+*
+* memcpy() is good for large amounts of data,
+* but the overhead is big for small amounts, which are usually stored via RTT.
+* With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
+*
+* SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
+* This is may be required with memory access restrictions,
+* such as on Cortex-A devices with MMU.
+*/
+#define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
+//
+// Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
+//
+//#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
+// #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
+//#endif
+
+//
+// Target is not allowed to perform other RTT operations while string still has not been stored completely.
+// Otherwise we would probably end up with a mixed string in the buffer.
+// If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
+//
+// SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
+// Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
+// When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
+// (Higher priority = lower priority number)
+// Default value for embOS: 128u
+// Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+// In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
+// or define SEGGER_RTT_LOCK() to completely disable interrupts.
+//
+
+#define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (2 << 5) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
+
+/*********************************************************************
+*
+* RTT lock configuration for SEGGER Embedded Studio,
+* Rowley CrossStudio and GCC
+*/
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)
+ #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs %0, primask \n\t" \
+ "mov r1, $1 \n\t" \
+ "msr primask, r1 \n\t" \
+ : "=r" (LockState) \
+ : \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
+ : \
+ : "r" (LockState) \
+ : \
+ ); \
+ }
+
+ #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs %0, basepri \n\t" \
+ "mov r1, %1 \n\t" \
+ "msr basepri, r1 \n\t" \
+ : "=r" (LockState) \
+ : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
+ : \
+ : "r" (LockState) \
+ : \
+ ); \
+ }
+
+ #elif defined(__ARM_ARCH_7A__)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ __asm volatile ("mrs r1, CPSR \n\t" \
+ "mov %0, r1 \n\t" \
+ "orr r1, r1, #0xC0 \n\t" \
+ "msr CPSR_c, r1 \n\t" \
+ : "=r" (LockState) \
+ : \
+ : "r1" \
+ );
+
+ #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
+ "mrs r1, CPSR \n\t" \
+ "bic r1, r1, #0xC0 \n\t" \
+ "and r0, r0, #0xC0 \n\t" \
+ "orr r1, r1, r0 \n\t" \
+ "msr CPSR_c, r1 \n\t" \
+ : \
+ : "r" (LockState) \
+ : "r0", "r1" \
+ ); \
+ }
+#else
+ #define SEGGER_RTT_LOCK()
+ #define SEGGER_RTT_UNLOCK()
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR EWARM
+*/
+#ifdef __ICCARM__
+ #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_PRIMASK(); \
+ __set_PRIMASK(1);
+
+ #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
+ }
+ #elif ((defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || (defined (__ARM7M__) && (__CORE__ == __ARM7M__)))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_BASEPRI(); \
+ __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+ #define SEGGER_RTT_UNLOCK() __set_BASEPRI(LockState); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR RX
+*/
+#ifdef __ICCRX__
+ #define SEGGER_RTT_LOCK() { \
+ unsigned long LockState; \
+ LockState = __get_interrupt_state(); \
+ __disable_interrupt();
+
+ #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
+ }
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for IAR RL78
+*/
+#ifdef __ICCRL78__
+ #define SEGGER_RTT_LOCK() { \
+ __istate_t LockState; \
+ LockState = __get_interrupt_state(); \
+ __disable_interrupt();
+
+ #define SEGGER_RTT_UNLOCK() __set_interrupt_state(LockState); \
+ }
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for KEIL ARM
+*/
+#ifdef __CC_ARM
+ #if (defined __TARGET_ARCH_6S_M)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ register unsigned char PRIMASK __asm( "primask"); \
+ LockState = PRIMASK; \
+ PRIMASK = 1u; \
+ __schedule_barrier();
+
+ #define SEGGER_RTT_UNLOCK() PRIMASK = LockState; \
+ __schedule_barrier(); \
+ }
+ #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ register unsigned char BASEPRI __asm( "basepri"); \
+ LockState = BASEPRI; \
+ BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
+ __schedule_barrier();
+
+ #define SEGGER_RTT_UNLOCK() BASEPRI = LockState; \
+ __schedule_barrier(); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration for TI ARM
+*/
+#ifdef __TI_ARM__
+ #if defined (__TI_ARM_V6M0__)
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = __get_PRIMASK(); \
+ __set_PRIMASK(1);
+
+ #define SEGGER_RTT_UNLOCK() __set_PRIMASK(LockState); \
+ }
+ #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
+ #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
+ #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
+ #endif
+ #define SEGGER_RTT_LOCK() { \
+ unsigned int LockState; \
+ LockState = OS_GetBASEPRI(); \
+ OS_SetBASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
+
+ #define SEGGER_RTT_UNLOCK() OS_SetBASEPRI(LockState); \
+ }
+ #endif
+#endif
+
+/*********************************************************************
+*
+* RTT lock configuration fallback
+*/
+#ifndef SEGGER_RTT_LOCK
+ #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
+#endif
+
+#ifndef SEGGER_RTT_UNLOCK
+ #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
+#endif
+
+#endif
+/*************************** End of file ****************************/
diff --git a/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Conf.h b/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Conf.h new file mode 100755 index 0000000..98c35f8 --- /dev/null +++ b/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Conf.h @@ -0,0 +1,174 @@ +/*********************************************************************
+* SEGGER Microcontroller GmbH & Co. KG *
+* The Embedded Experts *
+**********************************************************************
+* *
+* (c) 2015 - 2017 SEGGER Microcontroller GmbH & Co. KG *
+* *
+* www.segger.com Support: support@segger.com *
+* *
+**********************************************************************
+* *
+* SEGGER SystemView * Real-time application analysis *
+* *
+**********************************************************************
+* *
+* All rights reserved. *
+* *
+* SEGGER strongly recommends to not make any changes *
+* to or modify the source code of this software in order to stay *
+* compatible with the RTT protocol and J-Link. *
+* *
+* Redistribution and use in source and binary forms, with or *
+* without modification, are permitted provided that the following *
+* conditions are met: *
+* *
+* o Redistributions of source code must retain the above copyright *
+* notice, this list of conditions and the following disclaimer. *
+* *
+* o Redistributions in binary form must reproduce the above *
+* copyright notice, this list of conditions and the following *
+* disclaimer in the documentation and/or other materials provided *
+* with the distribution. *
+* *
+* o Neither the name of SEGGER Microcontroller GmbH & Co. KG *
+* nor the names of its contributors may be used to endorse or *
+* promote products derived from this software without specific *
+* prior written permission. *
+* *
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
+* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+* DAMAGE. *
+* *
+**********************************************************************
+* *
+* SystemView version: V2.52d *
+* *
+**********************************************************************
+-------------------------- END-OF-HEADER -----------------------------
+
+File : SEGGER_SYSVIEW_Conf.h
+Purpose : SEGGER SystemView configuration.
+Revision: $Rev: 12706 $
+*/
+
+#ifndef SEGGER_SYSVIEW_CONF_H
+#define SEGGER_SYSVIEW_CONF_H
+
+/*********************************************************************
+*
+* Defines, fixed
+*
+**********************************************************************
+*/
+//
+// Constants for known core configuration
+//
+#define SEGGER_SYSVIEW_CORE_OTHER 0
+#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1
+#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7
+#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX
+
+#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__)
+ #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__ICCARM__)
+ #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__CC_ARM)
+ #if (defined(__TARGET_ARCH_6S_M))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__TI_ARM__)
+ #ifdef __TI_ARM_V6M0__
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
+ #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
+ #endif
+#elif defined(__ICCRX__)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#elif defined(__RX)
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
+#endif
+
+#ifndef SEGGER_SYSVIEW_CORE
+ #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
+#endif
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+/*********************************************************************
+*
+* SystemView buffer configuration
+*/
+#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 1024 // Number of bytes that SystemView uses for the buffer.
+#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection
+
+#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack
+
+#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode
+
+/*********************************************************************
+*
+* SystemView timestamp configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+ #define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter.
+ #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source
+#else
+ #define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function
+ #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp()
+#endif
+
+/*********************************************************************
+*
+* SystemView Id configuration
+*/
+#define SEGGER_SYSVIEW_ID_BASE 0x10000000 // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM)
+#define SEGGER_SYSVIEW_ID_SHIFT 2 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned)
+
+/*********************************************************************
+*
+* SystemView interrupt configuration
+*/
+#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
+#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
+ #if defined(__ICCARM__)
+ #if (__VER__ > 6100000)
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
+ #else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access.
+ #endif
+ #else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
+ #endif
+#else
+ #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
+#endif
+
+#endif // SEGGER_SYSVIEW_CONF_H
+
+/*************************** End of file ****************************/
diff --git a/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c b/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c new file mode 100755 index 0000000..ed9a02b --- /dev/null +++ b/arduino/cores/nRF5/sysview/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c @@ -0,0 +1,63 @@ +/*********************************************************************
+* (c) 1995 - 2018 SEGGER Microcontroller GmbH *
+* The Embedded Experts *
+* www.segger.com *
+**********************************************************************
+
+-------------------------- END-OF-HEADER -----------------------------
+
+File : SEGGER_SYSVIEW_Config_FreeRTOS.c
+Purpose : Sample setup configuration of SystemView with FreeRTOS.
+Revision: $Rev: 7745 $
+*/
+#include "FreeRTOS.h"
+#include "SEGGER_SYSVIEW.h"
+
+extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI;
+
+/*********************************************************************
+*
+* Defines, configurable
+*
+**********************************************************************
+*/
+// The application name to be displayed in SystemViewer
+#define SYSVIEW_APP_NAME "Adafruit Bluefruit"
+
+// The target device name
+#define SYSVIEW_DEVICE_NAME "nRF52"
+
+// Frequency of the timestamp. Must match SEGGER_SYSVIEW_GET_TIMESTAMP in SEGGER_SYSVIEW_Conf.h
+#define SYSVIEW_TIMESTAMP_FREQ (configCPU_CLOCK_HZ)
+
+// System Frequency. SystemcoreClock is used in most CMSIS compatible projects.
+#define SYSVIEW_CPU_FREQ configCPU_CLOCK_HZ
+
+// The lowest RAM address used for IDs (pointers)
+#define SYSVIEW_RAM_BASE (0x20000000)
+
+/*********************************************************************
+*
+* _cbSendSystemDesc()
+*
+* Function description
+* Sends SystemView description strings.
+*/
+static void _cbSendSystemDesc(void) {
+ SEGGER_SYSVIEW_SendSysDesc("N="SYSVIEW_APP_NAME",D="SYSVIEW_DEVICE_NAME",O=FreeRTOS");
+ SEGGER_SYSVIEW_SendSysDesc("I#15=SysTick");
+}
+
+/*********************************************************************
+*
+* Global functions
+*
+**********************************************************************
+*/
+void SEGGER_SYSVIEW_Conf(void) {
+ SEGGER_SYSVIEW_Init(SYSVIEW_TIMESTAMP_FREQ, SYSVIEW_CPU_FREQ,
+ &SYSVIEW_X_OS_TraceAPI, _cbSendSystemDesc);
+ SEGGER_SYSVIEW_SetRAMBase(SYSVIEW_RAM_BASE);
+}
+
+/*************************** End of file ****************************/
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