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@ -181,19 +181,19 @@ void ADC::setRate(SClock::Rate rate)
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adcStart(m_driver, &m_config);
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#elif defined(TARGET_PLATFORM_L4)
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std::array<std::array<uint32_t, 3>, 6> m_rate_presets = {{
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// Rate PLLSAI2N R OVERSAMPLE
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{/* 8k */ 16, 3, 1},
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{/* 16k */ 32, 3, 1},
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{/* 20k */ 40, 3, 1},
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{/* 32k */ 64, 3, 1},
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{/* 48k */ 24, 3, 0},
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{/* 96k */ 48, 3, 0}
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// Rate PLLSAI2N R SMPR
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{/* 8k */ 8, 1, ADC_SMPR_SMP_12P5},
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{/* 16k */ 16, 1, ADC_SMPR_SMP_12P5},
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{/* 20k */ 20, 1, ADC_SMPR_SMP_12P5},
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{/* 32k */ 32, 1, ADC_SMPR_SMP_12P5},
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{/* 48k */ 24, 0, ADC_SMPR_SMP_12P5},
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{/* 96k */ 73, 1, ADC_SMPR_SMP_6P5} // Technically 96.05263kS/s
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}};
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auto& preset = m_rate_presets[static_cast<int>(rate)];
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auto pllnr = (preset[0] << RCC_PLLSAI2CFGR_PLLSAI2N_Pos) |
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(preset[1] << RCC_PLLSAI2CFGR_PLLSAI2R_Pos);
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bool oversample = preset[2] != 0;
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auto smpr = preset[2];
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// Adjust PLLSAI2
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RCC->CR &= ~(RCC_CR_PLLSAI2ON);
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@ -202,9 +202,11 @@ void ADC::setRate(SClock::Rate rate)
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RCC->CR |= RCC_CR_PLLSAI2ON;
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while ((RCC->CR & RCC_CR_PLLSAI2RDY) != RCC_CR_PLLSAI2RDY);
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m_group_config.smpr[0] = ADC_SMPR1_SMP_AN5(smpr);
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// Set 2x oversampling
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m_group_config.cfgr2 = oversample ? ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1 : 0;
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m_group_config2.cfgr2 = oversample ? ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1 : 0;
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m_group_config.cfgr2 = ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1;
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m_group_config2.cfgr2 = ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1;
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#endif
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}
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