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@ -42,17 +42,17 @@
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#define STM32_VOS STM32_VOS_RANGE1
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI16_ENABLED FALSE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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#define STM32_MSIPLL_ENABLED TRUE
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#define STM32_MSIRANGE STM32_MSIRANGE_48M
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#define STM32_LSE_ENABLED FALSE
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#define STM32_MSIPLL_ENABLED FALSE
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#define STM32_MSIRANGE STM32_MSIRANGE_8M
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#define STM32_MSISRANGE STM32_MSISRANGE_4M
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI16
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#define STM32_PLLM_VALUE 4
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#define STM32_PLLN_VALUE 80
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#define STM32_PLLSRC STM32_PLLSRC_MSI
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#define STM32_PLLM_VALUE 2
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#define STM32_PLLN_VALUE 72
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#define STM32_PLLP_VALUE 7
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#define STM32_PLLQ_VALUE 6
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#define STM32_PLLR_VALUE 4
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@ -63,13 +63,13 @@
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#define STM32_MCOPRE STM32_MCOPRE_DIV1
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#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
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#define STM32_PLLSAI1N_VALUE 44
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#define STM32_PLLSAI1N_VALUE 24
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#define STM32_PLLSAI1P_VALUE 7
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#define STM32_PLLSAI1Q_VALUE 6
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#define STM32_PLLSAI1R_VALUE 8
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#define STM32_PLLSAI2N_VALUE 72
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#define STM32_PLLSAI1Q_VALUE 2
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#define STM32_PLLSAI1R_VALUE 4
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#define STM32_PLLSAI2N_VALUE 24
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#define STM32_PLLSAI2P_VALUE 7
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#define STM32_PLLSAI2R_VALUE 6
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#define STM32_PLLSAI2R_VALUE 2
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/*
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* Peripherals clock sources.
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@ -87,7 +87,7 @@
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#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
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#define STM32_SAI1SEL STM32_SAI1SEL_OFF
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#define STM32_SAI2SEL STM32_SAI2SEL_OFF
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#define STM32_CLK48SEL STM32_CLK48SEL_MSI
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#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
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#define STM32_ADCSEL STM32_ADCSEL_PLLSAI1
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#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
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#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
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