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@ -18,7 +18,7 @@ constexpr static const ADCConfig adc_config = {
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.difsel = 0
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};
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void adc_read_callback(ADCDriver *);
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static void adc_read_callback(ADCDriver *);
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/*constexpr*/ static ADCConversionGroup adc_group_config = {
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.circular = false,
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@ -46,61 +46,64 @@ constexpr static const GPTConfig gpt_config = {
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static bool adc_is_read_finished = false;
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void adc_init()
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{
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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gptStart(gptd, &gpt_config);
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adcStart(adcd, &adc_config);
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adcSTM32EnableVREF(adcd);
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}
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adcsample_t *adc_read(adcsample_t *buffer, size_t count)
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{
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adc_is_read_finished = false;
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adcStartConversion(adcd, &adc_group_config, buffer, count);
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gptStartContinuous(gptd, 100); // 10kHz
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while (!adc_is_read_finished);
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return buffer;
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}
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void adc_read_callback([[maybe_unused]] ADCDriver *driver)
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{
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gptStopTimer(gptd);
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adc_is_read_finished = true;
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}
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void adc_set_rate(ADCRate rate)
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namespace adc
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{
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uint32_t val = 0;
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switch (rate) {
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case ADCRate::R2P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
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break;
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case ADCRate::R6P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_6P5);
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break;
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case ADCRate::R12P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5);
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break;
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case ADCRate::R24P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5);
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break;
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case ADCRate::R47P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_47P5);
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break;
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case ADCRate::R92P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_92P5);
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break;
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case ADCRate::R247P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5);
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break;
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case ADCRate::R640P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_640P5);
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break;
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void init()
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{
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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gptStart(gptd, &gpt_config);
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adcStart(adcd, &adc_config);
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adcSTM32EnableVREF(adcd);
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}
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adcsample_t *read(adcsample_t *buffer, size_t count)
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{
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adc_is_read_finished = false;
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adcStartConversion(adcd, &adc_group_config, buffer, count);
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gptStartContinuous(gptd, 100); // 10kHz
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while (!adc_is_read_finished);
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return buffer;
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}
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void set_rate(rate r)
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{
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uint32_t val = 0;
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switch (r) {
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case rate::R2P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
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break;
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case rate::R6P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_6P5);
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break;
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case rate::R12P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5);
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break;
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case rate::R24P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5);
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break;
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case rate::R47P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_47P5);
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break;
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case rate::R92P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_92P5);
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break;
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case rate::R247P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5);
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break;
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case rate::R640P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_640P5);
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break;
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}
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adc_group_config.smpr[0] = val;
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}
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adc_group_config.smpr[0] = val;
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}
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