diff options
| author | Clyne Sullivan <clyne@clyne-lp.lan> | 2021-07-31 10:47:00 -0400 |
|---|---|---|
| committer | Clyne Sullivan <clyne@clyne-lp.lan> | 2021-07-31 10:47:00 -0400 |
| commit | 123cc4c756cc8a22f66351ab65595c5a20e53e27 (patch) | |
| tree | d12ee8cb3d91e08c422e5bd4b5cb01d7dd622b19 /source/board/board_l4.c | |
| parent | d24ed15843c328983f9ed20283f89624e8574b9f (diff) | |
reorganized source, wip
Diffstat (limited to 'source/board/board_l4.c')
| -rw-r--r-- | source/board/board_l4.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/source/board/board_l4.c b/source/board/board_l4.c index cd16e43..31d1d51 100644 --- a/source/board/board_l4.c +++ b/source/board/board_l4.c @@ -277,5 +277,28 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @note You can add your board-specific code here.
*/
void boardInit(void) {
+ palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetLineMode(LINE_LED_YELLOW, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetLineMode(LINE_LED_RED, PAL_MODE_OUTPUT_PUSHPULL);
+ SCB->CPACR |= 0xF << 20; // Enable FPU
+
+ // Region 2: Data for algorithm thread and ADC/DAC buffers
+ // Region 3: Code for algorithm thread
+ // Region 4: User algorithm code
+ mpuConfigureRegion(MPU_REGION_2,
+ 0x20008000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_128K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_3,
+ 0x0807F800,
+ MPU_RASR_ATTR_AP_RO_RO | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_2K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_4,
+ 0x10000000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_32K |
+ MPU_RASR_ENABLE);
}
|