diff options
| author | Clyne Sullivan <clyne@bitgloo.com> | 2022-04-30 08:41:56 -0400 |
|---|---|---|
| committer | Clyne Sullivan <clyne@bitgloo.com> | 2022-04-30 08:42:45 -0400 |
| commit | e164629b3839eee0fda0be0e0a9842e78cf02f2b (patch) | |
| tree | b72b58665b85a104e5b953af45f00579341b2802 /source/board | |
| parent | 162dd6de8a0d883962b0b1475f47cbb08e0958d4 (diff) | |
| parent | 3dd57491b1e81a9d93054eff19ca0e6c65c85b9b (diff) | |
merge in branch devel
Diffstat (limited to 'source/board')
| -rw-r--r-- | source/board/board_h7.c | 21 | ||||
| -rw-r--r-- | source/board/board_l4.c | 26 | ||||
| -rw-r--r-- | source/board/l4/board.h | 4 |
3 files changed, 51 insertions, 0 deletions
diff --git a/source/board/board_h7.c b/source/board/board_h7.c index 2868726..74285cf 100644 --- a/source/board/board_h7.c +++ b/source/board/board_h7.c @@ -262,5 +262,26 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @note You can add your board-specific code here.
*/
void boardInit(void) {
+ // Enable the FPU (floating-point unit)
+ SCB->CPACR |= 0xF << 20;
+ // Setup the MPU (memory protection unit):
+ // Region 2: Data for algorithm thread
+ // Region 3: Code for algorithm thread
+ // Region 4: User algorithm code
+ mpuConfigureRegion(MPU_REGION_2,
+ 0x20000000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_64K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_3,
+ 0x0807F800,
+ MPU_RASR_ATTR_AP_RO_RO | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_2K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_4,
+ 0x00000000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_64K |
+ MPU_RASR_ENABLE);
}
diff --git a/source/board/board_l4.c b/source/board/board_l4.c index cd16e43..55af697 100644 --- a/source/board/board_l4.c +++ b/source/board/board_l4.c @@ -277,5 +277,31 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) { * @note You can add your board-specific code here.
*/
void boardInit(void) {
+ palSetLineMode(LINE_LED_RED, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetLineMode(LINE_LED_GREEN, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetLineMode(LINE_LED_BLUE, PAL_MODE_OUTPUT_PUSHPULL);
+ palClearLine(LINE_LED_RED);
+ palClearLine(LINE_LED_GREEN);
+ palClearLine(LINE_LED_BLUE);
+ SCB->CPACR |= 0xF << 20; // Enable FPU
+
+ // Region 2: Data for algorithm thread and ADC/DAC buffers
+ // Region 3: Code for algorithm thread
+ // Region 4: User algorithm code
+ mpuConfigureRegion(MPU_REGION_2,
+ 0x20008000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_128K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_3,
+ 0x0807F800,
+ MPU_RASR_ATTR_AP_RO_RO | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_2K |
+ MPU_RASR_ENABLE);
+ mpuConfigureRegion(MPU_REGION_4,
+ 0x10000000,
+ MPU_RASR_ATTR_AP_RW_RW | MPU_RASR_ATTR_NON_CACHEABLE |
+ MPU_RASR_SIZE_32K |
+ MPU_RASR_ENABLE);
}
diff --git a/source/board/l4/board.h b/source/board/l4/board.h index 8291664..4b2642a 100644 --- a/source/board/l4/board.h +++ b/source/board/l4/board.h @@ -1502,4 +1502,8 @@ extern "C" { #endif
#endif /* _FROM_ASM_ */
+#define LINE_LED_RED PAL_LINE(GPIOC_BASE, 10U)
+#define LINE_LED_GREEN PAL_LINE(GPIOC_BASE, 11U)
+#define LINE_LED_BLUE PAL_LINE(GPIOC_BASE, 12U)
+
#endif /* BOARD_H */
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