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-rw-r--r--cfg/mcuconf.h26
1 files changed, 13 insertions, 13 deletions
diff --git a/cfg/mcuconf.h b/cfg/mcuconf.h
index cd6d0bb..520d609 100644
--- a/cfg/mcuconf.h
+++ b/cfg/mcuconf.h
@@ -42,17 +42,17 @@
#define STM32_VOS STM32_VOS_RANGE1
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
-#define STM32_HSI16_ENABLED TRUE
+#define STM32_HSI16_ENABLED FALSE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
-#define STM32_LSE_ENABLED TRUE
-#define STM32_MSIPLL_ENABLED TRUE
-#define STM32_MSIRANGE STM32_MSIRANGE_48M
+#define STM32_LSE_ENABLED FALSE
+#define STM32_MSIPLL_ENABLED FALSE
+#define STM32_MSIRANGE STM32_MSIRANGE_8M
#define STM32_MSISRANGE STM32_MSISRANGE_4M
#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSI16
-#define STM32_PLLM_VALUE 4
-#define STM32_PLLN_VALUE 80
+#define STM32_PLLSRC STM32_PLLSRC_MSI
+#define STM32_PLLM_VALUE 2
+#define STM32_PLLN_VALUE 72
#define STM32_PLLP_VALUE 7
#define STM32_PLLQ_VALUE 6
#define STM32_PLLR_VALUE 4
@@ -63,13 +63,13 @@
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
-#define STM32_PLLSAI1N_VALUE 44
+#define STM32_PLLSAI1N_VALUE 24
#define STM32_PLLSAI1P_VALUE 7
-#define STM32_PLLSAI1Q_VALUE 6
-#define STM32_PLLSAI1R_VALUE 8
-#define STM32_PLLSAI2N_VALUE 72
+#define STM32_PLLSAI1Q_VALUE 2
+#define STM32_PLLSAI1R_VALUE 4
+#define STM32_PLLSAI2N_VALUE 24
#define STM32_PLLSAI2P_VALUE 7
-#define STM32_PLLSAI2R_VALUE 6
+#define STM32_PLLSAI2R_VALUE 2
/*
* Peripherals clock sources.
@@ -87,7 +87,7 @@
#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
#define STM32_SAI1SEL STM32_SAI1SEL_OFF
#define STM32_SAI2SEL STM32_SAI2SEL_OFF
-#define STM32_CLK48SEL STM32_CLK48SEL_MSI
+#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
#define STM32_ADCSEL STM32_ADCSEL_PLLSAI1
#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2