1 files changed, 52 insertions, 49 deletions

diff --git a/source/adc.cpp b/source/adc.cpp
index 851b461..609ffce 100644
--- a/source/adc.cpp
+++ b/source/adc.cpp
@@ -18,7 +18,7 @@ constexpr static const ADCConfig adc_config = {
     .difsel = 0
 };
 
-void adc_read_callback(ADCDriver *);
+static void adc_read_callback(ADCDriver *);
 
 /*constexpr*/ static ADCConversionGroup adc_group_config = {
     .circular = false,
@@ -46,61 +46,64 @@ constexpr static const GPTConfig gpt_config = {
 
 static bool adc_is_read_finished = false;
 
-void adc_init()
-{
-    palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
-
-    gptStart(gptd, &gpt_config);
-    adcStart(adcd, &adc_config);
-    adcSTM32EnableVREF(adcd);
-}
-
-adcsample_t *adc_read(adcsample_t *buffer, size_t count)
-{
-    adc_is_read_finished = false;
-    adcStartConversion(adcd, &adc_group_config, buffer, count);
-    gptStartContinuous(gptd, 100); // 10kHz
-    while (!adc_is_read_finished);
-    return buffer;
-}
-
 void adc_read_callback([[maybe_unused]] ADCDriver *driver)
 {
     gptStopTimer(gptd);
     adc_is_read_finished = true;
 }
 
-void adc_set_rate(ADCRate rate)
+namespace adc
 {
-    uint32_t val = 0;
-
-    switch (rate) {
-    case ADCRate::R2P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
-        break;
-    case ADCRate::R6P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_6P5);
-        break;
-    case ADCRate::R12P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5);
-        break;
-    case ADCRate::R24P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5);
-        break;
-    case ADCRate::R47P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_47P5);
-        break;
-    case ADCRate::R92P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_92P5);
-        break;
-    case ADCRate::R247P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5);
-        break;
-    case ADCRate::R640P5:
-        val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_640P5);
-        break;
+    void init()
+    {
+        palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
+    
+        gptStart(gptd, &gpt_config);
+        adcStart(adcd, &adc_config);
+        adcSTM32EnableVREF(adcd);
+    }
+    
+    adcsample_t *read(adcsample_t *buffer, size_t count)
+    {
+        adc_is_read_finished = false;
+        adcStartConversion(adcd, &adc_group_config, buffer, count);
+        gptStartContinuous(gptd, 100); // 10kHz
+        while (!adc_is_read_finished);
+        return buffer;
+    }
+ 
+    void set_rate(rate r)
+    {
+        uint32_t val = 0;
+    
+        switch (r) {
+        case rate::R2P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
+            break;
+        case rate::R6P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_6P5);
+            break;
+        case rate::R12P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5);
+            break;
+        case rate::R24P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5);
+            break;
+        case rate::R47P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_47P5);
+            break;
+        case rate::R92P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_92P5);
+            break;
+        case rate::R247P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5);
+            break;
+        case rate::R640P5:
+            val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_640P5);
+            break;
+        }
+    
+        adc_group_config.smpr[0] = val;
     }
-
-    adc_group_config.smpr[0] = val;
 }