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96 lines
3.6 KiB
C
96 lines
3.6 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file SPC56ECxx/intc.h
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* @brief SPC56ECxx INTC module header.
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*
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* @addtogroup INTC
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* @{
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*/
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#ifndef INTC_H
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#define INTC_H
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/*===========================================================================*/
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/* Module constants. */
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/*===========================================================================*/
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/**
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* @name INTC addresses
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* @{
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*/
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#define INTC_BASE 0xFFF48000
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#define INTC_IACKR_ADDR (INTC_BASE + 0x10)
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#define INTC_EOIR_ADDR (INTC_BASE + 0x18)
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/** @} */
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/**
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* @brief INTC priority levels.
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*/
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#define INTC_PRIORITY_LEVELS 16U
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/*===========================================================================*/
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module macros. */
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/*===========================================================================*/
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/**
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* @name INTC-related macros
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* @{
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*/
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#define INTC_BCR (*((volatile uint32_t *)(INTC_BASE + 0)))
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#define INTC_CPR(n) (*((volatile uint32_t *)(INTC_BASE + 8 + ((n) * sizeof (uint32_t)))))
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#define INTC_IACKR(n) (*((volatile uint32_t *)(INTC_BASE + 0x10 + ((n) * sizeof (uint32_t)))))
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#define INTC_EOIR(n) (*((volatile uint32_t *)(INTC_BASE + 0x18 + ((n) * sizeof (uint32_t)))))
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#define INTC_PSR(n) (*((volatile uint8_t *)(INTC_BASE + 0x40 + ((n) * sizeof (uint8_t)))))
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/** @} */
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/**
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* @brief Core selection macros for PSR register.
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*/
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#define INTC_PSR_CORE0 0x00
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#define INTC_PSR_CORE1 0xC0
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#define INTC_PSR_CORES01 0x40
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/**
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* @brief PSR register content helper
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*/
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#define INTC_PSR_ENABLE(cores, prio) ((uint32_t)(cores) | (uint32_t)(prio))
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module inline functions. */
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/*===========================================================================*/
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#endif /* INTC_H */
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/** @} */
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