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124 lines
3.1 KiB
C++
124 lines
3.1 KiB
C++
/**
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* @file adc.cpp
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* @brief Manages signal reading through the ADC.
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*
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* Copyright (C) 2020 Clyne Sullivan
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*
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* Distributed under the GNU GPL v3 or later. You should have received a copy of
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* the GNU General Public License along with this program.
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* If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "adc.hpp"
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ADCDriver *ADC::m_driver = &ADCD3;
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const ADCConfig ADC::m_config = {
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.difsel = 0,
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.calibration = 0,
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};
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ADCConversionGroup ADC::m_group_config = {
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.circular = true,
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.num_channels = 1,
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.end_cb = ADC::conversionCallback,
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.error_cb = nullptr,
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.cfgr = ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(13), /* TIM6_TRGO */
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.cfgr2 = ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1, // Oversampling 2x
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.ccr = 0,
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.pcsel = 0,
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.ltr1 = 0, .htr1 = 0x0FFF,
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.ltr2 = 0, .htr2 = 0x0FFF,
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.ltr3 = 0, .htr3 = 0x0FFF,
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.smpr = {
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ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5), 0
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},
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.sqr = {
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ADC_SQR1_SQ1_N(ADC_CHANNEL_IN5),
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0, 0, 0
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},
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};
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std::array<std::array<uint32_t, 2>, 6> ADC::m_rate_presets = {{
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// Rate PLL N PLL P
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{/* 8k */ 80, 20},
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{/* 16k */ 80, 10},
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{/* 20k */ 80, 8},
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{/* 32k */ 80, 5},
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{/* 48k */ 96, 4},
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{/* 96k */ 288, 10}
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}};
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adcsample_t *ADC::m_current_buffer = nullptr;
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size_t ADC::m_current_buffer_size = 0;
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ADC::Operation ADC::m_operation = nullptr;
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void ADC::begin()
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{
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palSetPadMode(GPIOF, 3, PAL_MODE_INPUT_ANALOG);
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adcStart(m_driver, &m_config);
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adcSTM32EnableVREF(m_driver);
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}
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void ADC::start(adcsample_t *buffer, size_t count, Operation operation)
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{
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m_current_buffer = buffer;
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m_current_buffer_size = count;
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m_operation = operation;
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adcStartConversion(m_driver, &m_group_config, buffer, count);
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SClock::start();
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}
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void ADC::stop()
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{
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SClock::stop();
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adcStopConversion(m_driver);
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m_current_buffer = nullptr;
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m_current_buffer_size = 0;
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m_operation = nullptr;
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}
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void ADC::setRate(SClock::Rate rate)
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{
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auto& preset = m_rate_presets[static_cast<unsigned int>(rate)];
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auto pllbits = (preset[0] << RCC_PLL2DIVR_N2_Pos) |
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(preset[1] << RCC_PLL2DIVR_P2_Pos);
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adcStop(m_driver);
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// Adjust PLL2
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RCC->CR &= ~(RCC_CR_PLL2ON);
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while ((RCC->CR & RCC_CR_PLL2RDY) == RCC_CR_PLL2RDY);
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auto pll2divr = RCC->PLL2DIVR &
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~(RCC_PLL2DIVR_N2_Msk | RCC_PLL2DIVR_P2_Msk);
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pll2divr |= pllbits;
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RCC->PLL2DIVR = pll2divr;
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RCC->CR |= RCC_CR_PLL2ON;
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while ((RCC->CR & RCC_CR_PLL2RDY) != RCC_CR_PLL2RDY);
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m_group_config.smpr[0] = rate != SClock::Rate::R96K ? ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5)
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: ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
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adcStart(m_driver, &m_config);
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}
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void ADC::setOperation(ADC::Operation operation)
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{
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m_operation = operation;
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}
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void ADC::conversionCallback(ADCDriver *driver)
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{
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if (m_operation != nullptr) {
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auto half_size = m_current_buffer_size / 2;
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if (adcIsBufferComplete(driver))
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m_operation(m_current_buffer + half_size, half_size);
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else
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m_operation(m_current_buffer, half_size);
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}
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}
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