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107 lines
2.5 KiB
C++
107 lines
2.5 KiB
C++
/**
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* @file adc.cpp
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* @brief Manages signal reading through the ADC.
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*
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* Copyright (C) 2020 Clyne Sullivan
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*
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* Distributed under the GNU GPL v3 or later. You should have received a copy of
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* the GNU General Public License along with this program.
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* If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "adc.hpp"
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constexpr static const auto adcd = &ADCD1;
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constexpr static const auto gptd = &GPTD4;
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constexpr static const ADCConfig adc_config = {
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.difsel = 0
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};
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void adc_read_callback(ADCDriver *);
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/*constexpr*/ static ADCConversionGroup adc_group_config = {
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.circular = false,
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.num_channels = 1,
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.end_cb = adc_read_callback,
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.error_cb = nullptr,
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.cfgr = ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12), /* TIM4_TRGO */
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.cfgr2 = 0,
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.tr1 = ADC_TR(0, 4095),
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.smpr = {
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ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5), 0
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},
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.sqr = {
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ADC_SQR1_SQ1_N(ADC_CHANNEL_IN5),
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0, 0, 0
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}
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};
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constexpr static const GPTConfig gpt_config = {
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.frequency = 1000000,
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.callback = nullptr,
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.cr2 = TIM_CR2_MMS_1, /* TRGO */
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.dier = 0
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};
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static bool adc_is_read_finished = false;
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void adc_init()
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{
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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gptStart(gptd, &gpt_config);
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adcStart(adcd, &adc_config);
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adcSTM32EnableVREF(adcd);
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}
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adcsample_t *adc_read(adcsample_t *buffer, size_t count)
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{
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adc_is_read_finished = false;
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adcStartConversion(adcd, &adc_group_config, buffer, count);
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gptStartContinuous(gptd, 100); // 10kHz
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while (!adc_is_read_finished);
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return buffer;
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}
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void adc_read_callback([[maybe_unused]] ADCDriver *driver)
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{
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gptStopTimer(gptd);
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adc_is_read_finished = true;
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}
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void adc_set_rate(ADCRate rate)
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{
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uint32_t val = 0;
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switch (rate) {
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case ADCRate::R2P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_2P5);
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break;
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case ADCRate::R6P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_6P5);
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break;
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case ADCRate::R12P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_12P5);
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break;
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case ADCRate::R24P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_24P5);
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break;
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case ADCRate::R47P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_47P5);
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break;
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case ADCRate::R92P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_92P5);
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break;
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case ADCRate::R247P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5);
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break;
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case ADCRate::R640P5:
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val = ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_640P5);
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break;
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}
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adc_group_config.smpr[0] = val;
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}
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