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454 lines
14 KiB
C
454 lines
14 KiB
C
4 weeks ago
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/**
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******************************************************************************
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* @file stm32u0xx_ll_iwdg.h
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* @author MCD Application Team
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* @brief Header file of IWDG LL module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32U0xx_LL_IWDG_H
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#define STM32U0xx_LL_IWDG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32u0xx.h"
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/** @addtogroup STM32U0xx_LL_Driver
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* @{
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*/
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#if defined(IWDG)
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/** @defgroup IWDG_LL IWDG
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
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* @{
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*/
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#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
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#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
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#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
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#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
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/**
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* @}
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*/
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/* Private macros ------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
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* @{
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*/
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/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
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* @brief Flags defines which can be used with LL_IWDG_ReadReg function
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* @{
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*/
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#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
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#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
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#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
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/**
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* @}
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*/
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/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
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* @{
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*/
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#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
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#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
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#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
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#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
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#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
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#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
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#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
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#define LL_IWDG_PRESCALER_512 (IWDG_PR_PR_2 | IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 512 */
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#define LL_IWDG_PRESCALER_1024 IWDG_PR_PR_3 /*!< Divider by 1024 */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
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* @{
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*/
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/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
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* @{
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*/
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/**
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* @brief Write a value in IWDG register
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* @param __INSTANCE__ IWDG Instance
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* @param __REG__ Register to be written
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* @param __VALUE__ Value to be written in the register
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* @retval None
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*/
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#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
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/**
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* @brief Read a value in IWDG register
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* @param __INSTANCE__ IWDG Instance
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* @param __REG__ Register to be read
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* @retval Register value
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*/
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#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
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* @{
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*/
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/** @defgroup IWDG_LL_EF_Configuration Configuration
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* @{
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*/
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/**
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* @brief Start the Independent Watchdog
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* @note Except if the hardware watchdog option is selected
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* @rmtoll KR KEY LL_IWDG_Enable
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
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{
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WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
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}
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/**
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* @brief Reloads IWDG counter with value defined in the reload register
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* @rmtoll KR KEY LL_IWDG_ReloadCounter
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
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{
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WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
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}
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/**
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* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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* @rmtoll KR KEY LL_IWDG_EnableWriteAccess
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
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{
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WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
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}
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/**
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* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
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* @rmtoll KR KEY LL_IWDG_DisableWriteAccess
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
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{
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WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
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}
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/**
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* @brief Select the prescaler of the IWDG
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* @rmtoll PR PR LL_IWDG_SetPrescaler
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* @param IWDGx IWDG Instance
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* @param Prescaler This parameter can be one of the following values:
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* @arg @ref LL_IWDG_PRESCALER_4
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* @arg @ref LL_IWDG_PRESCALER_8
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* @arg @ref LL_IWDG_PRESCALER_16
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* @arg @ref LL_IWDG_PRESCALER_32
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* @arg @ref LL_IWDG_PRESCALER_64
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* @arg @ref LL_IWDG_PRESCALER_128
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* @arg @ref LL_IWDG_PRESCALER_256
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* @arg @ref LL_IWDG_PRESCALER_512
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* @arg @ref LL_IWDG_PRESCALER_1024
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
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{
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WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
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}
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/**
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* @brief Get the selected prescaler of the IWDG
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* @rmtoll PR PR LL_IWDG_GetPrescaler
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* @param IWDGx IWDG Instance
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_IWDG_PRESCALER_4
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* @arg @ref LL_IWDG_PRESCALER_8
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* @arg @ref LL_IWDG_PRESCALER_16
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* @arg @ref LL_IWDG_PRESCALER_32
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* @arg @ref LL_IWDG_PRESCALER_64
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* @arg @ref LL_IWDG_PRESCALER_128
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* @arg @ref LL_IWDG_PRESCALER_256
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* @arg @ref LL_IWDG_PRESCALER_512
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* @arg @ref LL_IWDG_PRESCALER_1024
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*/
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__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
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{
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return (READ_REG(IWDGx->PR));
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}
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/**
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* @brief Specify the IWDG down-counter reload value
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* @rmtoll RLR RL LL_IWDG_SetReloadCounter
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* @param IWDGx IWDG Instance
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* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
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{
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WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
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}
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/**
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* @brief Get the specified IWDG down-counter reload value
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* @rmtoll RLR RL LL_IWDG_GetReloadCounter
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* @param IWDGx IWDG Instance
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* @retval Value between Min_Data=0 and Max_Data=0x0FFF
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*/
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__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
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{
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return (READ_REG(IWDGx->RLR));
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}
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/**
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* @brief Specify high limit of the window value to be compared to the down-counter.
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* @rmtoll WINR WIN LL_IWDG_SetWindow
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* @param IWDGx IWDG Instance
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* @param Window Value between Min_Data=0 and Max_Data=0x0FFF
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
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{
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WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
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}
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/**
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* @brief Get the high limit of the window value specified.
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* @rmtoll WINR WIN LL_IWDG_GetWindow
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* @param IWDGx IWDG Instance
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* @retval Value between Min_Data=0 and Max_Data=0x0FFF
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*/
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__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
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{
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return (READ_REG(IWDGx->WINR));
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_LL_EF_IT_Management IT_Management
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* @{
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*/
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/**
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* @brief Specify comparator value that will be used to trig Early Wakeup interrupt
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* @rmtoll EWCR EWIT LL_IWDG_SetEwiTime
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* @param IWDGx IWDG Instance
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* @param Time Value between Min_Data=0 and Max_Data=0x0FFF
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_SetEwiTime(IWDG_TypeDef *IWDGx, uint32_t Time)
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{
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MODIFY_REG(IWDGx->EWCR, IWDG_EWCR_EWIT, Time);
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}
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/**
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* @brief Get the Early Wakeup interrupt comparator value
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* @rmtoll EWCR EWIT LL_IWDG_GetEwiTime
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* @param IWDGx IWDG Instance
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* @retval Value between Min_Data=0 and Max_Data=0x0FFF
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*/
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__STATIC_INLINE uint32_t LL_IWDG_GetEwiTime(const IWDG_TypeDef *IWDGx)
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{
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return (READ_BIT(IWDGx->EWCR, IWDG_EWCR_EWIT));
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}
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/**
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* @brief Enable Early wakeup interrupt
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* @rmtoll EWCR EWIE LL_IWDG_EnableIT_EWI
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_EnableIT_EWI(IWDG_TypeDef *IWDGx)
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{
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SET_BIT(IWDGx->EWCR, IWDG_EWCR_EWIE);
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}
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/**
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* @brief Disable Early wakeup interrupt
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* @rmtoll EWCR EWIE LL_IWDG_DisableIT_EWI
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_IWDG_DisableIT_EWI(IWDG_TypeDef *IWDGx)
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{
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CLEAR_BIT(IWDGx->EWCR, IWDG_EWCR_EWIE);
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}
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/**
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* @brief Indicates whether Early wakeup interrupt is enable
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* @rmtoll EWCR EWIE LL_IWDG_IsEnabledIT_EWI
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* @param IWDGx IWDG Instance
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* @retval None
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsEnabledIT_EWI(const IWDG_TypeDef *IWDGx)
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{
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return ((READ_BIT(IWDGx->EWCR, IWDG_EWCR_EWIE) == (IWDG_EWCR_EWIE)) ? 1UL : 0UL);
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}
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/**
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* @}
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*/
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/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
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* @{
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*/
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/**
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* @brief Check if flag Prescaler Value Update is set or not
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* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
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* @param IWDGx IWDG Instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
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{
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return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
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}
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/**
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* @brief Check if flag Reload Value Update is set or not
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* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
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* @param IWDGx IWDG Instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
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{
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return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
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}
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/**
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* @brief Check if flag Window Value Update is set or not
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* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
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* @param IWDGx IWDG Instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
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{
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return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
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}
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/**
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* @brief Check if flag EWI Value Update is set or not
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* @rmtoll SR EVU LL_IWDG_IsActiveFlag_EWU
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* @param IWDGx IWDG Instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_EWU(const IWDG_TypeDef *IWDGx)
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{
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return ((READ_BIT(IWDGx->SR, IWDG_SR_EWU) == (IWDG_SR_EWU)) ? 1UL : 0UL);
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}
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/**
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* @brief Check if all flags Prescaler, Reload, Window & Early Interrupt Value Update are reset or not
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* @rmtoll SR PVU LL_IWDG_IsReady\n
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* SR RVU LL_IWDG_IsReady\n
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* SR WVU LL_IWDG_IsReady\n
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* SR EWU LL_IWDG_IsReady
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* @param IWDGx IWDG Instance
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* @retval State of bits (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
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{
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|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU | IWDG_SR_EWU) == 0U) ? 1UL : 0UL);
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}
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|
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/**
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|
* @brief Check if IWDG has been started or not
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* @rmtoll SR ONF LL_IWDG_IsActiveFlag_ONF
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|
* @param IWDGx IWDG Instance
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|
* @retval State of bit (1 or 0).
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|
*/
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__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_ONF(const IWDG_TypeDef *IWDGx)
|
||
|
{
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|
return ((READ_BIT(IWDGx->SR, IWDG_SR_ONF) == (IWDG_SR_ONF)) ? 1UL : 0UL);
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|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Check if Early Wakeup interrupt flag is set or not
|
||
|
* @rmtoll SR EWIF LL_IWDG_IsActiveFlag_EWIF
|
||
|
* @param IWDGx IWDG Instance
|
||
|
* @retval State of bit (1 or 0).
|
||
|
*/
|
||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_EWIF(const IWDG_TypeDef *IWDGx)
|
||
|
{
|
||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_EWIF) == (IWDG_SR_EWIF)) ? 1UL : 0UL);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Clear the Early Wakeup interrupt flag
|
||
|
* @rmtoll EWCR EWIC LL_IWDG_ClearFlag_EWIF
|
||
|
* @param IWDGx IWDG Instance
|
||
|
* @retval None
|
||
|
*/
|
||
|
__STATIC_INLINE void LL_IWDG_ClearFlag_EWIF(IWDG_TypeDef *IWDGx)
|
||
|
{
|
||
|
SET_BIT(IWDGx->EWCR, IWDG_EWCR_EWIC);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
#endif /* IWDG */
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#endif /* STM32U0xx_LL_IWDG_H */
|