diff options
| author | Clyne Sullivan <clyne@bitgloo.com> | 2025-02-02 11:26:53 -0500 |
|---|---|---|
| committer | Clyne Sullivan <clyne@bitgloo.com> | 2025-02-02 11:26:53 -0500 |
| commit | 9c59a184dba820975e5da6fcd5d248aee87f7e2f (patch) | |
| tree | 6b30516adc2ba0f7b0a8f5fb5d2e6966c03108d8 /Core/Src | |
| parent | d09f4289b5788d6a8b34e424841292e2b8529e56 (diff) | |
add l476 implementationl476
Diffstat (limited to 'Core/Src')
| -rw-r--r-- | Core/Src/main.c | 205 | ||||
| -rw-r--r-- | Core/Src/stm32l4xx_hal_msp.c (renamed from Core/Src/stm32u0xx_hal_msp.c) | 42 | ||||
| -rw-r--r-- | Core/Src/stm32l4xx_it.c (renamed from Core/Src/stm32u0xx_it.c) | 94 | ||||
| -rw-r--r-- | Core/Src/system_stm32l4xx.c | 332 |
4 files changed, 510 insertions, 163 deletions
diff --git a/Core/Src/main.c b/Core/Src/main.c index ed49703..3aec32e 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -22,7 +22,7 @@ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
-#include <qfplib-port.h>
+#include <math.h>
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
@@ -46,7 +46,6 @@ typedef uint32_t sample_t; /* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
-
SPI_HandleTypeDef hspi1;
DMA_HandleTypeDef hdma_spi1_rx;
DMA_HandleTypeDef hdma_spi1_tx;
@@ -62,7 +61,7 @@ static uint8_t I2S_Receive_Buffer[SAMPLE_COUNT * 2 * sizeof(sample_t)]; float ln10;
float MIC_REF_AMPL;
-static int64_t DB_Sum_Squares = 0.f;
+static float DB_Sum_Squares = 0.f;
static int DB_Count = 0;
/* USER CODE END PV */
@@ -97,9 +96,9 @@ int __io_putchar(int ch) __RAM_FUNC
void fvar_init(void)
{
- ln10 = qfp_fln(10.f);
- MIC_REF_AMPL = qfp_fmul(qfp_int2float((1u << (MIC_BITS - 2)) - 1),
- qfp_fpow(10.f, MIC_SENSITIVITY / 20.f));
+ ln10 = logf(10.f);
+ MIC_REF_AMPL = (float)((1u << (MIC_BITS - 2)) - 1) *
+ powf(10.f, MIC_SENSITIVITY / 20.f);
}
/* USER CODE END 0 */
@@ -168,16 +167,25 @@ void SystemClock_Config(void) /** Configure the main internal regulator output voltage
*/
- HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2) != HAL_OK)
+ {
+ Error_Handler();
+ }
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
- RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
- RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_9;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+ RCC_OscInitStruct.MSICalibrationValue = 0;
+ RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+ RCC_OscInitStruct.PLL.PLLM = 1;
+ RCC_OscInitStruct.PLL.PLLN = 12;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV8;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@@ -186,10 +194,11 @@ void SystemClock_Config(void) /** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
@@ -259,26 +268,13 @@ static void MX_USART2_UART_Init(void) huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart2.Init.OverSampling = UART_OVERSAMPLING_8;
+ huart2.Init.OverSampling = UART_OVERSAMPLING_16;
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
- if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
- {
- Error_Handler();
- }
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
@@ -295,12 +291,12 @@ static void MX_DMA_Init(void) __HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
- /* DMA1_Channel1_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
- /* DMA1_Channel2_3_IRQn interrupt configuration */
- HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0);
- HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
+ /* DMA1_Channel2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
+ /* DMA1_Channel3_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Channel3_IRQn, 0, 0);
+ HAL_NVIC_EnableIRQ(DMA1_Channel3_IRQn);
}
@@ -317,55 +313,56 @@ static void MX_GPIO_Init(void) /* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(LED_GREEN_GPIO_Port, LED_GREEN_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(LED_BLUE_GPIO_Port, LED_BLUE_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(IDLE_GPIO_Port, IDLE_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin : LED_GREEN_Pin */
- GPIO_InitStruct.Pin = LED_GREEN_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ /*Configure GPIO pins : PC13 PC14 PC15 PC0
+ PC1 PC2 PC3 PC4
+ PC5 PC6 PC7 PC8
+ PC9 PC10 PC11 PC12 */
+ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0
+ |GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
+ |GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8
+ |GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(LED_GREEN_GPIO_Port, &GPIO_InitStruct);
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- /*Configure GPIO pin : Joystick_Pin */
- GPIO_InitStruct.Pin = Joystick_Pin;
+ /*Configure GPIO pins : PH0 PH1 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(Joystick_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pin : LED_BLUE_Pin */
- GPIO_InitStruct.Pin = LED_BLUE_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : PA0 PA1 PA4 PA5
+ PA6 PA7 PA8 PA9
+ PA10 PA11 PA12 PA15 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
+ |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
+ |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(LED_BLUE_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pin : LED_RED_Pin */
- GPIO_InitStruct.Pin = LED_RED_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ /*Configure GPIO pins : PB0 PB1 PB2 PB10
+ PB11 PB12 PB13 PB14
+ PB15 PB6 PB7 PB8
+ PB9 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_10
+ |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14
+ |GPIO_PIN_15|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8
+ |GPIO_PIN_9;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(LED_RED_GPIO_Port, &GPIO_InitStruct);
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- /*Configure GPIO pin : IDLE_Pin */
- GPIO_InitStruct.Pin = IDLE_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ /*Configure GPIO pin : PD2 */
+ GPIO_InitStruct.Pin = GPIO_PIN_2;
+ GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
- HAL_GPIO_Init(IDLE_GPIO_Port, &GPIO_InitStruct);
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
@@ -449,67 +446,28 @@ error : return errorcode;
}
-#define BITO (10)
-
-__RAM_FUNC
-__attribute__((naked))
-int64_t lmul(int64_t a, int64_t b)
-{
- asm(
-" push {r4, lr}\n"
-" mul r1, r2\n"
-" mul r3, r0\n"
-" add r1, r3\n"
-
-" lsr r3, r0, #16\n"
-" lsr r4, r2, #16\n"
-" mul r3, r4\n"
-" add r1, r3\n"
-
-" lsr r3, r0, #16\n"
-" uxth r0, r0\n"
-" uxth r2, r2\n"
-" mul r3, r2\n"
-" mul r4, r0\n"
-" mul r0, r2\n"
-
-" mov r2, #0\n"
-" add r3, r4\n"
-" adc r2, r2\n"
-" lsl r2, #16\n"
-" add r1, r2\n"
-
-" lsl r2, r3, #16\n"
-" lsr r3, #16\n"
-" add r0, r2\n"
-" adc r1, r3\n"
-" pop {r4, pc}\n"
- );
-}
-
__RAM_FUNC
-static inline void process(int64_t in_div4)
+static inline void process(float in_div4)
{
- static int64_t z[4] = {0, 0, 0, 0};
+ static float z[4] = {0.f, 0.f, 0.f, 0.f};
- in_div4 <<= BITO;
- int64_t out1 = (in_div4 + z[0]);
- z[0] = ((out1 * 0x43f /*1.062f*/) >> BITO) + z[1];
- z[1] = ((out1 * -0x8f /*-0.14f*/) >> BITO) - in_div4;
+ float out1 = in_div4 + z[0];
+ z[0] = out1 * 1.062f + z[1];
+ z[1] = out1 * -0.14f - in_div4;
- int64_t out2 = (out1 + z[2]);
+ float out2 = out1 + z[2];
z[2] = out1;
- int64_t out3 = (out2 + z[3]);
- z[3] = ((out3 * 0x3f1 /*0.985f*/) >> BITO) - out2;
+ float out3 = out2 + z[3];
+ z[3] = out3 * 0.985f - out2;
- DB_Sum_Squares += lmul(out3, out3) >> BITO;
+ DB_Sum_Squares += out3 * out3;
}
__RAM_FUNC
static void processSampleBlock(sample_t *sample)
{
- IDLE_GPIO_Port->ODR ^= IDLE_Pin;
+ //IDLE_GPIO_Port->ODR ^= IDLE_Pin;
for (int i = 0; i < SAMPLE_COUNT; i += 2) {
// 18-bit sample comes in as big-endian with right padding.
@@ -521,16 +479,15 @@ static void processSampleBlock(sample_t *sample) DB_Count += SAMPLE_COUNT / 2;
if (DB_Count >= SAMPLES_PER_REPORT) {
- float rms = qfp_fsqrt(qfp_int2float((DB_Sum_Squares >> BITO) / DB_Count));
- float db = qfp_fadd(qfp_fmul(qfp_flog10(qfp_fdiv(rms, MIC_REF_AMPL)), 20.f),
- MIC_OFFSET_DB + MIC_REF_DB);
+ float rms = sqrtf(DB_Sum_Squares / DB_Count);
+ float db = 20.f * log10f(rms / MIC_REF_AMPL) + MIC_OFFSET_DB + MIC_REF_DB;
DB_Sum_Squares = 0.f;
DB_Count = 0;
- printf("%d dB\r\n", qfp_float2int(db));
+ printf("%d dB\r\n", (int)db);
}
- IDLE_GPIO_Port->ODR ^= IDLE_Pin;
+ //IDLE_GPIO_Port->ODR ^= IDLE_Pin;
}
void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
diff --git a/Core/Src/stm32u0xx_hal_msp.c b/Core/Src/stm32l4xx_hal_msp.c index 4eb7deb..18e8512 100644 --- a/Core/Src/stm32u0xx_hal_msp.c +++ b/Core/Src/stm32l4xx_hal_msp.c @@ -1,7 +1,7 @@ /* USER CODE BEGIN Header */
/**
******************************************************************************
- * @file stm32u0xx_hal_msp.c
+ * @file stm32l4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
@@ -70,8 +70,8 @@ void HAL_MspInit(void) /* USER CODE END MspInit 0 */
- __HAL_RCC_PWR_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
+ __HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
@@ -97,23 +97,23 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) /* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
/**SPI1 GPIO Configuration
- PA1 ------> SPI1_SCK
- PA6 ------> SPI1_MISO
- PA7 ------> SPI1_MOSI
+ PB3 (JTDO-TRACESWO) ------> SPI1_SCK
+ PB4 (NJTRST) ------> SPI1_MISO
+ PB5 ------> SPI1_MOSI
*/
- GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_6|GPIO_PIN_7;
+ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* SPI1 DMA Init */
/* SPI1_RX Init */
- hdma_spi1_rx.Instance = DMA1_Channel1;
- hdma_spi1_rx.Init.Request = DMA_REQUEST_SPI1_RX;
+ hdma_spi1_rx.Instance = DMA1_Channel2;
+ hdma_spi1_rx.Init.Request = DMA_REQUEST_1;
hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE;
@@ -129,8 +129,8 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) __HAL_LINKDMA(hspi,hdmarx,hdma_spi1_rx);
/* SPI1_TX Init */
- hdma_spi1_tx.Instance = DMA1_Channel2;
- hdma_spi1_tx.Init.Request = DMA_REQUEST_SPI1_TX;
+ hdma_spi1_tx.Instance = DMA1_Channel3;
+ hdma_spi1_tx.Init.Request = DMA_REQUEST_1;
hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE;
@@ -170,11 +170,11 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) __HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
- PA1 ------> SPI1_SCK
- PA6 ------> SPI1_MISO
- PA7 ------> SPI1_MOSI
+ PB3 (JTDO-TRACESWO) ------> SPI1_SCK
+ PB4 (NJTRST) ------> SPI1_MISO
+ PB5 ------> SPI1_MOSI
*/
- HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_6|GPIO_PIN_7);
+ HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
/* SPI1 DMA DeInit */
HAL_DMA_DeInit(hspi->hdmarx);
@@ -202,7 +202,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) /* USER CODE END USART2_MspInit 0 */
- /** Initializes the peripherals clocks
+ /** Initializes the peripherals clock
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
@@ -219,10 +219,10 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
- GPIO_InitStruct.Pin = VCP_TX_Pin|VCP_RX_Pin;
+ GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
@@ -254,7 +254,7 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
- HAL_GPIO_DeInit(GPIOA, VCP_TX_Pin|VCP_RX_Pin);
+ HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2|GPIO_PIN_3);
/* USER CODE BEGIN USART2_MspDeInit 1 */
diff --git a/Core/Src/stm32u0xx_it.c b/Core/Src/stm32l4xx_it.c index 78ec492..8905566 100644 --- a/Core/Src/stm32u0xx_it.c +++ b/Core/Src/stm32l4xx_it.c @@ -1,7 +1,7 @@ /* USER CODE BEGIN Header */
/**
******************************************************************************
- * @file stm32u0xx_it.c
+ * @file stm32l4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
@@ -19,7 +19,7 @@ /* Includes ------------------------------------------------------------------*/
#include "main.h"
-#include "stm32u0xx_it.h"
+#include "stm32l4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
@@ -62,7 +62,7 @@ extern DMA_HandleTypeDef hdma_spi1_tx; /* USER CODE END EV */
/******************************************************************************/
-/* Cortex Processor Interruption and Exception Handlers */
+/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
@@ -95,7 +95,52 @@ void HardFault_Handler(void) }
/**
- * @brief This function handles System service call via SVC instruction.
+ * @brief This function handles Memory management fault.
+ */
+void MemManage_Handler(void)
+{
+ /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+ /* USER CODE END MemoryManagement_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Prefetch fault, memory access fault.
+ */
+void BusFault_Handler(void)
+{
+ /* USER CODE BEGIN BusFault_IRQn 0 */
+
+ /* USER CODE END BusFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ /* USER CODE END W1_BusFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles Undefined instruction or illegal state.
+ */
+void UsageFault_Handler(void)
+{
+ /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+ /* USER CODE END UsageFault_IRQn 0 */
+ while (1)
+ {
+ /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ /* USER CODE END W1_UsageFault_IRQn 0 */
+ }
+}
+
+/**
+ * @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
@@ -108,6 +153,19 @@ void SVC_Handler(void) }
/**
+ * @brief This function handles Debug monitor.
+ */
+void DebugMon_Handler(void)
+{
+ /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+ /* USER CODE END DebugMonitor_IRQn 0 */
+ /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+ /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
@@ -135,38 +193,38 @@ void SysTick_Handler(void) }
/******************************************************************************/
-/* STM32U0xx Peripheral Interrupt Handlers */
+/* STM32L4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32u0xx.s). */
+/* please refer to the startup file (startup_stm32l4xx.s). */
/******************************************************************************/
/**
- * @brief This function handles DMA1 channel 1 interrupt.
+ * @brief This function handles DMA1 channel2 global interrupt.
*/
-void DMA1_Channel1_IRQHandler(void)
+void DMA1_Channel2_IRQHandler(void)
{
- /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
- /* USER CODE END DMA1_Channel1_IRQn 0 */
+ /* USER CODE END DMA1_Channel2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi1_rx);
- /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
+ /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
- /* USER CODE END DMA1_Channel1_IRQn 1 */
+ /* USER CODE END DMA1_Channel2_IRQn 1 */
}
/**
- * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
+ * @brief This function handles DMA1 channel3 global interrupt.
*/
-void DMA1_Channel2_3_IRQHandler(void)
+void DMA1_Channel3_IRQHandler(void)
{
- /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
+ /* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
- /* USER CODE END DMA1_Channel2_3_IRQn 0 */
+ /* USER CODE END DMA1_Channel3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi1_tx);
- /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
+ /* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
- /* USER CODE END DMA1_Channel2_3_IRQn 1 */
+ /* USER CODE END DMA1_Channel3_IRQn 1 */
}
/* USER CODE BEGIN 1 */
diff --git a/Core/Src/system_stm32l4xx.c b/Core/Src/system_stm32l4xx.c new file mode 100644 index 0000000..be9cfee --- /dev/null +++ b/Core/Src/system_stm32l4xx.c @@ -0,0 +1,332 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (MSI_VALUE) + #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ + +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ + +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 4000000U; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \ + 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @retval None + */ + +void SystemInit(void) +{ +#if defined(USER_VECT_TAB_ADDRESS) + /* Configure the Vector Table location -------------------------------------*/ + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; +#endif + + /* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, msirange, pllvco, pllsource, pllm, pllr; + + /* Get MSI Range frequency--------------------------------------------------*/ + if ((RCC->CR & RCC_CR_MSIRGSEL) == 0U) + { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } + else + { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U ; + + switch (pllsource) + { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |