config

1 files changed, 387 insertions, 0 deletions

diff --git a/include/distortos/distortosConfiguration.h b/include/distortos/distortosConfiguration.h
new file mode 100644
index 0000000..831df6e
--- /dev/null
+++ b/include/distortos/distortosConfiguration.h
@@ -0,0 +1,387 @@
+/**
+ * \file
+ * \brief distortos configuration
+ *
+ * \warning
+ * Automatically generated file - do not edit!
+ *
+ * \date 2016-11-08 19:50:28
+ */
+
+#ifndef INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_
+#define INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_
+
+#define CONFIG_CHIP_STM32
+#undef CONFIG_CHIP_STM32F0
+#define CONFIG_CHIP_STM32F1
+#undef CONFIG_CHIP_STM32F4
+#define CONFIG_BOARD_CUSTOM
+#undef CONFIG_BOARD_NUCLEO_F103RB
+#undef CONFIG_CHIP_STM32F100C4_SELECTED
+#undef CONFIG_CHIP_STM32F100C6_SELECTED
+#undef CONFIG_CHIP_STM32F100C8_SELECTED
+#undef CONFIG_CHIP_STM32F100CB_SELECTED
+#undef CONFIG_CHIP_STM32F100R4_SELECTED
+#undef CONFIG_CHIP_STM32F100R6_SELECTED
+#undef CONFIG_CHIP_STM32F100R8_SELECTED
+#undef CONFIG_CHIP_STM32F100RB_SELECTED
+#undef CONFIG_CHIP_STM32F100RC_SELECTED
+#undef CONFIG_CHIP_STM32F100RD_SELECTED
+#undef CONFIG_CHIP_STM32F100RE_SELECTED
+#undef CONFIG_CHIP_STM32F100V8_SELECTED
+#undef CONFIG_CHIP_STM32F100VB_SELECTED
+#undef CONFIG_CHIP_STM32F100VC_SELECTED
+#undef CONFIG_CHIP_STM32F100VD_SELECTED
+#undef CONFIG_CHIP_STM32F100VE_SELECTED
+#undef CONFIG_CHIP_STM32F100ZC_SELECTED
+#undef CONFIG_CHIP_STM32F100ZD_SELECTED
+#undef CONFIG_CHIP_STM32F100ZE_SELECTED
+#undef CONFIG_CHIP_STM32F101C6_SELECTED
+#undef CONFIG_CHIP_STM32F101C8_SELECTED
+#undef CONFIG_CHIP_STM32F101CB_SELECTED
+#undef CONFIG_CHIP_STM32F101R4_SELECTED
+#undef CONFIG_CHIP_STM32F101R6_SELECTED
+#undef CONFIG_CHIP_STM32F101R8_SELECTED
+#undef CONFIG_CHIP_STM32F101RB_SELECTED
+#undef CONFIG_CHIP_STM32F101RC_SELECTED
+#undef CONFIG_CHIP_STM32F101RD_SELECTED
+#undef CONFIG_CHIP_STM32F101RE_SELECTED
+#undef CONFIG_CHIP_STM32F101RF_SELECTED
+#undef CONFIG_CHIP_STM32F101RG_SELECTED
+#undef CONFIG_CHIP_STM32F101T4_SELECTED
+#undef CONFIG_CHIP_STM32F101T6_SELECTED
+#undef CONFIG_CHIP_STM32F101T8_SELECTED
+#undef CONFIG_CHIP_STM32F101TB_SELECTED
+#undef CONFIG_CHIP_STM32F101V8_SELECTED
+#undef CONFIG_CHIP_STM32F101VB_SELECTED
+#undef CONFIG_CHIP_STM32F101VC_SELECTED
+#undef CONFIG_CHIP_STM32F101VD_SELECTED
+#undef CONFIG_CHIP_STM32F101VE_SELECTED
+#undef CONFIG_CHIP_STM32F101VF_SELECTED
+#undef CONFIG_CHIP_STM32F101VG_SELECTED
+#undef CONFIG_CHIP_STM32F101ZC_SELECTED
+#undef CONFIG_CHIP_STM32F101ZD_SELECTED
+#undef CONFIG_CHIP_STM32F101ZE_SELECTED
+#undef CONFIG_CHIP_STM32F101ZF_SELECTED
+#undef CONFIG_CHIP_STM32F101ZG_SELECTED
+#undef CONFIG_CHIP_STM32F102C4_SELECTED
+#undef CONFIG_CHIP_STM32F102C6_SELECTED
+#undef CONFIG_CHIP_STM32F102C8_SELECTED
+#undef CONFIG_CHIP_STM32F102CB_SELECTED
+#undef CONFIG_CHIP_STM32F102R4_SELECTED
+#undef CONFIG_CHIP_STM32F102R6_SELECTED
+#undef CONFIG_CHIP_STM32F102R8_SELECTED
+#undef CONFIG_CHIP_STM32F102RB_SELECTED
+#undef CONFIG_CHIP_STM32F103C4_SELECTED
+#undef CONFIG_CHIP_STM32F103C6_SELECTED
+#undef CONFIG_CHIP_STM32F103C8_SELECTED
+#undef CONFIG_CHIP_STM32F103CB_SELECTED
+#undef CONFIG_CHIP_STM32F103R4_SELECTED
+#undef CONFIG_CHIP_STM32F103R6_SELECTED
+#undef CONFIG_CHIP_STM32F103R8_SELECTED
+#undef CONFIG_CHIP_STM32F103RB_SELECTED
+#undef CONFIG_CHIP_STM32F103RC_SELECTED
+#undef CONFIG_CHIP_STM32F103RD_SELECTED
+#undef CONFIG_CHIP_STM32F103RE_SELECTED
+#undef CONFIG_CHIP_STM32F103RF_SELECTED
+#undef CONFIG_CHIP_STM32F103RG_SELECTED
+#undef CONFIG_CHIP_STM32F103T4_SELECTED
+#undef CONFIG_CHIP_STM32F103T6_SELECTED
+#undef CONFIG_CHIP_STM32F103T8_SELECTED
+#undef CONFIG_CHIP_STM32F103TB_SELECTED
+#undef CONFIG_CHIP_STM32F103V8_SELECTED
+#undef CONFIG_CHIP_STM32F103VB_SELECTED
+#undef CONFIG_CHIP_STM32F103VC_SELECTED
+#define CONFIG_CHIP_STM32F103VD_SELECTED
+#undef CONFIG_CHIP_STM32F103VE_SELECTED
+#undef CONFIG_CHIP_STM32F103VF_SELECTED
+#undef CONFIG_CHIP_STM32F103VG_SELECTED
+#undef CONFIG_CHIP_STM32F103ZC_SELECTED
+#undef CONFIG_CHIP_STM32F103ZD_SELECTED
+#undef CONFIG_CHIP_STM32F103ZE_SELECTED
+#undef CONFIG_CHIP_STM32F103ZF_SELECTED
+#undef CONFIG_CHIP_STM32F103ZG_SELECTED
+#undef CONFIG_CHIP_STM32F105R8_SELECTED
+#undef CONFIG_CHIP_STM32F105RB_SELECTED
+#undef CONFIG_CHIP_STM32F105RC_SELECTED
+#undef CONFIG_CHIP_STM32F105V8_SELECTED
+#undef CONFIG_CHIP_STM32F105VB_SELECTED
+#undef CONFIG_CHIP_STM32F105VC_SELECTED
+#undef CONFIG_CHIP_STM32F107RB_SELECTED
+#undef CONFIG_CHIP_STM32F107RC_SELECTED
+#undef CONFIG_CHIP_STM32F107VB_SELECTED
+#undef CONFIG_CHIP_STM32F107VC_SELECTED
+#define CONFIG_BOARD_TOTAL_BUTTONS 0
+#define CONFIG_BOARD_TOTAL_LEDS 0
+#define CONFIG_BOARD "Custom"
+#define CONFIG_CHIP "STM32F103VD"
+#define CONFIG_CHIP_INCLUDES "source/chip/STM32/STM32F1/include external/CMSIS-STM32F1 external/CMSIS"
+#define CONFIG_CHIP_STM32F1_STANDARD_CLOCK_CONFIGURATION_ENABLE
+#undef CONFIG_CHIP_STM32F1_RCC_HSE_ENABLE
+#define CONFIG_CHIP_STM32F1_RCC_PLL_ENABLE
+#define CONFIG_CHIP_STM32F1_RCC_PLLSRC_HSIDIV2
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL2
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL3
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL4
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL5
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL6
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL7
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL8
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL9
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL10
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL11
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL12
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL13
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL14
+#undef CONFIG_CHIP_STM32F1_RCC_PLLMUL15
+#define CONFIG_CHIP_STM32F1_RCC_PLLMUL16
+#undef CONFIG_CHIP_STM32F1_RCC_SYSCLK_HSI
+#define CONFIG_CHIP_STM32F1_RCC_SYSCLK_PLL
+#define CONFIG_CHIP_STM32F1_RCC_AHB_DIV1
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV2
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV4
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV8
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV16
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV64
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV128
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV256
+#undef CONFIG_CHIP_STM32F1_RCC_AHB_DIV512
+#undef CONFIG_CHIP_STM32F1_RCC_APB1_DIV1
+#define CONFIG_CHIP_STM32F1_RCC_APB1_DIV2
+#undef CONFIG_CHIP_STM32F1_RCC_APB1_DIV4
+#undef CONFIG_CHIP_STM32F1_RCC_APB1_DIV8
+#undef CONFIG_CHIP_STM32F1_RCC_APB1_DIV16
+#define CONFIG_CHIP_STM32F1_RCC_APB2_DIV1
+#undef CONFIG_CHIP_STM32F1_RCC_APB2_DIV2
+#undef CONFIG_CHIP_STM32F1_RCC_APB2_DIV4
+#undef CONFIG_CHIP_STM32F1_RCC_APB2_DIV8
+#undef CONFIG_CHIP_STM32F1_RCC_APB2_DIV16
+#define CONFIG_CHIP_STM32F1_FLASH_PREFETCH_ENABLE
+#undef CONFIG_CHIP_STM32F1_FLASH_HALF_CYCLE_ACCESS_ENABLE
+#define CONFIG_CHIP_STM32F10
+#undef CONFIG_CHIP_STM32F100
+#undef CONFIG_CHIP_STM32F100C
+#undef CONFIG_CHIP_STM32F100C4
+#undef CONFIG_CHIP_STM32F100C6
+#undef CONFIG_CHIP_STM32F100C8
+#undef CONFIG_CHIP_STM32F100CB
+#undef CONFIG_CHIP_STM32F100R
+#undef CONFIG_CHIP_STM32F100R4
+#undef CONFIG_CHIP_STM32F100R6
+#undef CONFIG_CHIP_STM32F100R8
+#undef CONFIG_CHIP_STM32F100RB
+#undef CONFIG_CHIP_STM32F100RC
+#undef CONFIG_CHIP_STM32F100RD
+#undef CONFIG_CHIP_STM32F100RE
+#undef CONFIG_CHIP_STM32F100V
+#undef CONFIG_CHIP_STM32F100V8
+#undef CONFIG_CHIP_STM32F100VB
+#undef CONFIG_CHIP_STM32F100VC
+#undef CONFIG_CHIP_STM32F100VD
+#undef CONFIG_CHIP_STM32F100VE
+#undef CONFIG_CHIP_STM32F100Z
+#undef CONFIG_CHIP_STM32F100ZC
+#undef CONFIG_CHIP_STM32F100ZD
+#undef CONFIG_CHIP_STM32F100ZE
+#undef CONFIG_CHIP_STM32F101
+#undef CONFIG_CHIP_STM32F101C
+#undef CONFIG_CHIP_STM32F101C6
+#undef CONFIG_CHIP_STM32F101C8
+#undef CONFIG_CHIP_STM32F101CB
+#undef CONFIG_CHIP_STM32F101R
+#undef CONFIG_CHIP_STM32F101R4
+#undef CONFIG_CHIP_STM32F101R6
+#undef CONFIG_CHIP_STM32F101R8
+#undef CONFIG_CHIP_STM32F101RB
+#undef CONFIG_CHIP_STM32F101RC
+#undef CONFIG_CHIP_STM32F101RD
+#undef CONFIG_CHIP_STM32F101RE
+#undef CONFIG_CHIP_STM32F101RF
+#undef CONFIG_CHIP_STM32F101RG
+#undef CONFIG_CHIP_STM32F101T
+#undef CONFIG_CHIP_STM32F101T4
+#undef CONFIG_CHIP_STM32F101T6
+#undef CONFIG_CHIP_STM32F101T8
+#undef CONFIG_CHIP_STM32F101TB
+#undef CONFIG_CHIP_STM32F101V
+#undef CONFIG_CHIP_STM32F101V8
+#undef CONFIG_CHIP_STM32F101VB
+#undef CONFIG_CHIP_STM32F101VC
+#undef CONFIG_CHIP_STM32F101VD
+#undef CONFIG_CHIP_STM32F101VE
+#undef CONFIG_CHIP_STM32F101VF
+#undef CONFIG_CHIP_STM32F101VG
+#undef CONFIG_CHIP_STM32F101Z
+#undef CONFIG_CHIP_STM32F101ZC
+#undef CONFIG_CHIP_STM32F101ZD
+#undef CONFIG_CHIP_STM32F101ZE
+#undef CONFIG_CHIP_STM32F101ZF
+#undef CONFIG_CHIP_STM32F101ZG
+#undef CONFIG_CHIP_STM32F102
+#undef CONFIG_CHIP_STM32F102C
+#undef CONFIG_CHIP_STM32F102C4
+#undef CONFIG_CHIP_STM32F102C6
+#undef CONFIG_CHIP_STM32F102C8
+#undef CONFIG_CHIP_STM32F102CB
+#undef CONFIG_CHIP_STM32F102R
+#undef CONFIG_CHIP_STM32F102R4
+#undef CONFIG_CHIP_STM32F102R6
+#undef CONFIG_CHIP_STM32F102R8
+#undef CONFIG_CHIP_STM32F102RB
+#define CONFIG_CHIP_STM32F103
+#undef CONFIG_CHIP_STM32F103C
+#undef CONFIG_CHIP_STM32F103C4
+#undef CONFIG_CHIP_STM32F103C6
+#undef CONFIG_CHIP_STM32F103C8
+#undef CONFIG_CHIP_STM32F103CB
+#undef CONFIG_CHIP_STM32F103R
+#undef CONFIG_CHIP_STM32F103R4
+#undef CONFIG_CHIP_STM32F103R6
+#undef CONFIG_CHIP_STM32F103R8
+#undef CONFIG_CHIP_STM32F103RB
+#undef CONFIG_CHIP_STM32F103RC
+#undef CONFIG_CHIP_STM32F103RD
+#undef CONFIG_CHIP_STM32F103RE
+#undef CONFIG_CHIP_STM32F103RF
+#undef CONFIG_CHIP_STM32F103RG
+#undef CONFIG_CHIP_STM32F103T
+#undef CONFIG_CHIP_STM32F103T4
+#undef CONFIG_CHIP_STM32F103T6
+#undef CONFIG_CHIP_STM32F103T8
+#undef CONFIG_CHIP_STM32F103TB
+#define CONFIG_CHIP_STM32F103V
+#undef CONFIG_CHIP_STM32F103V8
+#undef CONFIG_CHIP_STM32F103VB
+#undef CONFIG_CHIP_STM32F103VC
+#define CONFIG_CHIP_STM32F103VD
+#undef CONFIG_CHIP_STM32F103VE
+#undef CONFIG_CHIP_STM32F103VF
+#undef CONFIG_CHIP_STM32F103VG
+#undef CONFIG_CHIP_STM32F103Z
+#undef CONFIG_CHIP_STM32F103ZC
+#undef CONFIG_CHIP_STM32F103ZD
+#undef CONFIG_CHIP_STM32F103ZE
+#undef CONFIG_CHIP_STM32F103ZF
+#undef CONFIG_CHIP_STM32F103ZG
+#undef CONFIG_CHIP_STM32F105
+#undef CONFIG_CHIP_STM32F105R
+#undef CONFIG_CHIP_STM32F105R8
+#undef CONFIG_CHIP_STM32F105RB
+#undef CONFIG_CHIP_STM32F105RC
+#undef CONFIG_CHIP_STM32F105V
+#undef CONFIG_CHIP_STM32F105V8
+#undef CONFIG_CHIP_STM32F105VB
+#undef CONFIG_CHIP_STM32F105VC
+#undef CONFIG_CHIP_STM32F107
+#undef CONFIG_CHIP_STM32F107R
+#undef CONFIG_CHIP_STM32F107RB
+#undef CONFIG_CHIP_STM32F107RC
+#undef CONFIG_CHIP_STM32F107V
+#undef CONFIG_CHIP_STM32F107VB
+#undef CONFIG_CHIP_STM32F107VC
+#define CONFIG_CHIP_STM32F1_FLASH_SIZE 393216
+#define CONFIG_CHIP_STM32F1_FLASH_ADDRESS 0x08000000
+#define CONFIG_CHIP_STM32F1_SRAM_SIZE 65536
+#define CONFIG_CHIP_STM32F1_SRAM_ADDRESS 0x20000000
+#define CONFIG_CHIP_STM32F1_RCC_HSE_CLOCK_BYPASS_CONFIGURABLE
+#undef CONFIG_CHIP_STM32F1_RCC_HSE_CLOCK_BYPASS_DEFAULT
+#define CONFIG_CHIP_STM32F1_RCC_HSE_FREQUENCY_CONFIGURABLE
+#define CONFIG_CHIP_STM32F1_RCC_HSE_FREQUENCY_DEFAULT 8000000
+#define CONFIG_CHIP_STM32F1_RCC_HPRE 1
+#define CONFIG_CHIP_STM32F1_RCC_PLLMUL_DENOMINATOR 1
+#define CONFIG_CHIP_STM32F1_RCC_PLLMUL_NUMERATOR 16
+#define CONFIG_CHIP_STM32F1_RCC_PPRE1 2
+#define CONFIG_CHIP_STM32F1_RCC_PPRE2 1
+#define CONFIG_CHIP_LFBGA100_SELECTED
+#undef CONFIG_CHIP_LQFP100_SELECTED
+#undef CONFIG_ARCHITECTURE_ARMV6_M
+#define CONFIG_ARCHITECTURE_ARMV7_M
+#define CONFIG_TOOLCHAIN_PREFIX "arm-none-eabi-"
+#define CONFIG_ARCHITECTURE_FLAGS "-mcpu=cortex-m3 -mthumb"
+#define CONFIG_ARCHITECTURE_ARMV7_M_KERNEL_BASEPRI 0
+#define CONFIG_ARCHITECTURE_ARM_CORTEX_M3
+#undef CONFIG_ARCHITECTURE_ARM_CORTEX_M4
+#undef CONFIG_ARCHITECTURE_ARM_CORTEX_M7
+#undef CONFIG_ARCHITECTURE_HAS_FPV5_D16
+#define CONFIG_ARCHITECTURE_ARMV6_M_ARMV7_M_MAIN_STACK_SIZE 2048
+#define CONFIG_ARCHITECTURE_INCLUDES "source/architecture/ARM/ARMv6-M-ARMv7-M/include"
+#undef CONFIG_ARCHITECTURE_HAS_FPU
+#define CONFIG_ARCHITECTURE_ARM
+#define CONFIG_CHIP_HAS_LFBGA100
+#undef CONFIG_CHIP_HAS_LFBGA144
+#undef CONFIG_CHIP_HAS_LQFP32
+#undef CONFIG_CHIP_HAS_LQFP48
+#undef CONFIG_CHIP_HAS_LQFP64
+#define CONFIG_CHIP_HAS_LQFP100
+#undef CONFIG_CHIP_HAS_LQFP144
+#undef CONFIG_CHIP_HAS_LQFP176
+#undef CONFIG_CHIP_HAS_LQFP208
+#undef CONFIG_CHIP_HAS_TFBGA64
+#undef CONFIG_CHIP_HAS_TFBGA216
+#undef CONFIG_CHIP_HAS_TSSOP20
+#undef CONFIG_CHIP_HAS_UFBGA64
+#undef CONFIG_CHIP_HAS_UFBGA100
+#undef CONFIG_CHIP_HAS_UFBGA144
+#undef CONFIG_CHIP_HAS_UFBGA169
+#undef CONFIG_CHIP_HAS_UFBGA176
+#undef CONFIG_CHIP_HAS_UFQFPN28
+#undef CONFIG_CHIP_HAS_UFQFPN32
+#undef CONFIG_CHIP_HAS_UFQFPN48
+#undef CONFIG_CHIP_HAS_VFQFPN36
+#undef CONFIG_CHIP_HAS_WLCSP25
+#undef CONFIG_CHIP_HAS_WLCSP36
+#undef CONFIG_CHIP_HAS_WLCSP49
+#undef CONFIG_CHIP_HAS_WLCSP64
+#undef CONFIG_CHIP_HAS_WLCSP81
+#undef CONFIG_CHIP_HAS_WLCSP90
+#undef CONFIG_CHIP_HAS_WLCSP143
+#undef CONFIG_CHIP_HAS_WLCSP168
+#define CONFIG_CHIP_LFBGA100
+#undef CONFIG_CHIP_LFBGA144
+#undef CONFIG_CHIP_LQFP32
+#undef CONFIG_CHIP_LQFP48
+#undef CONFIG_CHIP_LQFP64
+#undef CONFIG_CHIP_LQFP100
+#undef CONFIG_CHIP_LQFP144
+#undef CONFIG_CHIP_LQFP176
+#undef CONFIG_CHIP_LQFP208
+#undef CONFIG_CHIP_TFBGA64
+#undef CONFIG_CHIP_TFBGA216
+#undef CONFIG_CHIP_TSSOP20
+#undef CONFIG_CHIP_UFBGA64
+#undef CONFIG_CHIP_UFBGA100
+#undef CONFIG_CHIP_UFBGA144
+#undef CONFIG_CHIP_UFBGA169
+#undef CONFIG_CHIP_UFBGA176
+#undef CONFIG_CHIP_UFQFPN28
+#undef CONFIG_CHIP_UFQFPN32
+#undef CONFIG_CHIP_UFQFPN48
+#undef CONFIG_CHIP_VFQFPN36
+#undef CONFIG_CHIP_WLCSP25
+#undef CONFIG_CHIP_WLCSP36
+#undef CONFIG_CHIP_WLCSP49
+#undef CONFIG_CHIP_WLCSP64
+#undef CONFIG_CHIP_WLCSP81
+#undef CONFIG_CHIP_WLCSP90
+#undef CONFIG_CHIP_WLCSP143
+#undef CONFIG_CHIP_WLCSP168
+#define CONFIG_CHIP_PACKAGE "LFBGA100"
+#define CONFIG_TICK_FREQUENCY 1000
+#define CONFIG_ROUND_ROBIN_FREQUENCY 10
+#define CONFIG_THREAD_DETACH_ENABLE
+#define CONFIG_MAIN_THREAD_STACK_SIZE 2048
+#define CONFIG_MAIN_THREAD_PRIORITY 127
+#undef CONFIG_MAIN_THREAD_CAN_RECEIVE_SIGNALS
+#undef CONFIG_TEST_APPLICATION_ENABLE
+#undef CONFIG_BUILD_OPTIMIZATION_O0
+#undef CONFIG_BUILD_OPTIMIZATION_O1
+#undef CONFIG_BUILD_OPTIMIZATION_O2
+#define CONFIG_BUILD_OPTIMIZATION_O3
+#undef CONFIG_BUILD_OPTIMIZATION_OS
+#undef CONFIG_BUILD_OPTIMIZATION_OG
+#undef CONFIG_DEBUGGING_INFORMATION_ENABLE
+#define CONFIG_BUILD_OPTIMIZATION "-O3"
+#define CONFIG_DEBUGGING_INFORMATION_COMPILATION ""
+#define CONFIG_DEBUGGING_INFORMATION_LINKING ""
+
+#endif	/* INCLUDE_DISTORTOS_DISTORTOSCONFIGURATION_H_ */