better startup: all zig, bss and data init'd
parent
b262bb6b95
commit
f4bf565897
@ -1,13 +0,0 @@
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.cpu cortex-m4
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.thumb
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.extern _start
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.extern _tstack
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.section .vector_table
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.global init_vector_table
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init_vector_table:
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.word _tstack
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.word _start
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.skip 4 * 14
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@ -0,0 +1,41 @@
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const main = @import("main.zig");
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extern const __data_flash: u32;
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extern const __data: u32;
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extern const __data_size: u32;
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extern const __bss: u32;
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extern const __bss_size: u32;
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comptime {
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asm (
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\\.extern _start
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\\.extern _tstack
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\\
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\\.section .vector_table
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\\.global init_vector_table
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\\init_vector_table:
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\\ .word _tstack
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\\ .word _start
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\\ .skip 4 * 14
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);
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}
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inline fn zero_bss() void {
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const bss: [*]volatile u8 = @ptrFromInt(@intFromPtr(&__bss));
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@memset(bss[0..@intFromPtr(&__bss_size)], 0);
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}
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inline fn copy_data() void {
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const data_flash: [*]volatile u8 = @ptrFromInt(@intFromPtr(&__data_flash));
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const data: [*]volatile u8 = @ptrFromInt(@intFromPtr(&__data));
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const data_size = @intFromPtr(&__data_size);
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@memcpy(data[0..data_size], data_flash[0..data_size]);
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}
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export fn _start() callconv(.C) noreturn {
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zero_bss();
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copy_data();
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main.main();
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while (true) {}
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}
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