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authorClyne Sullivan <clyne@bitgloo.com>2021-03-04 17:54:40 -0500
committerClyne Sullivan <clyne@bitgloo.com>2021-03-04 17:54:40 -0500
commiteeeb04fa1a202c68279d4b4ee0a1e3ff34c62c7f (patch)
treed297b41a662c831d7e5bab76c85f48d33e2c604b /ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB
parent5f6181bb3c6ab4274a8068aaf14b278fa65e443e (diff)
add L4 and G4 to ChibiOS; delete bloat
Diffstat (limited to 'ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB')
-rw-r--r--ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.c266
-rw-r--r--ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.h1078
-rw-r--r--ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.mk9
-rw-r--r--ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.chcfg929
-rw-r--r--ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.fmpp15
5 files changed, 2297 insertions, 0 deletions
diff --git a/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.c b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.c
new file mode 100644
index 0000000..568c450
--- /dev/null
+++ b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.c
@@ -0,0 +1,266 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * This file has been automatically generated using ChibiStudio board
+ * generator plugin. Do not edit manually.
+ */
+
+#include "hal.h"
+#include "stm32_gpio.h"
+
+/*===========================================================================*/
+/* Driver local definitions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Type of STM32 GPIO port setup.
+ */
+typedef struct {
+ uint32_t moder;
+ uint32_t otyper;
+ uint32_t ospeedr;
+ uint32_t pupdr;
+ uint32_t odr;
+ uint32_t afrl;
+ uint32_t afrh;
+} gpio_setup_t;
+
+/**
+ * @brief Type of STM32 GPIO initialization data.
+ */
+typedef struct {
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
+ gpio_setup_t PAData;
+#endif
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
+ gpio_setup_t PBData;
+#endif
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
+ gpio_setup_t PCData;
+#endif
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
+ gpio_setup_t PDData;
+#endif
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+ gpio_setup_t PEData;
+#endif
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+ gpio_setup_t PFData;
+#endif
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+ gpio_setup_t PGData;
+#endif
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
+ gpio_setup_t PHData;
+#endif
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
+ gpio_setup_t PIData;
+#endif
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
+ gpio_setup_t PJData;
+#endif
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
+ gpio_setup_t PKData;
+#endif
+} gpio_config_t;
+
+/**
+ * @brief STM32 GPIO static initialization data.
+ */
+static const gpio_config_t gpio_default_config = {
+#if STM32_HAS_GPIOA
+ {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+ VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+ {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+ VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+ {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+ VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+ {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+ VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+ {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+ VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+ {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+ VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+ {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+ VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+ {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+ VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+ {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+ VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
+#endif
+#if STM32_HAS_GPIOJ
+ {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
+ VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
+#endif
+#if STM32_HAS_GPIOK
+ {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
+ VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
+#endif
+};
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+
+ gpiop->OTYPER = config->otyper;
+ gpiop->OSPEEDR = config->ospeedr;
+ gpiop->PUPDR = config->pupdr;
+ gpiop->ODR = config->odr;
+ gpiop->AFRL = config->afrl;
+ gpiop->AFRH = config->afrh;
+ gpiop->MODER = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+
+ /* Enabling GPIO-related clocks, the mask comes from the
+ registry header file.*/
+ rccResetAHB2(STM32_GPIO_EN_MASK);
+ rccEnableAHB2(STM32_GPIO_EN_MASK, true);
+
+ /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+ gpio_init(GPIOA, &gpio_default_config.PAData);
+#endif
+#if STM32_HAS_GPIOB
+ gpio_init(GPIOB, &gpio_default_config.PBData);
+#endif
+#if STM32_HAS_GPIOC
+ gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+ gpio_init(GPIOD, &gpio_default_config.PDData);
+#endif
+#if STM32_HAS_GPIOE
+ gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+ gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+#if STM32_HAS_GPIOG
+ gpio_init(GPIOG, &gpio_default_config.PGData);
+#endif
+#if STM32_HAS_GPIOH
+ gpio_init(GPIOH, &gpio_default_config.PHData);
+#endif
+#if STM32_HAS_GPIOI
+ gpio_init(GPIOI, &gpio_default_config.PIData);
+#endif
+#if STM32_HAS_GPIOJ
+ gpio_init(GPIOJ, &gpio_default_config.PJData);
+#endif
+#if STM32_HAS_GPIOK
+ gpio_init(GPIOK, &gpio_default_config.PKData);
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Early initialization code.
+ * @details GPIO ports and system clocks are initialized before everything
+ * else.
+ */
+void __early_init(void) {
+
+ stm32_gpio_init();
+ stm32_clock_init();
+}
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* CHTODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* CHTODO: Fill the implementation.*/
+ return false;
+}
+#endif /* HAL_USE_SDC */
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* CHTODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* CHTODO: Fill the implementation.*/
+ return false;
+}
+#endif
+
+/**
+ * @brief Board-specific initialization code.
+ * @note You can add your board-specific code here.
+ */
+void boardInit(void) {
+
+}
diff --git a/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.h b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.h
new file mode 100644
index 0000000..09924a6
--- /dev/null
+++ b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.h
@@ -0,0 +1,1078 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * This file has been automatically generated using ChibiStudio board
+ * generator plugin. Do not edit manually.
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/*
+ * Setup for STMicroelectronics STM32 Nucleo64-G431RB board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_ST_NUCLEO64_G431RB
+#define BOARD_NAME "STMicroelectronics STM32 Nucleo64-G431RB"
+
+/*
+ * Board oscillators-related settings.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK 32768U
+#endif
+
+#define STM32_LSEDRV (3U << 3U)
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK 24000000U
+#endif
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD 300U
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32G431xx
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_PIN0 0U
+#define GPIOA_PIN1 1U
+#define GPIOA_STLINK_TX 2U
+#define GPIOA_STLINK_RX 3U
+#define GPIOA_PIN4 4U
+#define GPIOA_LED 5U
+#define GPIOA_LED_GREEN 5U
+#define GPIOA_PIN6 6U
+#define GPIOA_PIN7 7U
+#define GPIOA_PIN8 8U
+#define GPIOA_PIN9 9U
+#define GPIOA_PIN10 10U
+#define GPIOA_PIN11 11U
+#define GPIOA_PIN12 12U
+#define GPIOA_SWDIO 13U
+#define GPIOA_SWCLK 14U
+#define GPIOA_PIN15 15U
+
+#define GPIOB_PIN0 0U
+#define GPIOB_PIN1 1U
+#define GPIOB_BOOT1 2U
+#define GPIOB_TRACESWO 3U
+#define GPIOB_PIN4 4U
+#define GPIOB_PIN5 5U
+#define GPIOB_PIN6 6U
+#define GPIOB_PIN7 7U
+#define GPIOB_PIN8 8U
+#define GPIOB_PIN9 9U
+#define GPIOB_PIN10 10U
+#define GPIOB_PIN11 11U
+#define GPIOB_PIN12 12U
+#define GPIOB_PIN13 13U
+#define GPIOB_PIN14 14U
+#define GPIOB_PIN15 15U
+
+#define GPIOC_PIN0 0U
+#define GPIOC_PIN1 1U
+#define GPIOC_PIN2 2U
+#define GPIOC_PIN3 3U
+#define GPIOC_PIN4 4U
+#define GPIOC_PIN5 5U
+#define GPIOC_PIN6 6U
+#define GPIOC_PIN7 7U
+#define GPIOC_PIN8 8U
+#define GPIOC_PIN9 9U
+#define GPIOC_PIN10 10U
+#define GPIOC_PIN11 11U
+#define GPIOC_PIN12 12U
+#define GPIOC_BUTTON 13U
+#define GPIOC_USER_BUTTON 13U
+#define GPIOC_OSC32_IN 14U
+#define GPIOC_OSC32_OUT 15U
+
+#define GPIOD_PIN0 0U
+#define GPIOD_PIN1 1U
+#define GPIOD_PIN2 2U
+#define GPIOD_PIN3 3U
+#define GPIOD_PIN4 4U
+#define GPIOD_PIN5 5U
+#define GPIOD_PIN6 6U
+#define GPIOD_PIN7 7U
+#define GPIOD_PIN8 8U
+#define GPIOD_PIN9 9U
+#define GPIOD_PIN10 10U
+#define GPIOD_PIN11 11U
+#define GPIOD_PIN12 12U
+#define GPIOD_PIN13 13U
+#define GPIOD_PIN14 14U
+#define GPIOD_PIN15 15U
+
+#define GPIOE_PIN0 0U
+#define GPIOE_PIN1 1U
+#define GPIOE_PIN2 2U
+#define GPIOE_PIN3 3U
+#define GPIOE_PIN4 4U
+#define GPIOE_PIN5 5U
+#define GPIOE_PIN6 6U
+#define GPIOE_PIN7 7U
+#define GPIOE_PIN8 8U
+#define GPIOE_PIN9 9U
+#define GPIOE_PIN10 10U
+#define GPIOE_PIN11 11U
+#define GPIOE_PIN12 12U
+#define GPIOE_PIN13 13U
+#define GPIOE_PIN14 14U
+#define GPIOE_PIN15 15U
+
+#define GPIOF_OSC_IN 0U
+#define GPIOF_OSC_OUT 1U
+#define GPIOF_PIN2 2U
+#define GPIOF_PIN3 3U
+#define GPIOF_PIN4 4U
+#define GPIOF_PIN5 5U
+#define GPIOF_PIN6 6U
+#define GPIOF_PIN7 7U
+#define GPIOF_PIN8 8U
+#define GPIOF_PIN9 9U
+#define GPIOF_PIN10 10U
+#define GPIOF_PIN11 11U
+#define GPIOF_PIN12 12U
+#define GPIOF_PIN13 13U
+#define GPIOF_PIN14 14U
+#define GPIOF_PIN15 15U
+
+#define GPIOG_PIN0 0U
+#define GPIOG_PIN1 1U
+#define GPIOG_PIN2 2U
+#define GPIOG_PIN3 3U
+#define GPIOG_PIN4 4U
+#define GPIOG_PIN5 5U
+#define GPIOG_PIN6 6U
+#define GPIOG_PIN7 7U
+#define GPIOG_PIN8 8U
+#define GPIOG_PIN9 9U
+#define GPIOG_PIN10 10U
+#define GPIOG_PIN11 11U
+#define GPIOG_PIN12 12U
+#define GPIOG_PIN13 13U
+#define GPIOG_PIN14 14U
+#define GPIOG_PIN15 15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_STLINK_TX PAL_LINE(GPIOA, 2U)
+#define LINE_STLINK_RX PAL_LINE(GPIOA, 3U)
+#define LINE_LED PAL_LINE(GPIOA, 5U)
+#define LINE_LED_GREEN PAL_LINE(GPIOA, 5U)
+#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
+#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
+#define LINE_BOOT1 PAL_LINE(GPIOB, 2U)
+#define LINE_TRACESWO PAL_LINE(GPIOB, 3U)
+#define LINE_BUTTON PAL_LINE(GPIOC, 13U)
+#define LINE_USER_BUTTON PAL_LINE(GPIOC, 13U)
+#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
+#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
+#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
+#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n) (0U << (n))
+#define PIN_ODR_HIGH(n) (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
+#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
+#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
+#define PIN_LOCKR_DISABLED(n) (0U << (n))
+#define PIN_LOCKR_ENABLED(n) (1U << (n))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0 - PIN0 (analog).
+ * PA1 - PIN1 (analog).
+ * PA2 - STLINK_TX (alternate 12).
+ * PA3 - STLINK_RX (alternate 12).
+ * PA4 - PIN4 (analog).
+ * PA5 - LED LED_GREEN (output pushpull maximum).
+ * PA6 - PIN6 (analog).
+ * PA7 - PIN7 (analog).
+ * PA8 - PIN8 (analog).
+ * PA9 - PIN9 (analog).
+ * PA10 - PIN10 (analog).
+ * PA11 - PIN11 (analog).
+ * PA12 - PIN12 (analog).
+ * PA13 - SWDIO (alternate 0).
+ * PA14 - SWCLK (alternate 0).
+ * PA15 - PIN15 (analog).
+ */
+#define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_PIN0) | \
+ PIN_MODE_ANALOG(GPIOA_PIN1) | \
+ PIN_MODE_ALTERNATE(GPIOA_STLINK_TX) | \
+ PIN_MODE_ALTERNATE(GPIOA_STLINK_RX) | \
+ PIN_MODE_ANALOG(GPIOA_PIN4) | \
+ PIN_MODE_OUTPUT(GPIOA_LED) | \
+ PIN_MODE_ANALOG(GPIOA_PIN6) | \
+ PIN_MODE_ANALOG(GPIOA_PIN7) | \
+ PIN_MODE_ANALOG(GPIOA_PIN8) | \
+ PIN_MODE_ANALOG(GPIOA_PIN9) | \
+ PIN_MODE_ANALOG(GPIOA_PIN10) | \
+ PIN_MODE_ANALOG(GPIOA_PIN11) | \
+ PIN_MODE_ANALOG(GPIOA_PIN12) | \
+ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
+ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
+ PIN_MODE_ANALOG(GPIOA_PIN15))
+#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_TX) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_RX) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_LED) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
+#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOA_STLINK_TX) | \
+ PIN_OSPEED_VERYLOW(GPIOA_STLINK_RX) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
+ PIN_OSPEED_HIGH(GPIOA_LED) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN12) | \
+ PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
+ PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN15))
+#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOA_STLINK_TX) | \
+ PIN_PUPDR_FLOATING(GPIOA_STLINK_RX) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOA_LED) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
+ PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN15))
+#define VAL_GPIOA_ODR (PIN_ODR_LOW(GPIOA_PIN0) | \
+ PIN_ODR_LOW(GPIOA_PIN1) | \
+ PIN_ODR_LOW(GPIOA_STLINK_TX) | \
+ PIN_ODR_LOW(GPIOA_STLINK_RX) | \
+ PIN_ODR_LOW(GPIOA_PIN4) | \
+ PIN_ODR_LOW(GPIOA_LED) | \
+ PIN_ODR_LOW(GPIOA_PIN6) | \
+ PIN_ODR_LOW(GPIOA_PIN7) | \
+ PIN_ODR_LOW(GPIOA_PIN8) | \
+ PIN_ODR_LOW(GPIOA_PIN9) | \
+ PIN_ODR_LOW(GPIOA_PIN10) | \
+ PIN_ODR_LOW(GPIOA_PIN11) | \
+ PIN_ODR_LOW(GPIOA_PIN12) | \
+ PIN_ODR_LOW(GPIOA_SWDIO) | \
+ PIN_ODR_LOW(GPIOA_SWCLK) | \
+ PIN_ODR_LOW(GPIOA_PIN15))
+#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOA_STLINK_TX, 12U) | \
+ PIN_AFIO_AF(GPIOA_STLINK_RX, 12U) | \
+ PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOA_LED, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN7, 0U))
+#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
+ PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
+ PIN_AFIO_AF(GPIOA_PIN15, 0U))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0 - PIN0 (analog).
+ * PB1 - PIN1 (analog).
+ * PB2 - BOOT1 (analog).
+ * PB3 - TRACESWO (alternate 0).
+ * PB4 - PIN4 (analog).
+ * PB5 - PIN5 (analog).
+ * PB6 - PIN6 (analog).
+ * PB7 - PIN7 (analog).
+ * PB8 - PIN8 (analog).
+ * PB9 - PIN9 (analog).
+ * PB10 - PIN10 (analog).
+ * PB11 - PIN11 (analog).
+ * PB12 - PIN12 (analog).
+ * PB13 - PIN13 (analog).
+ * PB14 - PIN14 (analog).
+ * PB15 - PIN15 (analog).
+ */
+#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_PIN0) | \
+ PIN_MODE_ANALOG(GPIOB_PIN1) | \
+ PIN_MODE_ANALOG(GPIOB_BOOT1) | \
+ PIN_MODE_ALTERNATE(GPIOB_TRACESWO) | \
+ PIN_MODE_ANALOG(GPIOB_PIN4) | \
+ PIN_MODE_ANALOG(GPIOB_PIN5) | \
+ PIN_MODE_ANALOG(GPIOB_PIN6) | \
+ PIN_MODE_ANALOG(GPIOB_PIN7) | \
+ PIN_MODE_ANALOG(GPIOB_PIN8) | \
+ PIN_MODE_ANALOG(GPIOB_PIN9) | \
+ PIN_MODE_ANALOG(GPIOB_PIN10) | \
+ PIN_MODE_ANALOG(GPIOB_PIN11) | \
+ PIN_MODE_ANALOG(GPIOB_PIN12) | \
+ PIN_MODE_ANALOG(GPIOB_PIN13) | \
+ PIN_MODE_ANALOG(GPIOB_PIN14) | \
+ PIN_MODE_ANALOG(GPIOB_PIN15))
+#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_BOOT1) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_TRACESWO) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
+#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOB_BOOT1) | \
+ PIN_OSPEED_HIGH(GPIOB_TRACESWO) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN15))
+#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOB_BOOT1) | \
+ PIN_PUPDR_FLOATING(GPIOB_TRACESWO) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN15))
+#define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_PIN0) | \
+ PIN_ODR_LOW(GPIOB_PIN1) | \
+ PIN_ODR_LOW(GPIOB_BOOT1) | \
+ PIN_ODR_LOW(GPIOB_TRACESWO) | \
+ PIN_ODR_LOW(GPIOB_PIN4) | \
+ PIN_ODR_LOW(GPIOB_PIN5) | \
+ PIN_ODR_LOW(GPIOB_PIN6) | \
+ PIN_ODR_LOW(GPIOB_PIN7) | \
+ PIN_ODR_LOW(GPIOB_PIN8) | \
+ PIN_ODR_LOW(GPIOB_PIN9) | \
+ PIN_ODR_LOW(GPIOB_PIN10) | \
+ PIN_ODR_LOW(GPIOB_PIN11) | \
+ PIN_ODR_LOW(GPIOB_PIN12) | \
+ PIN_ODR_LOW(GPIOB_PIN13) | \
+ PIN_ODR_LOW(GPIOB_PIN14) | \
+ PIN_ODR_LOW(GPIOB_PIN15))
+#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOB_BOOT1, 0U) | \
+ PIN_AFIO_AF(GPIOB_TRACESWO, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN7, 0U))
+#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
+ PIN_AFIO_AF(GPIOB_PIN15, 0U))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0 - PIN0 (analog).
+ * PC1 - PIN1 (analog).
+ * PC2 - PIN2 (analog).
+ * PC3 - PIN3 (analog).
+ * PC4 - PIN4 (analog).
+ * PC5 - PIN5 (analog).
+ * PC6 - PIN6 (analog).
+ * PC7 - PIN7 (analog).
+ * PC8 - PIN8 (analog).
+ * PC9 - PIN9 (analog).
+ * PC10 - PIN10 (analog).
+ * PC11 - PIN11 (analog).
+ * PC12 - PIN12 (analog).
+ * PC13 - BUTTON USER_BUTTON (input floating).
+ * PC14 - OSC32_IN (analog).
+ * PC15 - OSC32_OUT (analog).
+ */
+#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_PIN0) | \
+ PIN_MODE_ANALOG(GPIOC_PIN1) | \
+ PIN_MODE_ANALOG(GPIOC_PIN2) | \
+ PIN_MODE_ANALOG(GPIOC_PIN3) | \
+ PIN_MODE_ANALOG(GPIOC_PIN4) | \
+ PIN_MODE_ANALOG(GPIOC_PIN5) | \
+ PIN_MODE_ANALOG(GPIOC_PIN6) | \
+ PIN_MODE_ANALOG(GPIOC_PIN7) | \
+ PIN_MODE_ANALOG(GPIOC_PIN8) | \
+ PIN_MODE_ANALOG(GPIOC_PIN9) | \
+ PIN_MODE_ANALOG(GPIOC_PIN10) | \
+ PIN_MODE_ANALOG(GPIOC_PIN11) | \
+ PIN_MODE_ANALOG(GPIOC_PIN12) | \
+ PIN_MODE_INPUT(GPIOC_BUTTON) | \
+ PIN_MODE_ANALOG(GPIOC_OSC32_IN) | \
+ PIN_MODE_ANALOG(GPIOC_OSC32_OUT))
+#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
+#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOC_BUTTON) | \
+ PIN_OSPEED_VERYLOW(GPIOC_OSC32_IN) | \
+ PIN_OSPEED_VERYLOW(GPIOC_OSC32_OUT))
+#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN3) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \
+ PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
+ PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
+#define VAL_GPIOC_ODR (PIN_ODR_LOW(GPIOC_PIN0) | \
+ PIN_ODR_LOW(GPIOC_PIN1) | \
+ PIN_ODR_LOW(GPIOC_PIN2) | \
+ PIN_ODR_LOW(GPIOC_PIN3) | \
+ PIN_ODR_LOW(GPIOC_PIN4) | \
+ PIN_ODR_LOW(GPIOC_PIN5) | \
+ PIN_ODR_LOW(GPIOC_PIN6) | \
+ PIN_ODR_LOW(GPIOC_PIN7) | \
+ PIN_ODR_LOW(GPIOC_PIN8) | \
+ PIN_ODR_LOW(GPIOC_PIN9) | \
+ PIN_ODR_LOW(GPIOC_PIN10) | \
+ PIN_ODR_LOW(GPIOC_PIN11) | \
+ PIN_ODR_LOW(GPIOC_PIN12) | \
+ PIN_ODR_LOW(GPIOC_BUTTON) | \
+ PIN_ODR_LOW(GPIOC_OSC32_IN) | \
+ PIN_ODR_LOW(GPIOC_OSC32_OUT))
+#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN7, 0U))
+#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \
+ PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
+ PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0 - PIN0 (analog).
+ * PD1 - PIN1 (analog).
+ * PD2 - PIN2 (analog).
+ * PD3 - PIN3 (analog).
+ * PD4 - PIN4 (analog).
+ * PD5 - PIN5 (analog).
+ * PD6 - PIN6 (analog).
+ * PD7 - PIN7 (analog).
+ * PD8 - PIN8 (analog).
+ * PD9 - PIN9 (analog).
+ * PD10 - PIN10 (analog).
+ * PD11 - PIN11 (analog).
+ * PD12 - PIN12 (analog).
+ * PD13 - PIN13 (analog).
+ * PD14 - PIN14 (analog).
+ * PD15 - PIN15 (analog).
+ */
+#define VAL_GPIOD_MODER (PIN_MODE_ANALOG(GPIOD_PIN0) | \
+ PIN_MODE_ANALOG(GPIOD_PIN1) | \
+ PIN_MODE_ANALOG(GPIOD_PIN2) | \
+ PIN_MODE_ANALOG(GPIOD_PIN3) | \
+ PIN_MODE_ANALOG(GPIOD_PIN4) | \
+ PIN_MODE_ANALOG(GPIOD_PIN5) | \
+ PIN_MODE_ANALOG(GPIOD_PIN6) | \
+ PIN_MODE_ANALOG(GPIOD_PIN7) | \
+ PIN_MODE_ANALOG(GPIOD_PIN8) | \
+ PIN_MODE_ANALOG(GPIOD_PIN9) | \
+ PIN_MODE_ANALOG(GPIOD_PIN10) | \
+ PIN_MODE_ANALOG(GPIOD_PIN11) | \
+ PIN_MODE_ANALOG(GPIOD_PIN12) | \
+ PIN_MODE_ANALOG(GPIOD_PIN13) | \
+ PIN_MODE_ANALOG(GPIOD_PIN14) | \
+ PIN_MODE_ANALOG(GPIOD_PIN15))
+#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
+#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN15))
+#define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN3) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOD_PIN15))
+#define VAL_GPIOD_ODR (PIN_ODR_LOW(GPIOD_PIN0) | \
+ PIN_ODR_LOW(GPIOD_PIN1) | \
+ PIN_ODR_LOW(GPIOD_PIN2) | \
+ PIN_ODR_LOW(GPIOD_PIN3) | \
+ PIN_ODR_LOW(GPIOD_PIN4) | \
+ PIN_ODR_LOW(GPIOD_PIN5) | \
+ PIN_ODR_LOW(GPIOD_PIN6) | \
+ PIN_ODR_LOW(GPIOD_PIN7) | \
+ PIN_ODR_LOW(GPIOD_PIN8) | \
+ PIN_ODR_LOW(GPIOD_PIN9) | \
+ PIN_ODR_LOW(GPIOD_PIN10) | \
+ PIN_ODR_LOW(GPIOD_PIN11) | \
+ PIN_ODR_LOW(GPIOD_PIN12) | \
+ PIN_ODR_LOW(GPIOD_PIN13) | \
+ PIN_ODR_LOW(GPIOD_PIN14) | \
+ PIN_ODR_LOW(GPIOD_PIN15))
+#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN7, 0U))
+#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
+ PIN_AFIO_AF(GPIOD_PIN15, 0U))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0 - PIN0 (analog).
+ * PE1 - PIN1 (analog).
+ * PE2 - PIN2 (analog).
+ * PE3 - PIN3 (analog).
+ * PE4 - PIN4 (analog).
+ * PE5 - PIN5 (analog).
+ * PE6 - PIN6 (analog).
+ * PE7 - PIN7 (analog).
+ * PE8 - PIN8 (analog).
+ * PE9 - PIN9 (analog).
+ * PE10 - PIN10 (analog).
+ * PE11 - PIN11 (analog).
+ * PE12 - PIN12 (analog).
+ * PE13 - PIN13 (analog).
+ * PE14 - PIN14 (analog).
+ * PE15 - PIN15 (analog).
+ */
+#define VAL_GPIOE_MODER (PIN_MODE_ANALOG(GPIOE_PIN0) | \
+ PIN_MODE_ANALOG(GPIOE_PIN1) | \
+ PIN_MODE_ANALOG(GPIOE_PIN2) | \
+ PIN_MODE_ANALOG(GPIOE_PIN3) | \
+ PIN_MODE_ANALOG(GPIOE_PIN4) | \
+ PIN_MODE_ANALOG(GPIOE_PIN5) | \
+ PIN_MODE_ANALOG(GPIOE_PIN6) | \
+ PIN_MODE_ANALOG(GPIOE_PIN7) | \
+ PIN_MODE_ANALOG(GPIOE_PIN8) | \
+ PIN_MODE_ANALOG(GPIOE_PIN9) | \
+ PIN_MODE_ANALOG(GPIOE_PIN10) | \
+ PIN_MODE_ANALOG(GPIOE_PIN11) | \
+ PIN_MODE_ANALOG(GPIOE_PIN12) | \
+ PIN_MODE_ANALOG(GPIOE_PIN13) | \
+ PIN_MODE_ANALOG(GPIOE_PIN14) | \
+ PIN_MODE_ANALOG(GPIOE_PIN15))
+#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
+#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN15))
+#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN15))
+#define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \
+ PIN_ODR_LOW(GPIOE_PIN1) | \
+ PIN_ODR_LOW(GPIOE_PIN2) | \
+ PIN_ODR_LOW(GPIOE_PIN3) | \
+ PIN_ODR_LOW(GPIOE_PIN4) | \
+ PIN_ODR_LOW(GPIOE_PIN5) | \
+ PIN_ODR_LOW(GPIOE_PIN6) | \
+ PIN_ODR_LOW(GPIOE_PIN7) | \
+ PIN_ODR_LOW(GPIOE_PIN8) | \
+ PIN_ODR_LOW(GPIOE_PIN9) | \
+ PIN_ODR_LOW(GPIOE_PIN10) | \
+ PIN_ODR_LOW(GPIOE_PIN11) | \
+ PIN_ODR_LOW(GPIOE_PIN12) | \
+ PIN_ODR_LOW(GPIOE_PIN13) | \
+ PIN_ODR_LOW(GPIOE_PIN14) | \
+ PIN_ODR_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN7, 0U))
+#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
+ PIN_AFIO_AF(GPIOE_PIN15, 0U))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0 - OSC_IN (analog).
+ * PF1 - OSC_OUT (analog).
+ * PF2 - PIN2 (analog).
+ * PF3 - PIN3 (analog).
+ * PF4 - PIN4 (analog).
+ * PF5 - PIN5 (analog).
+ * PF6 - PIN6 (analog).
+ * PF7 - PIN7 (analog).
+ * PF8 - PIN8 (analog).
+ * PF9 - PIN9 (analog).
+ * PF10 - PIN10 (analog).
+ * PF11 - PIN11 (analog).
+ * PF12 - PIN12 (analog).
+ * PF13 - PIN13 (analog).
+ * PF14 - PIN14 (analog).
+ * PF15 - PIN15 (analog).
+ */
+#define VAL_GPIOF_MODER (PIN_MODE_ANALOG(GPIOF_OSC_IN) | \
+ PIN_MODE_ANALOG(GPIOF_OSC_OUT) | \
+ PIN_MODE_ANALOG(GPIOF_PIN2) | \
+ PIN_MODE_ANALOG(GPIOF_PIN3) | \
+ PIN_MODE_ANALOG(GPIOF_PIN4) | \
+ PIN_MODE_ANALOG(GPIOF_PIN5) | \
+ PIN_MODE_ANALOG(GPIOF_PIN6) | \
+ PIN_MODE_ANALOG(GPIOF_PIN7) | \
+ PIN_MODE_ANALOG(GPIOF_PIN8) | \
+ PIN_MODE_ANALOG(GPIOF_PIN9) | \
+ PIN_MODE_ANALOG(GPIOF_PIN10) | \
+ PIN_MODE_ANALOG(GPIOF_PIN11) | \
+ PIN_MODE_ANALOG(GPIOF_PIN12) | \
+ PIN_MODE_ANALOG(GPIOF_PIN13) | \
+ PIN_MODE_ANALOG(GPIOF_PIN14) | \
+ PIN_MODE_ANALOG(GPIOF_PIN15))
+#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
+#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \
+ PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN15))
+#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
+ PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN3) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOF_PIN15))
+#define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_OSC_IN) | \
+ PIN_ODR_LOW(GPIOF_OSC_OUT) | \
+ PIN_ODR_LOW(GPIOF_PIN2) | \
+ PIN_ODR_LOW(GPIOF_PIN3) | \
+ PIN_ODR_LOW(GPIOF_PIN4) | \
+ PIN_ODR_LOW(GPIOF_PIN5) | \
+ PIN_ODR_LOW(GPIOF_PIN6) | \
+ PIN_ODR_LOW(GPIOF_PIN7) | \
+ PIN_ODR_LOW(GPIOF_PIN8) | \
+ PIN_ODR_LOW(GPIOF_PIN9) | \
+ PIN_ODR_LOW(GPIOF_PIN10) | \
+ PIN_ODR_LOW(GPIOF_PIN11) | \
+ PIN_ODR_LOW(GPIOF_PIN12) | \
+ PIN_ODR_LOW(GPIOF_PIN13) | \
+ PIN_ODR_LOW(GPIOF_PIN14) | \
+ PIN_ODR_LOW(GPIOF_PIN15))
+#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \
+ PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN7, 0U))
+#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
+ PIN_AFIO_AF(GPIOF_PIN15, 0U))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0 - PIN0 (analog).
+ * PG1 - PIN1 (analog).
+ * PG2 - PIN2 (analog).
+ * PG3 - PIN3 (analog).
+ * PG4 - PIN4 (analog).
+ * PG5 - PIN5 (analog).
+ * PG6 - PIN6 (analog).
+ * PG7 - PIN7 (analog).
+ * PG8 - PIN8 (analog).
+ * PG9 - PIN9 (analog).
+ * PG10 - PIN10 (analog).
+ * PG11 - PIN11 (analog).
+ * PG12 - PIN12 (analog).
+ * PG13 - PIN13 (analog).
+ * PG14 - PIN14 (analog).
+ * PG15 - PIN15 (analog).
+ */
+#define VAL_GPIOG_MODER (PIN_MODE_ANALOG(GPIOG_PIN0) | \
+ PIN_MODE_ANALOG(GPIOG_PIN1) | \
+ PIN_MODE_ANALOG(GPIOG_PIN2) | \
+ PIN_MODE_ANALOG(GPIOG_PIN3) | \
+ PIN_MODE_ANALOG(GPIOG_PIN4) | \
+ PIN_MODE_ANALOG(GPIOG_PIN5) | \
+ PIN_MODE_ANALOG(GPIOG_PIN6) | \
+ PIN_MODE_ANALOG(GPIOG_PIN7) | \
+ PIN_MODE_ANALOG(GPIOG_PIN8) | \
+ PIN_MODE_ANALOG(GPIOG_PIN9) | \
+ PIN_MODE_ANALOG(GPIOG_PIN10) | \
+ PIN_MODE_ANALOG(GPIOG_PIN11) | \
+ PIN_MODE_ANALOG(GPIOG_PIN12) | \
+ PIN_MODE_ANALOG(GPIOG_PIN13) | \
+ PIN_MODE_ANALOG(GPIOG_PIN14) | \
+ PIN_MODE_ANALOG(GPIOG_PIN15))
+#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
+#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN15))
+#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN1) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN3) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN4) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN7) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN8) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN9) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN11) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOG_PIN15))
+#define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \
+ PIN_ODR_LOW(GPIOG_PIN1) | \
+ PIN_ODR_LOW(GPIOG_PIN2) | \
+ PIN_ODR_LOW(GPIOG_PIN3) | \
+ PIN_ODR_LOW(GPIOG_PIN4) | \
+ PIN_ODR_LOW(GPIOG_PIN5) | \
+ PIN_ODR_LOW(GPIOG_PIN6) | \
+ PIN_ODR_LOW(GPIOG_PIN7) | \
+ PIN_ODR_LOW(GPIOG_PIN8) | \
+ PIN_ODR_LOW(GPIOG_PIN9) | \
+ PIN_ODR_LOW(GPIOG_PIN10) | \
+ PIN_ODR_LOW(GPIOG_PIN11) | \
+ PIN_ODR_LOW(GPIOG_PIN12) | \
+ PIN_ODR_LOW(GPIOG_PIN13) | \
+ PIN_ODR_LOW(GPIOG_PIN14) | \
+ PIN_ODR_LOW(GPIOG_PIN15))
+#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN7, 0U))
+#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
+ PIN_AFIO_AF(GPIOG_PIN15, 0U))
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* BOARD_H */
diff --git a/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.mk b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.mk
new file mode 100644
index 0000000..b837794
--- /dev/null
+++ b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/board.mk
@@ -0,0 +1,9 @@
+# List of all the board related files.
+BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G431RB/board.c
+
+# Required include directories
+BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO64_G431RB
+
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC += $(BOARDINC)
diff --git a/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.chcfg b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.chcfg
new file mode 100644
index 0000000..2f96088
--- /dev/null
+++ b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.chcfg
@@ -0,0 +1,929 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- STM32G4xx board Template -->
+<board
+ xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32g4xx_board.xsd">
+ <configuration_settings>
+ <templates_path>resources/gencfg/processors/boards/stm32g4xx/templates</templates_path>
+ <output_path>..</output_path>
+ <hal_version>5.0.x</hal_version>
+ </configuration_settings>
+ <board_name>STMicroelectronics STM32 Nucleo64-G431RB</board_name>
+ <board_id>ST_NUCLEO64_G431RB</board_id>
+ <board_functions></board_functions>
+ <subtype>STM32G431xx</subtype>
+ <clocks HSEFrequency="24000000" HSEBypass="false" LSEFrequency="32768"
+ LSEBypass="false" VDD="300" LSEDrive="3 High Drive (default)" ></clocks>
+ <ports>
+ <GPIOA>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID="STLINK_TX"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Alternate"
+ Alternate="12" />
+ <pin3
+ ID="STLINK_RX"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Alternate"
+ Alternate="12" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID="LED LED_GREEN"
+ Type="PushPull"
+ Speed="Maximum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Output"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID="SWDIO"
+ Type="PushPull"
+ Speed="Maximum"
+ Resistor="PullUp"
+ Level="Low"
+ Mode="Alternate"
+ Alternate="0" />
+ <pin14
+ ID="SWCLK"
+ Type="PushPull"
+ Speed="Maximum"
+ Resistor="PullDown"
+ Level="Low"
+ Mode="Alternate"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOA>
+ <GPIOB>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID="BOOT1"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID="TRACESWO"
+ Type="PushPull"
+ Speed="Maximum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Alternate"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin14
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOB>
+ <GPIOC>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID="BUTTON USER_BUTTON"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Input"
+ Alternate="0" />
+ <pin14
+ ID="OSC32_IN"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID="OSC32_OUT"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOC>
+ <GPIOD>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin14
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOD>
+ <GPIOE>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin14
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOE>
+ <GPIOF>
+ <pin0
+ ID="OSC_IN"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID="OSC_OUT"
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin14
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOF>
+ <GPIOG>
+ <pin0
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin1
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin2
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin3
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin4
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin5
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin6
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin7
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin8
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin9
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin10
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin11
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin12
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin13
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin14
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ <pin15
+ ID=""
+ Type="PushPull"
+ Speed="Minimum"
+ Resistor="Floating"
+ Level="Low"
+ Mode="Analog"
+ Alternate="0" />
+ </GPIOG>
+ </ports>
+</board>
diff --git a/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.fmpp b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.fmpp
new file mode 100644
index 0000000..f48751c
--- /dev/null
+++ b/ChibiOS_20.3.2/os/hal/boards/ST_NUCLEO64_G431RB/cfg/board.fmpp
@@ -0,0 +1,15 @@
+sourceRoot: ../../../../../tools/ftl/processors/boards/stm32g4xx/templates
+outputRoot: ..
+dataRoot: .
+
+freemarkerLinks: {
+ lib: ../../../../../tools/ftl/libs
+}
+
+data : {
+ doc1:xml (
+ board.chcfg
+ {
+ }
+ )
+}
generated by cgit v1.2.3 (git 2.39.1) at 2025-04-08 21:27:56 +0000